TS339 TSC | Alldatasheet

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Technical content

Features

— Output voltage compatible with DTL, ECL, TTL, MOS and CMOS Logic Levels — Low input bias current -25nA — Low input offset current -5.0nA — Low input offset voltage --5.0mV(max) — Input common mode range to ground level — Differential input voltage range equal to power supply voltage

Ordering Information

Part No. Operating Temp. Package TS339CD DIP-14 TS339CS 0 ~ +70 oC SOP-14 Pin Assignment Schematic (each comparator) DIP-14 SOP-14

TS339 2-6 2003/12 rev. A Absolute Maximum Rating Supply Voltage Vcc +36 or ±18 Vdc Differential Input Voltage V IDR 36 Vdc Input Common Mode Voltage Range Input Current (note 2) VICR Iin -0.3 to 36 Vdc mA Output Short Circuit to Ground Output Sink Current (note 1) Isc Isink Continuous mA Power Dissipation @ Ta=25 oC Derate above 25 oC 1/Rθja 1.0 W mW/ oC Operating Junction Temperature Range T J 0 ~ +125 oC Storage Temperature Range T STG -65 ~ +150 oC Lead Temperature 1.6mm(1/16”) from case for 10Sec. T LEAD 260 oC Electrical Characteristics (VCC = 5V, Ta =25 oC; unless otherwise specified.) Characteristics Symbol Test condition Min Typ Max Unit Input Offset Voltage (note 3) Vio -- ±2.0 ±5.0 mV Input Offset Current (note 3) Iio -- ±5.0 ±50 nA Input Bias Current (note 3, 4) (output in linear range) IIB -- 25 250 nA Input Common Mode Voltage Range (note 6) VICR 0 -- V CC-1.5 Volts Voltage Gain A VOL R L ≥15K, Vcc = 15Vdc. -- 200 -- V/mV Large Signal Response Time -- Vin = TTL Logic Swing. Vref = 1.4Vdc, VRL = 5Vdc. RL= 5.1KΩ -- 300 -- nS Response Time (note 6) t TLH VRL = 5Vdc, RK = 5.1K Ω -- 1.3 -- uS Output Sink Current ISINK Vin- ≥1Vdc, Vin+=0Vdc, VO- ≤15 Vdc 6 16 -- mA Output Saturation Voltage VOL Vin- ≥1Vdc, Vin+=0, ISINK ≤4mA, -- 130 400 mV Output Leakage Current IOL Vin-=0V, Vin+ ≥1Vdc, Vo=5Vdc -- 0.1 -- nA Input Offset Voltage (note 3) Vio T LOW ≤ Ta ≤THIGH -- -- ±9.0 mV Input Offset Current (note 3) Iio T LOW ≤ Ta ≤THIGH -- -- ±150 nA Input Bias Current (note 3, 4) (output in linear range) IIB T LOW ≤ Ta ≤THIGH -- -- 400 nA Input Common Mode Voltage Range (note 6) VICR T LOW ≤ Ta ≤THIGH 0 -- V CC-2.0 Volts Output Saturation Voltage VOL Vin- ≥1Vdc, Vin+=0, ISINK ≤4mA, TLOW ≤Ta ≤THIGH -- -- 700 mV Output Leakage Current I OL Vin-=0V, Vin+ ≥1Vdc, Vo=30V -- 0.1 -- nA Input Differential Voltage V ID All Vin ≥ 0Vdc,TLOW ≤Ta≤THIGH -- -- V CC V Supply Current I cc R L = ∞ (for all comparators) -- 0.8 2.0 mA

TS339 3-6 2003/12 rev. A Electrical Characteristics (Continues) Note 1. The maximum output current may be as high as 20mA, independent of the magnitude of V CC Output short circuits to VCC can cause excessive heating and eventual destruction. Note 2. This magnitude of input current will only occur if the leads are driven more negative than ground or the negative supply voltage. This is due to the input PNP collector base junction become forward biased, acting as an input clamp diode. There is also a lateral PNP parasitic transistor action which can cause the output voltage of the comparators to go to the V CC voltage level (or ground if overdrive is large) during the time that an input is driven negative. This will not destroy the device when limited to the max rating and normal output states will recover when the inputs become ≥ground or negative supply. Note 3. At the output switch point, V O=1.4Vdc, R S ≤100Ω, 5.0Vdc ≤ V CC ≤30Vdc, with the inputs over the full common-mode range (0Vdc to VCC -1.5Vdc). Note 4. The bias current flows out of the inputs due to the PNP input stage. This current is virtually constant, independent of the output state. Note 5. The response time specified is for a 100mV input step with 5mV overdrive For larger signals, 300ns is typical. Note 6. Positive excursions of input voltage may exceed the power supply level. As long as one of the inputs remain within the common-mode range, the comparator will provide the proper output state. Note 7. The comparator will inhibit proper output st ate if one of the inputs is become greater than V CC, the other input must remain within the common mode range. The low input state must not be less than -0.3volts of ground of minus supply.

TS339 4-6 2003/12 rev. A Applications Information This quad comparator feature high gain, wide bandwidth characteristics. This gives the device oscillation tendencies if the outputs are capacitive coupled to the inputs via stray capacitance. This oscillation manifests itself during output transitions (V OL to V OH). To alleviate this situation input resistors<10K Ω should be used. The addition of positive feedback (<10 mV) is also recommended. It is good design practice to ground all unused pins. Differential input voltages may be larger than supply voltage without damaging the comparator's inputs. Voltages more negative than -0.3V should not be used.

TS339 5-6 2003/12 rev. A Electrical Characteristics Curve

TS339 6-6 2003/12 rev. A SOP-14 Mechanical Drawing C K P A D G 14 8 B R M F SOP-14 DIMENSION MILLIMETERS INCHES DIM MIN MAX MIN MAX A 8.55 8.75 0.337 0.344 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019 F 0.40 1.25 0.016 0.049 G 1.27 (typ) 0.05 (typ) K 0.10 0.25 0.004 0.009 M 0 o 7 o 0 o 7 o P 5.80 6.20 0.229 0.244 R 0.25 0.50 0.010 0.019 DIP-14 Mechanical Drawing G K D C A B L M J SOP-14 DIMENSION MILLIMETERS INCHES DIM MIN MAX MIN MAX A 18.55 19.56 0.730 0.770 B 6.22 6.48 0.245 0.255 C 3.18 4.45 0.125 0.135 D 0.35 0.55 0.019 0.020 G 2.54 (typ) 0.10 (typ) J 0.29 0.31 0.011 0.012 K 3.25 3.35 0.128 0.132 L 7.75 8.00 0.305 0.315 M - 10 o - 10 o