TS3300 TOUCHSTONE | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 14

Technical content

© 2013 Touchstone Semiconductor, Inc. All rights reserved.

FEATURES

/g141 Combines Low-power Boost + Low Dropout Linear Regulator (LDO) /g141 Boost Regulator /g120 Input Voltage: 0.6V- 4.5V /g120 Output Voltage: 1.8V- 5.25V /g120 Efficiency: Up to 84% /g120 No-Load Supply Current: 3.5µA /g120 Delivers >100mA at 1.8V BO from 1.2V BI /g120 Shutdown Control /g141 Anti-Crush Capability /g120 Prevents Input Voltage Collapse when powered with Weak/High Impedance power Sources /g141 Single-Inductor, Discontinuous Conduction Mode Scheme with Automatic Peak Current Adjustment /g141 LDO /g120 Adjustable LDO Output Voltage: 1.8V- 5V /g120 Dropout Voltage: 255mV @ 100mA /g141 16-Pin, Low-Profile, Thermally-Enhanced 3mm x 3mm TQFN Package

APPLICATIONS

Coin Cell-Powered Portable Equipment Single Cell Li-ion or Alkaline Powered Equipment Solar or Mechanical Energy Harvesting Wireless Microphones Wireless Remote Sensors RFID Tags Blood Glucose Meters Personal Health-Monitoring Devices

DESCRIPTION

The TS3300 is a 1st-generation Touchstone Semi power management product that combines a high-efficiency boost regulator and a low dropout linear regulator (LDO) in one package. The boost regulator operates from a supply voltage as low as 0.6V and can deliver at least 75mA at 1.2V BI to 3V BO , an industry first. The TS3300 LDO’s input is connected to the output of the boost regulator, serving as a post-regulator for the boost, enabling a number of useful functions such as a buck-boost function. In power harvesting or peak load buffering applications, the LDO may post-regulate voltage buffered in a large capacitor or supercapacitor at boost’s output. Finally, the LDO may be operated simply as an on/off load switch. The LDO can delive r up to 100mA output current at a dropout voltage of 255mV and reduce the ripple voltage out of the boos t regulator by a factor of 3. The TS3300 ’s boost section includes an anti-crush TM feature to prevent the collapse of the input voltage to the boost regulator when the input is a weak (high impedance) source. If the input voltage drops below a determined voltage threshold (settable by a resistor divider), the boost regulator switching cycles are paused, effectively limiting the minimum input voltage. Anti-crush TM is useful in applications where a buffer capacitor at the boost’s output can service burst loads, and the input source exhibits substant ial source impedance (such as with an old battery, or at cold temperatures). The TS3300 is fully specified over the -40°C to +85° C temperature range and is available in a low-profile, thermally-enhanced 16-pin 3x3mm TQFN package with an exposed back-side paddle. TYPICAL APPLICATION CIRCUIT The Touchstone Semiconductor logo and “NanoWatt Analog” are registered trademarks of Touchstone Semiconductor, Incorporated. IBO - mA EFFICIENCY - % 0.1 Boost Regulator Efficiency vs Load Current 0.01 1 10 100 1.2V BI to 1.8V BO 1.2V BI to 3V BO 80 90 100 L: LPS4018 -103ML

Continuous Power Dissipation (T A = +70°C) Electrical and thermal s tresses beyond those listed under “Absolute Maximum Ratings” may c ause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to any absolute maximum rating conditions for extended periods may affect device reliability and lifetime. PACKAGE/ORDERING INFORMATION ORDER NUMBER PART MARKING CARRIER QUANTITY TS3300 ITQ16 33TP 3300I Tape & Reel ----- TS3300 ITQ16 33T Tape & Reel 3000 Lead-free Program: Touchstone Semiconductor supplies only lead-free packaging. Consult Touchstone Semiconductor for products specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS

VBI = 1.2V, V BO = 3V, VBEN തതതതതതത = LOW, I BO = 20mA, L = 10µH, C BO = 22µF unless otherwise noted. Values are at T A = 25°C unless otherwise noted. See Note 1. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS BOOST REGULATOR Minimum Input Boost Voltage VBI_MIN IBO = 0mA. T A=25ºC 0.6 0.75 V Maximum Input Boost Voltage VBI_MAX Guaranteed by design 4.5 V Output Boost Voltage Range VBO 1.8 5.25 V Current Measured at BO IB_Q IBO = 0mA, VBO FB = 0.6V TA =25°C 3.5 µA Current M easured at B I 0.07 µA Current Measured at BO IBO = 0mA, VBO FB = 0.6V -40°C < T A < + 85°C 6 µA Current Measured at BI 0.9 µA Efficiency Eff VBI = 1.2V, VBO =1.8, I BO =30mA 84 % Boost Shutdown Supply Current ISHUTDOWN Measured at BI. V BEN തതതതതതത = V BI VBEN തതതതതതത = 0V TA =25°C 100 nA Boost Feedback Voltage during operation VBO FB Output voltage accuracy: ± 4% 0.489 0.505 0.521 V Boost Feedback Pin Current IBO FB ±0.1 ±1 nA Anti-Crush Feedback Voltage VBI FB VBI ≥ 0.6V 0.363 0.392 0.425 V Anti-Crush Feedback Voltage Hysteresis VBI FB_HYST 50 mV Boost Enable Threshold VBEN തതതതതതത VIL 0.2 V VIH VBI -0.05 V Boost Enable Hysteresis VBEN തതതതതത_HYST 200 mV Inductor Peak Current IPK No Load 365 mA Inductor Valley Current IV 10 mA N-channel ON Resistance Rds N-CH 0.27 Ω P-channel ON Resistance Rds P-CH 0.48 Ω

VREGIN = VBO = 3V, V REGOUT = 1.8V, VREG EN = HIGH, I REGOUT = 20mA, CREGOUT = 10µF unless otherwise noted. Values are at T A = 25°C unless otherwise noted. See Note 1. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS LINEAR REGULATOR DC Output A ccuracy V REGOUT

2.3 V ≤ V REGIN ≤ 5V

0mA ≤ I REGOUT ≤ 20mA VREG FB = 505mV 2.5 % -40ºC ≤ T A ≤ 85ºC -3.5 3.5 % Input Voltage Range VREGIN Guaranteed by design 1.8 5.25 V Output Voltage Range VREGOUT 1.8 5 V Input Supply Current IREGIN IREGOUT = 0mA, V REG EN = V REGIN 0.4 1 µA Line Regulation ΔVREGOUT / ΔVREGIN VREGOUT +0.5V ≤ V REGIN ≤ 5V -1 1 % Load Regulation ΔVREGOUT / ΔIREGOUT 10mA ≤ I REGOUT ≤ 20mA -1 1 % 0mA ≤ I REGOUT ≤ 20mA -1.5 1.5 % Drop Out Voltage VDO 40 mV Output Current Limit ICL 150 mA Power Supply Rejection Ratio PSRR CREGOUT = 22µF IREGOUT = 100mA f = 10Hz -70 dB f = 100Hz -50 dB f = 1kHz -36 dB Startup Time tSTR 1 ms Linear Regulator Enable Voltage VREG EN VIL (CMOS logic) 0.2 x VREGIN V VIH (CMOS logic) 0.8 xVREGIN V Linear Regulator Enable Hysteresis VREG EN _HYST 100 mV Enable Pin Current IREG EN 10 nA SWITCH Rds ON R SW VSW EN = HIGH. Measured from REGIN to REGOUT 0.9 1.2 Ω SWITCH Enable Voltage VSW EN VIL (CMOS logic) 0.2 x V REGIN V VIH (CMOS logic) 0.8 xV REGIN V Regulator Feedback Pin Current IREG FB ±0.1 ±1 nA Note 1: All devices are 100% production tested at T A = +25°C and are guaranteed by characterization for T A = T MIN to T MAX , as specified.

EFFICIENCY - % 0.1 Boost Regulator Efficiency vs Load Current 0.01 1 10 100 IREGOUT - mA PERCENT DEVIATION - % +0.4 -0.8 LDO Output Voltage Accuracy vs Load Current -0.2 25 50 0 75 100 150 VBI - V IBO - mA 120 Boost Regulator Maximum Output Current vs V BI ( for V BO to drop 2.5%) 0.5 1.5 180 2 2.5 240 300 TYPICAL PERFORMANCE CHARACTERISTICS VBI = 1.2V, VBO = 3V, VBEN തതതതതത = LOW, I BO = 0A, L = 10µH (LPS4018-103ML), CBO = 22µF, C BI = 22µF, V REGIN = V BO = 3V, V REGOUT = 1.8V, IREGOUT = 0A, C REGOUT = 10µF unless otherwise noted. Values are at TA = 25°C unless otherwise noted. -1.4 -2.6 -3.2 -3.8 125 1.2V BI to 1.8V BO 1.2V BI to 3V BO VBO =1.8V VBO =3V 100 L: LPS4018 -103ML IREGOUT - mA DROPOUT VOLTAGE - V LDO Dropout Voltage vs Load Current 0.6 0.4 0.2 25 50 0 75 100 40 ºC +85 ºC +25 ºC VREGOUT set to 1.8V IREGOUT - mA DROPOUT VOLTAGE - V LDO Dropout Voltage vs Load Current 0.15 0.1 0.05 25 50 0 75 100 -40 ºC +85 ºC +25 ºC VREGOUT set to 3V 0.2 IBO - mA INDUCTOR PEAK CURRENT - A 25 50 0.2 Inductor Peak Current vs Load Curre nt 0 75 0.4 0.5 0.3 100 0.6 0.8 0.9 0.7 1.2V BI to 1.8V BO 1.2V BI to 3V BO 1.1

TYPICAL PERFORMANCE CHARACTERISTICS VBI = 1.2V, VBO = 3V, VBEN തതതതതത = LOW, IBO = 0A, L = 10µH (LPS4018-103ML), CBO = 22µF, C BI = 22µF, V REGIN = V BO = 3V, V REGOUT = 1.8V, IREGOUT = 0A, C REGOUT = 10µF unless otherwise noted. Values are at TA = 25°C unless otherwise noted. VBO – 50mV/DIV 50µs/DIV Boost Regulator Output Voltage Ripple VBI = 1.2V, VBO = 1.8V, CBO = 22µF, IBO = 80mA 50µs/DIV VBO – 50mV/DIV Boost Regulator Output Voltage Ripple VBI = 1.2V, VBO = 1.8V, CBO = 22µF, IBO = 40mA 20µs/DIV VBO – 50mV/DIV Boost Regulator Output Voltage Ripple VBI = 1.2V, V BO = 1.8V, CBO = 22µF, IBO = 5mA SOURCE RESISTANCE - Ω START -UP VOLTAGE - V 5 10 0.5 Boost Minimum Start -Up Voltage vs Source Resistance 0 15 0.7 0.8 0.6 20 25 0.9 1.1 1.2 -40 ºC +85 ºC +25 ºC L: 10 µH (LPS4018 -103ML) IBO - mA START -UP VOLTAGE - V 3 6 0. 8 Boost Minimum Start -Up Voltage vs Load Current 0 9 1.2 1.4 12 15 1.6 1.8 L: 22 µH (LPS4018 -223ML) Boost Regulator Output Voltage Ripple VBI = 1.2V, V BO = 3V, CBO = 22µF, IBO = 5mA 50µs/DIV VBO – 50mV/DIV

TYPICAL PERFORMANCE CHARACTERISTICS VBI = 1.2V, VBO = 3V, VBEN തതതതതത = LOW, I BO = 0A, L = 10µH (LPS4018-103ML), CBO = 22µF, C BI = 22µF, V REGIN = V BO = 3V, V REGOUT = 1.8V, IREGOUT = 0A, C REGOUT = 10µF unless otherwise noted. Values are at TA = 25°C unless otherwise noted. VBO 100mV/DIV 200µs/DIV Boost Regulator Load Step Response VBI = 1.2V, VBO = 3V, CBO = 10µF, IBO = 5mA Boost Regulator Load Step Response VBI = 1.2V, VBO = 3V, CBO = 10µF, IBO = 40mA 200µs/DIV LDO Load Step Response VBI = 1.2V, VBO = 3V, CREGOUT = 10µF, IBO = 5mA 200µs/DIV IBO 4.17mA/DIV VBO 100mV/DIV IBO 33mA/DIV VREGOUT 100mV/DIV IREGOUT 4.17mA/DIV Boost Regulator Output Voltage Ripple VBI = 1.2V, VBO = 3V, CBO = 22µF, IBO = 80mA 50µs/DIV VBO – 50mV/DIV 2µs/DIV Boost Regulator Output Voltage Ripple, Inductor Current, and LSW Voltage VBI = 1.2V, VBO = 1.8V, CBO = 22µF, IBO = 5mA VBO 50mV/DIV VLSW 1V/DIV IL 100mA/DIV L: LPS4018 -103ML LDO Load Step Response VBI = 1.2V, VBO = 3V, CREGOUT = 10µF, IBO = 40mA 200µs/DIV VREGOUT 100mV/DIV IREGOUT 33mA/DIV

TYPICAL PERFORMANCE CHARACTERISTICS VBI = 1.2V, VBO = 3V, VBEN തതതതതത = LOW, I BO = 0A, L = 10µH (LPS4018-103ML), CBO = 22µF, C BI = 22µF, V REGIN = V BO = 3V, V REGOUT = 1.8V, IREGOUT = 0A, C REGOUT = 10µF unless otherwise noted. Values are at TA = 25°C unless otherwise noted. 2µs/DIV Boost Regulator Output Voltage Ripple, Inductor Current, and LSW Voltage VBI = 1.2V, VBO = 3V, CBO = 22µF, IBO = 40mA VBO 50mV/DIV VLSW 1V/DIV IL 500mA/DIV L: LPS4018 -103ML 10 0ms/DIV Large Output Capacitor Start -up with Anti -Crush at 0.9V VBI =1.2V, ESR of V BI =10 Ω, VBO =VREGIN =3V, V REGOUT =1.8V, CBO =500µF, CREGOUT =10µF BO 1V/DIV REGOUT 1V/DIV IBI 50mA/DIV

1 BIN Boost Input. Bypass this pin with a 22µF ceramic capacitor in close proximity to the TS3300. 2 CCP Charge Pump Capacitor. Place a 3.3nF capacitor between this pin and GND 3 BEN തതതതതത Boost Enable (active low). To enable the TS3300, connect this to GND. To disable the TS3300, set the voltage to greater than VBI – 50mV.

4 BI FB

Boost Input Feedback for Anti-Crush Voltage Setting. The BI FB pin voltage is 392 mV. To set the anti-crush voltage, refer to the Applications Information section and to Figure 7. 5 FAC Factory use only. Do not connect to GND or VDD. Leave open.

6 SW EN

Switch Enable. When SW EN is high and REG EN is low, the internal FET/SWITCH connects the LDO output to the LDO input . The internal FET has an Rds ON = 1.2Ω. Refer to Table 1. 7 REG EN LDO Regulator Enable. When REG EN is high and SW EN is low, the LDO is under normal operation. Refer to Table 1.

8 REG FB

LDO Regulator Output Feedback. The REG FB pin voltage is 505mV. REG FB coupled with a voltage divider circuit sets the LDO output voltage. Refer to Figure 3. 9 GND Ground. Connect this pin to the analog ground plane

10 REGOUT

LDO Regulator Output Voltage. A minimum output capacitance of 10µF is recommended to be placed from this pin to GND. To set the LDO output voltage, use a voltage divider circuit along with the REG FB pin as shown in Figure 3.

11 REGIN

LDO Regulator Input/Boost Output. REGIN should always be connected to the boost r egulator output voltage pin BO. BO is always the input to the LDO. Do not apply an external supply voltage to this pin. 12 GND Ground. Connect this pin to the analog ground plane.

13 BO FB

Boost Output Feedback. The BO FB pin voltage is 505mV. BO FB coupled with a voltage divider circuit sets the boost regulator output voltage. Refer to Figure 2. 14 BO Boost Regulator Output Voltage. A minimum output capacitance of 10µF is recommended to be placed from this pin to GND. To set the boost regulator output voltage, use a voltage divider circuit along with the BO FB pin. Refer to Figure 2.

15 LSW

Coil is a low-ESR, high-saturation current, shielded inductor. A 10µH inductor is recommended for most applications and is to be placed from this pin to the input of the boost regulator BI. Furthermore, there should exist at least an 8% margin between the saturation current of the inductor and the peak inductor current for a given set of operating conditions. 16 GND Ground. Connect this pin to the analog ground plane. EP െ For best electrical and thermal performance, connect exposed paddle to GND.

The TS3300 is a power management product that combines a high-efficiency boost regulator and a linear regulator into one package. It is the industr y’s 1st boost regulator + linear regulator where the boost regulator can operate from supply voltages as low a s 0.6V and can deliver at least 75mA at 1.2V BI and 3V BO . Under no-load conditions, the boost regulator idles at 3.5µA. The internal, low-dropout linear regulator is driven by the output of the boost regulator. It can deliver up to 100mA output current at a dropout voltage of 255mV and reduce the ripple voltage out of the boost regulator by a factor of 3. BOOST REGULATOR At start-up, an internal low voltage oscillator in the start-up control circuitry drives the gate of the int ernal FET to charge the load capacitor. Once the output voltage reaches approximately 1.1V, the main contro l circuitry starts to operate. With an adjustable peak inductor current, the TS3300 can provide up to 84% efficiency with a 1.2V BI and 3VBO . Refer to Figure 1. The input and output supply voltage range for the boost regulator is from 0.6V to 4.5V and 1.8V to 5.25V, respectively. Figure 1: 1.2V Input to 3V Boost Regulator Output Voltage and to 1.8V LDO Output Voltage Circuit boost regulator by a factor of 3.

BO when SW EN = low and REG EN = high. be placed as close as possible to the BI and BO pin . with X5R dielectric are recommended. placed as close as possible to the REG OUT pin. effectively limiting the minimum input voltage. Table 1. LDO REG EN and SW EN Settings Table 2. Inductor and Capacitor

Page 14 Touchstone Semiconductor, Inc. TS3300DS r1p0

630 Alder Drive, Milpitas, CA 95035 RTFDS

+1 (408) 215 - 1220 ▪ www.touchstonesemi.com PACKAGE OUTLINE DRAWING Information furnished by Touchstone Semiconductor i s believed to be accurate and reliable. However, To uchstone Semiconductor does not assume any re sponsibility for its use nor for any infringements of patents or other rights of third parties that may result from its use , and all information provided by Touchstone Semiconductor an d its suppliers is provided on an AS IS basis, WITH OUT WARRANTY OF ANY KIND. Touchstone Semiconductor reserves the right to chan ge product specifications and product descriptions at any time with out any advance notice. No license is granted by implication or oth erwise under any patent or patent rights of Touchst one Semiconductor. Touchstone Semiconductor assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using Touchstone Semiconductor componen ts. To minimize the risk associated with customer pr oducts and applications, customers should provide adequate design and operat ing safeguards. Trademarks and registered trademark s are the property of their respective owners. 3.00 ± 0.05 3.00 ± 0.05 Pin 1 Indicator 0.25 ± 0.05 0.25 Ref. 0.0 – 0.05 0.75 ± 0.05 0.10 Ref. Detail A 0.10 Ref. 0.0 – 0.05 0.203 Ref. Terminal Thickness Note: 1. All Dimensions are in mm

2 Compliant with JEDEC MO-220

Detail A : Terminal thickness for reference only no measurement purpose 1.80 ± 0.05 1.80 ± 0.05 1.50 Ref. CO.25 Dap Size 2x2 1.50 Ref. 0.50 Ref. 0.35 ± 0.05 16 -Pin TQFN33 Package Outline Drawing (N .B., Drawings are not to scale)