TS30023

TS30021 ETC2 | Alldatasheet

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TRIUNE SYSTEMS PROPRIETARY & CONFIDENTIAL INFORMATION - 1 - TS30021/22/23 Version 1.5 Specifications subject to change WWW.TRIUNESYSTEMS.COM Copyright © 2013, Triune Systems, LLC TS30021/22/23 VCC EN PGND GND PG BST VSW FBSW FBLDO VOLDO Lout Cout VOUT CBST VOUT_LDO Cout_LDO PG RTOP RBOT (Optional) 10kW VOUT Adjustable Switcher Output VCC Cbypass EN RTOPSW RBOTSW VLDOVLDO Cbypass-LDO TS30021/22/23 VCC EN PGND GND PG BST VSW FBSW FBLDO VOLDO VCC Cbypass EN Lout Cout VOUT CBST VOUT_LDO Cout_LDO PG RTOP RBOT (Optional) 10kW VOUT Fixed Switcher Output VLDOVLDO Cbypass-LDO The TS30 021 (1A), TS30022 (2A) and TS30023 (3A) are DC/DC synchronous switching regulator with fully integrated power switches, internal compensation, and full fault protection , with a low - dropout regulator. The switching frequency of 2MHz enables the use of small filter components resulting in minimal board space and reduced BOM costs. In addition, a 470mA LDO with external voltage adjustment is provided. The LDO is capable of working at the VCC supply. The TS300 21/22/23 utilizes current mode feedback in normal regulation PWM mode. When the regulator is disabled (EN is low), the device draws less than 10uA quiescent current. The TS300 21/22/23 integrates a wid e range of protection circuitry including input supply under - voltage lockout, output voltage soft start, current limit, and thermal shutdown. The TS300 21/22/23 includes supervisory reporting through the PG (Power Good) open drain output to interface other components in the system.

APPLICATIONS

 On-card switching regulators  Set-top box, DVD, LCD, LED supply  Industrial power supplies  Fixed output voltage choices: 1.5V, 1.8V, 2.5V, 3.3V, and 5V with +/- 2% output tolerance  Adjustable version output voltage range: 0.8V to 5V with +/- 1.5% reference  Wide input voltage range TS30021/22/23: 4.5V to 16V (18V Abs Max)  2MHz +/- 10% fixed switching frequency  Continuous output current: 1A (TS30021), 2A (TS30022) and 3A (TS30023)  High efficiency – up to 95%  Current mode PWM control with PFM mode for improved light load efficiency  Voltage supervisor for VOUT reported at the PG pin  Input supply under voltage lockout  Soft start for controlled startup with no overshoot  Full protection for over-current, over-temperature, and VOUT over-voltage  Less than 10uA in shutdown mode  Low external component count  LDO has adjustable output voltage 0.8V to 5V and 470mA output current capability SUMMARY SPECIFICATION  Junction operating temperature -40 °C to 125 °C  Packaged in a 16pin QFN (3x3) High Efficiency 1A/2A/3A Current-Mode Synchronous Buck DC/DC Converter, 2MHz and 470mA LDO DESCRIPTION FEATURES TYPICAL APPLICATIONS

TRIUNE SYSTEMS PROPRIETARY & CONFIDENTIAL INFORMATION - 2 - TS30021/22/23 Version 1.5 Specifications subject to change WWW.TRIUNESYSTEMS.COM Copyright © 2013, Triune Systems, LLC PINOUT VCC VCC GND VSW VLDO BST /EN VSW PGND PGND VSW VSW VOLDO FBLDO FB PG TS30021/22/23 PIN 1 Figure 1: 16 Lead 3x3 QFN, Top View PIN DESCRIPTION FOR 16 LEAD 3X3 QFN Pin Symbol Pin # Function Description VSW 1 Switching Voltage Node Connected to 1.5uH (typical) inductor VCC 2 Input Voltage Input voltage VCC 3 Input Voltage Input voltage GND 4 GND Primary ground for the majority of the device except the low-side power FET FB 5 Feedback Input for Switcher Switching Regulator FB Voltage. Connects to VOUT for fixed mode and the output resistor divider for adjustable mode FBLDO 6 Feedback Input for LDO LDO Regulator FB Voltage. Connects to output resistor divider to adjust LDO voltage VOLDO 7 LDO Output LDO regulator output PG 8 PG Output Open-drain output EN 9 Enable Input Active high enable pin. Includes internal pull-up. BST 10 Bootstrap Capacitor Bootstrap capacitor for the high-side FET gate driver. 22nF ceramic capacitor from BST pin to VSW pin VLDO 11 LDO Input Voltage Input Voltage for LDO regulator VSW 12 Switching Voltage Node Connected to 1.5uH (typical) inductor VSW 13 Switching Voltage Node Connected to 1.5uH (typical) inductor PGND 14 Power GND GND supply for internal low-side FET/integrated diode PGND 15 Power GND GND supply for internal low-side FET/integrated diode VSW 16 Switching Voltage Node Connected to 1.5uH (typical) inductor

TRIUNE SYSTEMS PROPRIETARY & CONFIDENTIAL INFORMATION - 4 - TS30021/22/23 Version 1.5 Specifications subject to change WWW.TRIUNESYSTEMS.COM Copyright © 2013, Triune Systems, LLC ABSOLUTE MAXIMUM RATINGS Over operating free–air temperature range unless otherwise noted(1, 2) Parameter Value Unit VCC, VLDO -0.3 to 18 V BST -0.3 to (VCC+6) V VSW -1 to 18 V EN, PG,FB, FBLDO, VOLDO -0.3 to 6 V Electrostatic Discharge – Human Body Model +/-2k V Electrostatic Discharge – Charge Device Model +/-500 V Lead Temperature (soldering, 10 seconds) 260 C (1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied . Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to network ground terminal. THERMAL CHARACTERISTICS Symbol Parameter Value Unit JA Thermal Resistance Junction to Air (Note 1) 38 °C/W TSTG Storage Temperature Range -65 to 150 °C TJ MAX Maximum Junction Temperature 150 °C TJ Operating Junction Temperature Range -40 to 125 °C Note 1: Assumes 16LD 3x3 QFN with hi-K JEDEC board and 13.5 inch2 of 1 oz Cu RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Typ Max Unit VCC Input Operating Voltage 4.5 12 16 V VLDO LDO Input Operating Voltage 2.2 16 V CBST Bootstrap Capacitor 17.6 22 26.4 nF LOUT Output Filter Inductor Typical Value (Note 1) 1.2 1.5 1.8 uH COUT Output Filter Capacitor Typical Value (Note 2) 17.6 22 uF COUT_LDO LDO Output Filter Capacitor Typical Value (Note 2) 1 uF COUT-ESR Output Filter Capacitor ESR 2 100 mW CBYPASS Input Supply Bypass Capacitor Typical Value (Note 3) 8 10 uF CBYPASS-LDO LDO Input Supply Bypass Capacitor Typical Value (Note 3) 8 10 uF Note 1: For best performance, an inductor with a saturation current rating higher than the maximum VOUT load requirement plus the inductor current ripple. Note 2: For best performance, a low ESR ceramic capacitor should be used. Note 3: For best performance, a low ESR ceramic capacitor should be used. If CBYPASS is not a low ESR ceramic capacitor, a 0.1uF ceramic capacitor should be added in parallel to CBYPASS.

ELECTRICAL CHARACTERISTICS

Electrical Characteristics, TJ = -40C to 125C, VCC = 12V (unless otherwise noted) Symbol Parameter Condition Min Typ Max Unit VCC Supply Voltage VCC Input Supply Voltage 4.5 16 V ICC-NORM Quiescent current Normal Mode VCC = 12V, ILOAD = 0A 5.2 mA ICC-NOSWITCH Quiescent current Normal Mode – Non-switching VCC=12V, ILOAD=0A, Non-switching 2.3 mA ICC-STBY Quiescent current Standby Mode VCC = 12V, EN = 0V 5 10 uA VCC Under Voltage Lockout VCC-UV Input Supply Under Voltage Threshold VCC Increasing 4.0 4.5 V VCC-UV_HYST Input Supply Under Voltage Threshold Hysteresis 650 mV OSC FOSC Oscillator Frequency 1.8 2 2.2 MHz PG Open Drain Output TPG PG Release Timer PG de-assert from low to high 150 ms IOH-PG High-Level Output Leakage VPG = 5V 0.5 uA VOL-PG Low-Level Output Voltage IPG = -0.3mA 0.01 V EN Input Voltage Thresholds VIH-EN High Level Input Voltage 2.2 V VIL-EN Low Level Input Voltage 0.8 V VHYST-EN Input Hysteresis 480 mV IIN-EN Input Leakage VEN=5V 3.5 uA VEN=0V 8.0 uA Thermal Shutdown TSD Thermal Shutdown Junction Temperature Note: not tested in production 150 170 °C TSDHYST TSD Hysteresis Note: not tested in production 10 °C

TRIUNE SYSTEMS PROPRIETARY & CONFIDENTIAL INFORMATION - 6 - TS30021/22/23 Version 1.5 Specifications subject to change WWW.TRIUNESYSTEMS.COM Copyright © 2013, Triune Systems, LLC REGULATOR CHARACTERISTICS Electrical Characteristics, TJ = -40C to 125C, VCC = 12V (unless otherwise noted) Symbol Parameter Condition Min Typ Max Unit Switch Mode Regulator: L=1.5uH and C=22uF VOUT-PWM Output Voltage Tolerance in PWM Mode ILOAD =1A VOUT – 2% VOUT VOUT + 2% V VOUT-PFM Output Voltage Tolerance in PFM Mode ILOAD = 0A VOUT – VOUT + VOUT + 3.5% V RDSON High Side Switch On Resistance IVSW = -1A (Note 1) 180 mΩ Low Side Switch On Resistance IVSW = 1A (Note 1) 120 mΩ IOUT,SW Output Current, Switcher TS30023 (Note 4) 3 A TS30012 (Note 4) 2 A TS30011 1 A IOCD,SW Over Current Detect, Switcher HS switch current TS30023 3.4 3.8 4.4 A HS switch current TS30012 2.4 2.8 3.4 A HS switch current TS30011 1.4 1.8 2.4 A FBTH, SW Feedback Reference, Switcher (Adjustable Mode) (Note 3) 0.8 V FBTH-TOL Feedback Reference Tolerance (Note 3) -1.5 1.5 % TSS Soft start Ramp Time 4 ms FBTH-PFM PFM Mode FB Comparator Threshold VOUT + V VOUT-UV VOUT Under Voltage Threshold 91% VOUT 93% VOUT 95% VOUT VOUT-UV_HYST VOUT Under Voltage Hysteresis 1.5% VOUT VOUT-OV VOUT Over Voltage Threshold 103% VOUT VOUT-OV_HYST VOUT Over Voltage Hysteresis 1% VOUT DUTYMAX Max Duty Cycle (Note 2) 95% 97% 99% LDO Regulator VODROPOUT Dropout Voltage, LDO VOLDO = 1.2V, IOUT,LDO = 450mA 0.8 V VOLDO Output Voltage, LDO 0.8 VLDO - VODROP OUT V IOUT,LDO Output Current, LDO 470 mA IOCD,LDO Over Current Detect, Switcher 490 mA FBTHLDO Feedback Reference, LDO 0.8 V Note 1: RDSON is characterized at 1A and tested at lower current in production. Note 2: Regulator VSW pin is forced off for 240ns every 8 cycles to ensure the BST cap is replenished. Note 3: For the adjustable version, the ratio of VCC/Vout cannot exceed 16. Note 4: Based on Over Current Detect testing

TRIUNE SYSTEMS PROPRIETARY & CONFIDENTIAL INFORMATION - 7 - TS30021/22/23 Version 1.5 Specifications subject to change WWW.TRIUNESYSTEMS.COM Copyright © 2013, Triune Systems, LLC FUNCTIONAL DESCRIPTION The TS30021/22/23 current-mode synchronous step-down power supply product is ideal for use in the commercial, industrial, and automotive market segments. It includes flexibility to be used for a wide range of output voltage and is optimized for high efficiency power conversion with low RDSON integrated synchronous switches. A 2MHz internal switching frequency facilitates low cost LC filter combinations. Additionally, the fixed output versions enable a minimum external component count to provide a complete regulation solution with only 4 external components: an input bypass capacitor, an inductor, an output capacitor, and the bootstrap capacitor. The regulator automatically transitions between PFM and PWM mode to maximize efficiency for the load demand. In addition , the TS30021/22/23 provides a linear low drop -out regulator capable of operating over a wide range of output voltage, input voltage and output current. LDO operation only requires 4 external components: an input bypass capacitor, an output capacitor and two resistors to set output voltage. It features a separate input supply pin that is r egulated down to the output voltage. This supply input can be connected to the main SMPS supply (VCC) or the SMPS output (VOUT) or to a separate supply thus making the device very flexible. The TS30021/22/23 was designed to provide these system benefits:  Reduced board real estate  Lower system cost o Lower cost inductor o Low external parts count  Ease of design o Bill of Materials and suggested board layout provided o Power Good output o Integrated compensation network o Wide input voltage range  Robust solution o Over current, over voltage and over temperature protection DETAILED PIN DESCRIPTION Unregulated input, VCC This terminal is the unregulated input voltage source for the IC. It is recommended that a 10uF bypass capacitor be placed close to the device for best performance. Since this is the main supply for the IC, good layout practices need to be followed for this connection. Bootstrap control, BST This terminal will provide the bootstrap voltage required for the upper internal NMOS switch of the buck regulator. An external ceramic capacitor placed between the BST input terminal and the VSW pin will provide the necessary voltage for the upper switch. In normal operation the capacitor is re-charged on every low side synchronous switching action. In the case of where the switch mode approaches 100% duty cycle for the high side FET, the device will automatically reduce the duty cycle switch to a minimum off time on every 8th cycle to allow this capacitor to re-charge. Sense feedback, FB This is the input terminal for the output voltage feedback. For the fixed mode version s, this should be hooked directly to V OUT. The connection on the PCB should be kept as short as possible, and should be made as close as possible to the capacitor. The trace should not be shared with any other connection. For adjustable mode versions, this should be connected to the external resistor divid er. To choose the resistors, use the following equation: VOUT = 0.8 (1 + RTOPSW/RBOTSW)

TRIUNE SYSTEMS PROPRIETARY & CONFIDENTIAL INFORMATION - 8 - TS30021/22/23 Version 1.5 Specifications subject to change WWW.TRIUNESYSTEMS.COM Copyright © 2013, Triune Systems, LLC The input to the FB pin is high impedance, and input current should be less than 100nA. As a result, good layout practices are required for the feedback resistors and feedback traces. When using the adjustable version, the feedback trace should be kept as short as possible and minimum width to reduce stray capacitance and to reduce the injection of noise. For the adjustable version, the ratio of VCC/Vout cannot exceed 16. Switching output, VSW This is the switching node of the regulator. It should be connected directly to the 1.5uH inductor with a wide, short trace and to one end of the Bootstrap capacitor. It is switching between VCC and PGND at the switching frequency. Ground, GND This ground is used for the majority of the device including the analog reference, control loop, and other circuits. Power Ground, PGND This is a separate ground connection used for the low side sync hronous switch to isolate switching noise from the rest of the device. Enable, high-voltage, EN This is the input terminal to activate both the switching regulator and LDO. T he input threshold is TTL/CMOS compatible. It also has an internal pull-up to ensure a stable state if the pin is disconnected. Option available for sequential power -up of switching regulator first, followed by activating the LDO after switchin g regulator voltage is above VOUT-UV threshold. PG Output, PG This is an open drain , active low output. The switched mode output voltage is monitored and the PG line will remain low until the output voltage reaches the VOUT-UV threshold. Once the internal comparator detects the output voltage is above the desired threshold, an internal delay timer is activated and the PG line is de-asserted to high once this delay timer expires. In the event the output voltage decreases below VOUT-UV, the PG line will be asserted low and remain low until the output rises abov e VOUT-UV and the delay timer times out. See Figure 2 for the circuit schematic for the PG signal. Options are available for PG only based on switcher output voltage, or the combination of both s witcher and LDO outputs being higher than the VOUT-UV thresholds. Unregulated LDO input, VLDO This terminal is the unregulated input voltage source for regulation stage of the LDO . It is recommended that a 10uF bypass capacitor be placed close to the device for best performance. LDO Sense feedback, FBLDO This is the input terminal for the adjustable voltage feedback for the LDO. The following formula determines the output voltage. VOLDO = 0.8 (1 + RTOP/RBOT) The same guidelines as given for the switching regulator FB pin apply to the LDO FB pin as well. Regulated LDO Output, VOLDO This terminal is the output of the LDO and should be connected to a 1uF output capacitor. INTERNAL PROTECTION DETAILS SMPS Internal Current Limit The current through the high side FET is sensed on a cycle by cycle basis and if current l imit is reached, it will abbreviate the cycle. In addition, the device senses the FB pin to identify hard short conditions and will direct the VSW output to skip 4 cycles if current limit o ccurs when FB is low. This allow s current built up in the inductor during the minimum on time to decay sufficiently. Current limit is always active when the regulator is enabled. Soft start ensures current limit does not prevent regulator startup.

TRIUNE SYSTEMS PROPRIETARY & CONFIDENTIAL INFORMATION - 9 - TS30021/22/23 Version 1.5 Specifications subject to change WWW.TRIUNESYSTEMS.COM Copyright © 2013, Triune Systems, LLC Under extended over current conditions (such as a short), the device will automatically disable. Once the over current condition is removed, the device returns to normal operation automatically. (Alternately the factory can configure the devic e’s NVM to shutdown the regulator if an extended over current event is detected and require a toggle of the Enable pin to return the device to normal operation.) Thermal Shutdown If the temperature of the die exceeds 170 °C (typical), the VSW outputs will tri-state to protect the device from damage. The PG and all other protection circuitry will stay active to inform t he system of the failure mode. Once the device cools to 160 °C (typical), the device will start up again, following the normal soft start sequence . If the d evice reaches 170 °C, the shutdown/restart sequence will repeat. SMPS Reference Soft Start The reference in this device is ramped at a rate of 4ms to prevent the output from overshoot during startup. This ramp restarts whenever there is a rising edge sensed on the Enable pin. This occurs in both the fixed and adjustable versions. During the soft start ramp, current limit is still active, and will still protect the device in case of a short on the output. SMPS Output Overvoltage If the output of the regu lator exceeds 103% of the regulation voltage, the VSW outputs will tri-state to protect the device from damage. This check occurs at the start of each switching cycle. If it occurs during the middle of a cycle, the switching for that cycle will complete, and the VSW outputs will tri-state at the beginning of the next cycle. VCC Under-Voltage Lockout The device is held in the off state until VCC reaches 5.75V (typical). There is a 500mV hysteresis on this input , which requires the input to fall below 5.25V (typical) before the device will disable. LDO Internal Current Limit The LDO output current is sensed and if current limit is reached, it will restrict further current draw from the LDO. Current limit is always active when the regulator is enabled.

TRIUNE SYSTEMS PROPRIETARY & CONFIDENTIAL INFORMATION - 13 - TS30021/22/23 Version 1.5 Specifications subject to change WWW.TRIUNESYSTEMS.COM Copyright © 2013, Triune Systems, LLC TYPICAL APPLICATION SCHEMATIC TS30021/22/23 VCC EN PGND GND PG BST VSW FBSW FBLDO VOLDO Lout Cout VOUT CBST VOUT_LDO Cout_LDO PG RTOP RBOT (Optional) 10kW VOUT Adjustable Switcher Output VCC Cbypass EN RTOPSW RBOTSW VLDOVLDO Cbypass-LDO Figure 22: TS30021/22/23 Application Schematic A minimal schematic suitable for most applications is shown on page 1. Figure 22 includes optional components that may be considered to address specific issues as listed in the External Component Selection section. PCB LAYOUT For proper operation and minimum EMI, care must be taken during PCB layout. An improper layout can lead to issues such as poor stability and regulation, noise sensitivity and increased EMI radiation. The main guidelines are the following:  provide low inductive and resistive paths for loops with high di/dt,  provide low capacitive paths with respect to all the other nodes for traces with high di/dt,  sensitive nodes not assigned to power transmission should be referenced to the analog signal ground (GND) and be always separated from the power ground (PGND). The negative ends of C BYPASS, COUT and the Schottky diode D CATCH (optional) should be placed close to each other and connected using a wide trace. Vias must be used to connect the PGND no de to the ground plane. The PGND node must be placed as close as possible to the TS30021/22/23 PGND pins to avoid additional voltage drop in traces. The bypass capacitor C BYPASS (optionally paralleled to a 0.1µF capacitor) must be placed close to the VCC pins of TS30021/22/23. The inductor must be placed close to the VSW pins and connected directly to C OUT in order to minimize the area between the VSW pin, the inductor, the C OUT capacitor and the PGND pins. The trace area and length of the switching nodes VSW and BST should be minimized. For the adjustable output voltage version of the TS30021/22/23, feedback resistors R BOTSW and RTOPSW are required for Vout settings greater than 0.8V and should be placed close to the TS30021/22/23 in order to keep the traces of the sensitive node FB as short as possible and away from switching signals. R BOTSW should be connected to the analog ground pin (GND) directly and should never be connected to the ground plane. The analog ground trace (GND) should be connected in only one point to the power ground (PGND). A good connection point is under the TS30021/22/23 package to the exposed thermal pad and vias which are connected to PGND. RTOPSW will be connected to the VOUT node using a trace that ends close to the actual load.

TRIUNE SYSTEMS PROPRIETARY & CONFIDENTIAL INFORMATION - 14 - TS30021/22/23 Version 1.5 Specifications subject to change WWW.TRIUNESYSTEMS.COM Copyright © 2013, Triune Systems, LLC For fixed output voltage versions of the TS30021/22/23, R BOTSW and R TOPSW are not required and the FB pin should be connected directly to the Vout. PCB layout for the LDO should follow the same approach and guidelines as given above. The exposed ther mal pad must be soldered to the PCB for mechanical reliability and to achieve good power dissipation. Vias must be placed under the pad to transfer the heat to the ground plane. EXTERNAL COMPONENT BILL OF MATERIALS Designator Function Description Suggested Manufacturer Manufacturer Code Qty CBYPASS Input Supply Bypass Capacitor 10uF 10% 35V TDK CGA5L3X5R1V106K160AB 1 CBYPASS-LDO Input Supply Bypass Capacitor 10uF 10% 35V TDK CGA5L3X5R1V106K160AB 1 COUT Output Filter Capacitor 22uF 10% 10V TDK C2012X5R1A226K125AB 1 COUT_LDO LDO Output Filter Capacitor 1uF 1 LOUT Output Filter Inductor (1A) 1.5uH 2A TDK Wurth 1 LOUT Output Filter Inductor (2A) 1.5uH 3A TDK Wurth 1 LOUT Output Filter Inductor (3A) 1.5uH 4.37A TDK Wurth 1 CBST Boost Capacitor 22nF 10V TDK C1005X7R1C223K 1 RTOPSW & RTOP Voltage Feedback Resistor (RTOPSW optional) 17.8K (Note 1) 1 RBOTSW & RBOT Voltage Feedback Resistor (RBOTSW optional) 10K (Note 1) 1 RPLP PG Pin Pull-up Resistor (optional) 10K 1 DCATCH Catch Diode (optional, 1A) 30V 2A SOD-123FL On Semiconductor MBR230LSFT1G 1 DCATCH Catch Diode (optional, 2A) 40V 3A SOD-123 NXP Semiconductors PMEG4030ER,115 1 DCATCH Catch Diode (optional, 3A) 40V 5A SOD-123FL NXP Semiconductors PMEG4050EP,1 1 Note 1: The voltage divider resistor values are calculated for an output voltage of 2.5V. For fixed output versions, the FB pin is connected directly to VOUT. EXTERNAL COMPONENT SELECTION The 2MHz internal switching frequency of the TS30021/22/23 facilitates low cost LC filter combinations. Additionally, the fixed output versions enable a minimum external component count to provide a complete regulation solution with only 4 external components: an input bypass capacitor, an inductor, an output capacitor, and the bootstrap ca pacitor. The internal compensation is optimized for a 22uF output capacitor and a 1.5uH inductor.

TRIUNE SYSTEMS PROPRIETARY & CONFIDENTIAL INFORMATION - 15 - TS30021/22/23 Version 1.5 Specifications subject to change WWW.TRIUNESYSTEMS.COM Copyright © 2013, Triune Systems, LLC For best performance, a low ESR ceramic capacitor should be used for C BYPASS. If C BYPASS is not a low ESR ceramic capacitor, a 0.1uF ceramic capacitor should be added in parallel to CBYPASS. The minimum allowable val ue for the output capacitor is 22 uF. To keep the output ripple low, a low ESR (less than 35mOhm) ceramic is recommended. Multiple capacitors can be paralleled to reduce the ESR. The inductor r ange is 1.5uH +/ -20%. For optimal over -current protection, the inductor should be able to handle up to the regulator current limit without saturation. Otherwise, an inductor with a saturation current rating higher than the maximum IOUT load requirement plus the inductor current ripple should be used. For high current modes, the optional Schottky diode will improve the overall efficiency and reduce the heat. It is up to the user to determine the cost/benefit of adding this additional component in the user ’s application. The diode is typically not needed. For the adjustable output version of the TS30021/22/23, the SMPS output voltage can be adjusted by sizing R TOPSW and RBOTSW feedback resistors. The equation for the output voltage is VOUT = 0.8 (1 + RTOPSW/RBOTSW). For the adjustable version, the ratio of VCC/Vout cannot exceed 16. RPUP is only required when the Power Good signal (PG) is utilized. THERMAL INFORMATION TS30021/22/23 is designed for a maximum operating junction temperature T j of 125°C. The maximum output power is limited by the power losses that can be dissipated over the thermal resistance given by the package and the PCB structures. The PCB must provide heat sinking to keep the TS30021/22/23 cool. The exposed metal on the bottom of t he QFN package must be soldered to a ground plane. This ground should be tied to other copper layers below with thermal vias. Adding more copper to the top and the bottom layers and tying this copper to the internal planes with vias can reduce thermal res istance further. For a hi-K JEDEC board and 13.5 square inch of 1 oz Cu, the thermal resistance from junction to ambient can be reduced to JA = 38°C/W. The power dissipation of other power components (catch diode, inductor) cause additional copper heatin g and can further increase what the TS30021/22/23 sees as ambient temperature.

TRIUNE SYSTEMS PROPRIETARY & CONFIDENTIAL INFORMATION - 16 - TS30021/22/23 Version 1.5 Specifications subject to change WWW.TRIUNESYSTEMS.COM Copyright © 2013, Triune Systems, LLC PACKAGE MECHANICAL DRAWINGS (all dimensions in mm) Units MILLIMETERS Dimensions Limits MIN NOM MAX Number of Pins N 16 Pitch e 0.50 BSC Overall Height A 0.80 0.90 1.00 Standoff A1 0.00 0.02 0.05 Contact Thickness A3 0.20 REF Overall Length D 3.00 BSC Exposed Pad Width E2 1.55 1.70 1.80 Overall Width E 3.00 BSC Exposed Pad Length D2 1.55 1.70 1.80 Contact Width b 0.20 0.25 0.30 Contact Length L 0.20 0.30 0.40 Contact-to-Exposed Pad K 0.20 - - TOP VIEW BOTTOM VIEW EXPOSED PAD

TRIUNE SYSTEMS PROPRIETARY & CONFIDENTIAL INFORMATION - 17 - TS30021/22/23 Version 1.5 Specifications subject to change WWW.TRIUNESYSTEMS.COM Copyright © 2013, Triune Systems, LLC RECOMMEDED PCB LAND PATTERN DIMENSIONS IN MILLIMETERS Units MILLIMETERS Dimension Limits MIN NOM MAX Contact Pitch E 0.50 BSC Optional Center Pad Width W2 - - 1.70 Optional Center Pad Length T2 - - 1.70 Contact Pad Spacing C1 - 3.00 - Contact Pad Spacing C2 - 3.00 - Contact Pad Width (X16) X1 - - 0.35 Contact Pad Length (X16) Y1 - - 0.65 Distance Between Pads G 0.15 - - Notes: Dimensions and tolerances per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact values shown without tolerances. REF: Reference Dimension, usually without tolerance, for information only. PACAKGING INFORMATION Pb-Free (RoHS): The TS30021/22/23 devices are fully compliant for all materials covered by European Union Directive 2002/95/EC, and meet all IPC- 1752 Level 3 materials declaration requirements. MSL, Peak Temp: The TS30021/22/23 family has a Moisture Sensitivity Level (MSL) 1 rating per JEDEC J-STD-020D. These devices also have a Peak Profile Solder Temperature (Tp) of 260°C. RECOMMENDED LAND PATTERN Silk Screen

ORDERING INFORMATION

x Output Current vvv Output Voltage 1 1 Amp 015 1.5 V 2 2 Amp 018 1.8 V 3 3 Amp 025 2.5 V 033 3.3 V 050 5.0 V

000 Adjustable

TRIUNE SYSTEMS PROPRIETARY & CONFIDENTIAL INFORMATION - 19 - TS30021/22/23 Version 1.5 Specifications subject to change WWW.TRIUNESYSTEMS.COM Copyright © 2013, Triune Systems, LLC Legal Notices Information contained in this publication regarding device applications and the like is provided only for your convenience an d may be superseded by updates. It is your responsibility to ensure that your application meets with your s pecifications. “Typical” parameters which may be provided in Triune Systems data sheets and/or specifications can and do vary in different applications and actual performance may vary over time . All operating parameters, including “Typicals” must be validated for your application by your technical experts. TRIUNE SYSTEMS MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDI TION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Triune Systems disclaims all liability arising from this information and its use. Triune System products are not des igned, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Triune Systems product could create a situation where personal injury or de ath may occur. Should the Buyer purchase or use Triune Systems products for any such unintended or unauthorized application, the Buyer shall indemnify and hold Triune Systems, and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unautho rized use, even if such claim alleges that Triune Systems was negligent regarding the design or manufacture of the part. No licenses are conveyed, implicitly or otherwise, under any Triune Systems intellectual property rights. Trademarks All other trademarks mentioned herein are property of their respective companies. © 2013 Triune Systems, LLC. All Rights Reserved.

Summary

High Efficiency 1A/2A/3A Current-Mode Synchronous Buck DC/DC Converter, 2MHz and 470mA LDO

Description

High Efficiency 1A/2A/3A Current-Mode Synchronous Buck DC/DC Converter, 2MHz and 470mA LDO

Source title TS30023 Datasheet(PDF) - List of Unclassifed Manufacturers

Read TS30023 online.