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1.8V, 3.3V, 5V DIN ROUT DOUT RS232 RIN RS232 2 2 2 2 FORCEON FORCEOFF STATUSINVALID Logic Supply 1000 kb/s Copyright © 2016, Texas Instruments Incorporated Product Folder Sample & Buy T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TRS3122E SLLSET7C –MAY 2016–REVISED MAY 2016 TRS3122E1.8VLowPowerDualRS-232Transceiver

1 Features

1• Extended VCC operating nodes: 1.8 V, 3.3 V, or 5.0 V – Unique Tripler Charge Pump Architecture Enables Low VCC of 1.8V While Maintaining Compatibility with 3.3 V and 5 V Supplies

Integrated Level-Shifting Functionality Eliminates the Need for External Power or Additional Level Shifter While Interfacing with Low-Voltage MCUs
Enhanced ESD Protection on RIN Inputs and DOUT Outputs – ±15 kV IEC 61000-4-2 Air-Gap Discharge – ±8 kV IEC 61000-4-2 Contact Discharge – ±15 kV Human-Body Model
Specified 1000-kbps Data Rate
Auto Powerdown Plus Feature
Low 0.5uA Shutdown Supply Current
Meets or Exceeds Compatibility Requirements of RS-232 Interface
For 2.5 V Single Supply Applications, Consider TRS3318E as an Optimized Solution

2 Applications

Remote Radio Unit (RRU)
Base Band Unit (BBU)
Electronic Point of Sale (EPOS)
Diagnostics & Data Transmission
Battery-Powered Equipment

3 Description

The TRS3122E is a two-driver and two-receiver RS- 232 interface device, with split supply pins for mixed- voltage operation. All RS-232 inputs and outputs are protected to ±15 kV using the IEC 61000-4-2 Air-Gap Discharge method, ±8 kV using the IEC 61000-4-2 Contact Discharge method, and ±15 kV using the Human-Body Model. The charge pump requires five small 0.1-μF capacitors for operation from as low as a 1.8-V supply. The TRS3122E is capable of running at data rates up to 1000 kbps, while maintaining RS-232- compatible output levels. The TRS3122E has a unique VL pin that allows operation in mixed-logic voltage systems. Both driver in (DIN) and receiver out (ROUT) logic levels are pin programmable through the VL pin. This eliminates the need for additional voltage level shifter while interfacing with low-voltage microcontrollers or UARTs. Auto Powerdown Plus automatically places the device in a low power mode when the device has not received or transmitted data for more than 30 seconds. This feature makes this device a very attractive option for battery powered or other power- sensitive applications. Device Information(1) PART NUMBER PACKAGE (PINS) BODY SIZE (NOM) TRS3122ERGER RGE (24) 4.00 mm × 4.00 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. Feature Diagram

13 Mechanical, Packaging, and Orderable

4 Revision History

Changes from Revision B (May 2016) to Revision C Page Changes from Revision A (May 2016) to Revision B Page Changes from Original (June 2014) to Revision A Page

(Top View) C2- INVALID FORCEON VL C1- FORCEOFF C1+ VCC GND DOUT1 DOUT2 RIN1 RIN2 C2+ C3- C3+ 23 156 4 1110 1287 9 NC NC DIN1 DIN2 ROUT2 ROUT1 1716 181413 15 2021 192324 22 TRS3122E www.ti.com SLLSET7C –MAY 2016–REVISED MAY 2016 Product Folder Links: TRS3122E Submit Documentation FeedbackCopyright © 2016, Texas Instruments Incorporated

5 Pin Configuration and Functions

NAME NO. C1+, C2+ 21, 22 - Positive terminals of voltage-doubler charge-pump capacitors (required) C3+ 1 - Positive terminal of voltage-tripler charge-pump capacitor (Not needed for VCC 3V to 5.5V) C1–, C2- 16, 23 - Negative terminals of voltage-doubler charge-pump capacitors (required) C3- 2 - Negative terminal of voltage-tripler charge-pump capacitor (Not needed for VCC 3V to 5.5V) V+ 20 - Positive charge pump storage capacitor (required) V– 24 - Negative charge pump storage capacitor (required) GND 17 - Ground VCC 19 - 1.8-V or 3-V to 5-V supply voltage VL 18 - Logic-level supply. All CMOS inputs (DIN) and outputs (ROUT) are referenced to this supply. FORCEOFF 14 I Auto Powerdown Control input (Refer to Truth Table) FORCEON 15 I Auto Powerdown Control input (Refer to Truth Table) INVALID 13 O Invalid Output Pin DIN1, DIN2 10,9 I Driver inputs DOUT1, DOUT2 5, 6 O RS-232 driver outputs RIN1, RIN2 3, 4 I RS-232 receiver inputs ROUT1, ROUT2 12, 11 O Receiver outputs; swing between 0 and VL NC 7, 8 I Factory pins, can be unconnected or connected to GND

SLLSET7C –MAY 2016–REVISED MAY 2016 www.ti.com Product Folder Links: TRS3122E Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated (1) Stresses beyond those listed under “absolute maximum ratings”may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. (2) V+ and V– can have maximum magnitudes of 7 V, but their absolute difference cannot exceed 13 V.

6 Specifications

6.1 Absolute Maximum Ratings(1)

over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Charge pump power supply –0.3 6 V VL Logic power supply –0.3 6 V V+ Positive storage capacitor voltage –0.3 7 V V– Negative storage capacitor voltage 0.3 –7 V V+ + |V–|(2) 13 V VI Input voltage FORCEOFF , FORCEON –0.3 6 V DIN –0.3 VL + 0.3 RIN (0Ω series resistance) ±20 RIN (≥250Ω series resistance) ±25 VO Output voltage DOUT ±13.2 V ROUT –0.3 VL + 0.3 TJ Junction temperature 150 °C Tstg Storage temperature range –65 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) All pins except RS-232 bus ±2000 V RS-232 bus pins ±15000 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) All pins ±500 IEC 61000-4-2 Air-Gap Discharge RS-232 bus pins ±15000 IEC 61000-4-2 Contact Discharge ±8000

6.3 Recommended Operating Conditions

VCC Charge pump power supply Tripler Mode 1.65 1.8 2 V Doubler Mode 3 3.3 3.6 4.5 5 5.5 VL Logic power supply 1.65 VCC V RIN RS-232 Receiver interface -15 15 V DOUT RS-232 Transmitter interface -12 12 V VIL GPIO Input logic threshold low DIN, FORCEOFF, FORCEON VL = 5.0 V 0 1.7 VVL = 3.3V 0 1.1 VL = 1.8 V 0 0.6 VIH GPIO Input logic threshold high DIN, FORCEOFF, FORCEON VL = 5.0V 3.3 VL VVL = 3.3V 2.2 VL VL = 1.8V 1.2 VL VOZ ROUT disabled FORCEOFF = 0V 0 VL V Operating temperature –40 85 °C

6.4 Thermal Characteristics

RθJA Junction-to-ambient thermal resistance 34.2 °C/W RθJCtop Junction-to-case (top) thermal resistance 27.2 RθJB Junction-to-board thermal resistance 11.4 ψJT Junction-to-top characterization parameter 0.4 ψJB Junction-to-board characterization parameter 11.4 RθJC(bot) Junction-to-case (bottom) thermal resistance 3.6

6.5 Power and Status Electrical Characteristics

VL = 3.3V unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Icc (Static) DIN1 = GND or VL; DIN2 = GND or VL, FORCEOFF = VL FORCEON = VL No load VCC= 1.65V to 2.0V 1.0 1.9 mAVCC= 3.0V to 3.6V 0.7 1.4 VCC= 4.5V to 5.5V 0.8 1.9 Icc (off) FORCEOFF = GND 0.4 10 μA VIT+ RIN postive voltage threshold for INVALID output change RIN1 = RIN2 0.3 2.4 V VIT- RIN negative voltage threshold for INVALID output change -2.4 -0.3 VOH INVALID high-level output voltage IOH = -1 mA, FORCEON = GND, FORCEOFF = VL VL-0.4 VL-0.08 VL V VOL INVALID low-level output voltage IOL = 1.6 mA, FORCEON = GND, FORCEOFF = VL 0 0.06 0.4 V

6.6 Driver Electrical Characteristics

VL = 3.3V unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VOUT Output voltage swing All driver outputs loaded with 3 kΩ to ground C3 = 100 nF, VCC= 1.8 V ±4.25 ±4.7 V All driver outputs loaded with 3 kΩ to ground C3 = 0 F, VCC= 3.3 V or 5 V ±5 ±5.4 rO Output resistance (VCC = V+ = V– = 0); Driver output = ±2 V 300 10M Ω IOS Output short-circuit current VDOUT = 0 ±60 mA IOZ Output leakage current VDOUT = ±12 V, FORCEOFF = GND 0 ±25 μA Driver input hysteresis 0.5 1 V Input leakage current DIN = GND to VL; FORCEOFF = GND to VL; FORCEON = GND to VL 0 ±5 μA

6.7 Receiver Electrical Characteristics

VL = 3.3V unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Ioff Output leakage current ROUT, receivers disabled ±0.01 ±10 μA VOL Output voltage low IOUT= 2.0 mA 0.04 0.3 V VOH Output voltage high IOUT= –2.0mA VL–0.3 VL–0.04 V VIT– Input threshold low TA=25°C VL= 5 V 0.8 1.5 VVL= 3.3 V 0.7 1.1 VL= 1.8 V 0.6 0.7 VIT+ Input threshold high TA =25°C VL= 5 V 2.0 2.4 VVL = 3.3 V 1.5 2.4 VL= 1.8 V 0.9 1.4 Vhys Input hysteresis TA=25°C VL= 5 V 0.45 VVL = 3.3 V 0.35 VL= 1.8 V 0.26 Input resistance TA=-40 to 85°C 3 5 7 kΩ (1) Driver skew is measured at the driver zero crosspoint.

6.8 Driver Switching Characteristics

VL = 3.3V unless otherwise noted. PARAMETER MIN TYP MAX UNIT Maximum data rate RL = 3 kΩ, CL = 500 pF (one driver) 1000 kbps RL = 3 kΩ, CL = 1000 pF (one driver) 500 Time-to-exit powerdown |VDOUT| > 3.7 V 30 150 μs |tPHL – tPLH| Driver skew(1) RL = 3 kΩ 0 50 100 ns Transition-region slew rate RL = 3 kΩ to 7 kΩ, TA = 25°C Measured from 3 V to –3 V or –3 V to 3 V VCC = 1.8V, CL = 200 pF 33 V/μs VCC = 1.8V, CL = 1000 pF 25 VCC = 3.3 V, CL = 200 pF 38 VCC = 3.3 V, CL = 1000 pF 28 VCC = 5 V, CL = 200 pF 41 VCC = 5 V, CL = 1000 pF 30

6.9 Receiver Switching Characteristics

VL = 3.3V unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPHL Receiver propagation delay, high to low Receiver input to receiver output CL = 150 pF 0.15 0.4 μs tPLH Receiver propagation delay, low to high 0.15 0.4 tPHL – tPLH Receiver skew 50 300 ns ten Receiver output enable time From FORCEOFF to ROUT= VL/2 CL = 150 pF, RL = 3 kΩ 200 400 ns tdis Receiver output disable time 200 400 ns

6.10 Power and Status Switching Characteristics

VL = 3.3V unless otherwise noted. PARAMETER MIN TYP MAX UNIT tvalid Propagation delay time, low- to high-level output 1 μs tinvalid Propagation delay time, high- to low-level output 30 μs tdis Receiver or driver edge to auto-powerdown plus 15 30 60 s

6.11 Typical Characteristics

Figure 1. Supply Current vs. Load Capacitance Figure 2. Driver Output vs. Load Capacitance, VCC = 3.3V Figure 3. Driver Positive vs. Supply Voltage (Tripler Mode)

1 Mbps, RLOAD = 3 kΩ, CLOAD = 560 pF

Figure 4. Driver Positive vs. Supply Voltage (Doubler Mode) Figure 5. Supply Current vs. Supply Voltage (Tripler Mode) Figure 6. Supply Current vs. Supply Voltage (Doubler Mode)

3 V3 V

7 Parameter Measurement Information

A. CL includes probe and jig capacitance. Figure 7. Driver Slew Rate A. CL includes probe and jig capacitance. Figure 8. Driver Pulse Skew A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. Figure 9. Receiver Propagation Delay Times

3 V or 0 V

A. CL includes probe and jig capacitance. B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns. C. tPLZ and tPHZ are the same as tdis. D. tPZL and tPZH are the same as ten. Figure 10. Receiver Enable and Disable Times

Figure 11. INVALID Propagation-Delay Times and Supply-Enabling Time

8 Detailed Description

8.1 Overview

Powerdown Plus has been integrated to shut-off all active circuitry, allowing TRS3122E to achieve an Ioff of 1 uA. pins comply with IEC 61000-4-2 ratings.

8.2 Functional Block Diagram

Figure 12. Schematic

8.3 Feature Description

8.3.1 Charge Pump

The internal power supply consists of a regulated auto-sensing charge pump that provides RS-232 compatible modes to efficiently accommodate low voltage (1.8 V) and higher voltage (3.3 V & 5.0 V) supplies.

8.3.1.1 Doubler Mode

The charge pump requires two flying capacitors (C1, C2) and reservoir capacitors (C4, C5) to generate the V+ and V- supplies of approximately ±5.4 V when VCC is greater than 3 V. When VCC is >2.9V, TRS3122E will sense the supply voltage level and switch the charge pump to a doubler. Hence, no need for a third flying capacitor. C3+ & C3- pins can be left open for proper operation. If a capacitor is placed between C3+ & C3-, the charge pump will ignore this capacitor and still behave as a doubler. For capacitor choice recommendations, please refer to Table 1.

8.3.1.2 Tripler Mode

The charge pump requires three flying capacitors (C1, C2 & C3) and reservoir capacitors (C4, C5) to generate the V+ and V- supplies of approximately ±2.65 * VCC when VCC is greater than 1.65 V. When VCC is <2.1 V, TRS3122E will sense the supply voltage level and switch the charge pump to a tripler. For capacitor choice recommendations, please refer to Table 1.

8.3.2 Drivers

The drivers are inverting level transmitters that convert TTL or CMOS logic levels to RS-232 levels. For VCC=3.0 V to 5.0 V, the RS-232 output voltage swing is typically ±5.4 V fully loaded and ±5 V minimum fully loaded. For The driver outputs are protected against indefinite short-circuits to ground without degradation in reliability. These drivers are compatible with RS-232 logic levels and all previous RS-232 versions. Unused driver inputs should be connected to GND or VCC.

8.3.3 Receivers

The receivers convert EIA/TIA-232 levels to TTL or CMOS logic output levels. Receivers have an inverting output that can be disabled by using the FORCEOFF pin. Receivers remain active when the Auto Powerdown Plus circuitry autonomously enters a low power state. See Auto Powerdown Plus for more information on the Auto Powerdown mode. If the FORCEOFF pin is manually set low, the receivers will be disabled and put into 3-state mode. In either of these powerdown modes, the device will typically consume about 0.5 uA. The truth table logic of the TRS3122E driver and receiver outputs can be found in Device Functional Modes. Since receiver input is usually from a transmission line where long cable lengths and system interference can degrade the signal, the inputs have a typical hysteresis margin of 300 mV. This ensures that the receiver is virtually immune to noisy transmission lines. Should an input be left unconnected, an internal 5kΩ pull-down resistor to ground will commit the output of the receiver to a HIGH state.

8.3.4 ESD Protection

ESD protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. The bus pins (driver outputs and receiver inputs) have extra protection structures, which have been tested up to ±15 kV. ESD protection is tested in various ways. TI uses the following standards to qualify the ESD structures designed into TRS3122E:

±8 kV using IEC 61000-4-2 Contact Discharge (on RINx and DOUTx pins)
±15 kV using IEC 61000-4-2 Airgap Discharge (on RINx and DOUTx pins)
±15 kV using the Human Body Model (HBM) (on RINx and DOUTx pins)
±2 kV using the Human Body Model (HBM) (on all pins except RINx and DOUTx pins)
±0.5 kV using the Charged Device Model (CDM) (on all pins)

SLLSET7C –MAY 2016–REVISED MAY 2016 www.ti.com Product Folder Links: TRS3122E Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Feature Description (continued) The IEC 61000-4-2 standard is more rigorous than HBM, resulting in lower voltage levels compared with HBM for the same level of ESD protection. Because IEC 61000-4-2 specifies a lower series resistance, the peak current is higher than HBM. The TRS3122E has passed both HBM and IEC 61000-4-2 testing.

8.3.5 Auto Powerdown Plus

Powerdown is engaged in two separate cases: automatically, when no activity has occurred for a period of time, and manually, using the FORCEOFF device pin.

8.3.5.1 Automatic Powerdown

Auto Powerdown Plus is enabled when FORCEON is set LOW and FORCEOFF is set HIGH. Using TRS3122E's integrated edge detection circuitry and timer, the device can sense when there is no activity on the driver or receiver inputs for 30 seconds. When this condition is sensed by the device, it automatically shuts the charge pump off, reducing supply current to 0.5 uA. When a valid transition is sensed on one of the driver or receiver inputs, the charge pump turns back on and TRS3122E exits powerdown. The typical time to exit powerdown is typically in 30 us, but can be as long as 150 us. As a result, the system saves power without requiring any software control. Device Functional Modes summarizes the operating modes in truth table form. While in the low power mode with Automatic Powerdown enabled (FORCEOFF = HIGH and FORCEON = LOW), the receiver inputs are still enabled.

8.3.5.2 Manual Powerdown

The device can be manually powered down by externally setting FORCEOFF pin to low logic level. Both the drivers and receivers will be powered off. Device Functional Modes summarizes the operating modes in truth table form.

8.3.5.3 Forced On

If the FORCEOFF and FORCEON pins are both set HIGH, the device will power on with Auto Powerdown Plus disabled. Both the drivers and receiver will be active regardless of inactivity. Because powerdown is autonomous, FORCEON can be used ensure drivers are ready for new data transmission if the time since last transmission (or receive data) was more than 15 seconds. Device Functional Modes summarizes the operating modes in truth table form.

8.4 Device Functional Modes

8.4.1 Each Driver(1)

8.4.2 Each Receiver(1)

8.4.3 INVALID Status Truth Table(1)

(1) For optimized performance, we recommend using these configurations. (2) For applications where the Vcc variation is larger, this configuration is acceptable.

8.4.4 Capacitor Selection Table

Table 1. Capacitor Selection

1.65 V to 2 V(1) 100 nF

9 Application and Implementation

validate and test their design implementation to confirm system functionality.

9.1 Application Information

RS232 cables are RJ45, DB9 & DB25. Figure 13. TRS3122E Typical Application

9.2.1 Design Requirements

For this design example, use the parameters listed in Table 2 as the input parameters. Table 2. Design Parameters

9.2.2 Detailed Design Procedure

All DIN, FORCEOFF, and FORCEON inputs must be connected to valid low or high logic levels.
Select capacitor values based on VCC level for best performance. (see Table 3)

(1) For optimized performance, we recommend using these configurations. (2) For applications where the Vcc variation is larger, this configuration is acceptable.

9.2.2.1 Data-Rate and Cable Length

factor. Therefore the capacitance per foot (or meter) of the cable is important if long data cables are used. data rates will have reduced percentage of time that the output is at VOL or VOH and more time in the transitions. cable capacitance and data rate. Figure 14. Typical Waveform with Capacitive Load

9.2.2.2 Capacitor Selection

(ESR) usually increases at low temperatures. For best charge pump efficiency locate the charge pump and bypass capacitors as close as possible to the IC. Table 3. Capacitor Selection

9.2.3 Application Curves

Figure 15. 1 Mbps Eye Diagram, 2 V/div, 200 ns/ div

10 Power Supply Recommendations

maximum limit for bypass capacitor. Place bypass capacitors as close to the IC as possible. time because operation is undefined. VCC and VL must be powered to guarantee charge pump operation. VL than VCC. Full functionality can be achieved when VCC is greater than or equal to VL.

11 Layout

11.1 Layout Guidelines

Minimize the length of all capacitor traces to ensure the device can maintain quick rising and falling transitions. Vias are recommended to accommodate layouts for the capacitors.

11.2 Layout Example

Figure 16. TRS3122E Typical Layout

12 Device and Documentation Support

12.1 Device Support

12.1.1 Third-Party Products Disclaimer

TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.

12.2 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

12.3 Trademarks

E2E is a trademark of Texas Instruments.

12.4 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

12.5 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 10-Nov-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TRS3122ERGER Active Production VQFN (RGE) | 24 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 TRS3122 TRS3122ERGER.A Active Production VQFN (RGE) | 24 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 TRS3122 TRS3122ERGERG4 Active Production VQFN (RGE) | 24 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 TRS3122 TRS3122ERGERG4.A Active Production VQFN (RGE) | 24 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 TRS3122 TRS3122ERGET Active Production VQFN (RGE) | 24 250 | SMALL T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 TRS3122 TRS3122ERGET.A Active Production VQFN (RGE) | 24 250 | SMALL T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 TRS3122 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

www.ti.com 10-Nov-2025 Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 18-Jun-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 18-Jun-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TRS3122ERGER VQFN RGE 24 3000 367.0 367.0 35.0 TRS3122ERGERG4 VQFN RGE 24 3000 367.0 367.0 35.0 TRS3122ERGET VQFN RGE 24 250 210.0 185.0 35.0 Pack Materials-Page 2

Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. RGE 24 VQFN - 1 mm max height PLASTIC QUAD FLATPACK - NO LEAD 4204104/H

9,$TYPSOLDER MASK DETAILSNON SOLDER MASKDEFINED(PREFERRED)SOLDER MASKDEFINED0.07 MAXALL AROUND0.07 MINALL AROUNDMETALSOLDER MASKOPENINGSOLDER MASKOPENINGMETAL UNDERSOLDER MASK

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Product Information

TRS3122ERGER.A specifications and overview.

Summary

TRS3122E 1.8 V Low Power Dual RS-232 Transceiver REVISED MAY 2016

Description

TRS3122E 1.8 V Low Power Dual RS-232 Transceiver REVISED MAY 2016

Source title TRS3122ERGER.A Datasheet(PDF) - Texas Instruments

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