TRS202E_10 TI | Alldatasheet
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(TOP VIEW) 1 1 C1+ C1- C2+ C2- DOUT2 RIN2 VCC GND DOUT1 RIN1 ROUT1 DIN1 DIN2 ROUT2 TRS202E www.ti.com SLLS847C –JULY 2007–REVISED MAY 2010 5-VDUALRS-232LINEDRIVER/RECEIVERWITH±15-kVESDPROTECTION Check forSamples: TRS202E 1FEATURES
- IEC61000-4-2(Level4)ESD Protectionfor APPLICATIONS RS-232 Bus Pins • Battery-PoweredSystems – ±8-kV ContactDischarge • PDAs
- Notebooks– ±15-k-VAir-GapDischarge
- Laptops– ±15-kV Human-Body Model
- Palmtop PCs• Meets or Exceeds theRequirements of
- Hand-Held EquipmentTIA/EIA-232-Fand ITU v.28Standards
- Operates at5-V VCC Supply
- Operates Up To 120 kbit/s
- ExternalCapacitors...4 × 0.1mF or 4 × 1 mF
- Latch-Up Performance Exceeds 100 mA Per JESD 78,Class II DESCRIPTION/ORDERING INFORMATION The TRS202E deviceconsistsoftwo linedrivers,two linereceivers,and a dualcharge-pump circuit.TRS202E has IEC61000-4-2(Level4) ESD protectionpin-to-pin(serial-portconnectionpins,includingGND). The device meets the requirementsof TIA/EIA-232-Fand providesthe electricalinterfacebetween an asynchronous communicationcontrollerand the serial-portconnector.The charge pump and foursmallexternalcapacitors allowoperationfrom a single5-V supply.The deviceoperatesat data signalingratesup to 120 kbit/sand a maximum of30-V/ms driveroutputslewrate. The TRS202E can work withboth0.1-mF or1-mF externalcapacitors. Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsofTexas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2007–2010,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.
SLLS847C –JULY 2007–REVISED MAY 2010 www.ti.com
ORDERING INFORMATION
TA PACKAGE (1)(2) ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP – N Tube of25 TRS202ECN TRS202ECN Tube of40 TRS202ECD SOIC – D TRS202EC Reelof2500 TRS202ECDR 0°C to70°C Tube of40 TRS202ECDW SOIC – DW TRS202EC Reelof2000 TRS202ECDWR Tube of90 TRS202EPW TSSOP – PW RU02EC Reelof2000 TRS202EPWR PDIP – N Tube of25 TRS202EIN TRS202EIN Tube of40 TRS202EID SOIC – D TRS202EI Reelof2500 TRS202EIDR –40°C to85°C Tube of40 TRS202EIDW SOIC – DW TRS202EI Reelof2000 TRS202EIDWR Tube of90 TRS202EIPW TSSOP – PW RU02EI Reelof2000 TRS202EIPWR (1) Package drawings,thermaldata,and symbolizationareavailableatwww.ti.com/packaging. (2) Forthemost currentpackage and orderinginformation,see thePackage OptionAddendum attheend ofthisdocument,orsee theTI websiteatwww.ti.com. FUNCTION TABLES xxx Each Driver(1) INPUT OUTPUT D IN D OUT L H H L (1) H = highlevel,L = lowlevel Each Receiver(1) INPUT OUTPUT R IN R OUT L H H L Open H (1) H = highlevel,L = lowlevel,Open = inputdisconnectedorconnected driveroff LOGIC DIAGRAM (POSITIVE LOGIC)
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www.ti.com SLLS847C –JULY 2007–REVISED MAY 2010 AbsoluteMaximum Ratings(1)(2) overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN MAX UNIT VCC Supplyvoltagerange(2) –0.3 6 V V+ Positivechargepump voltagerange(2) VCC – 0.3 14 V V– Negativechargepump voltagerange –14 0.3 V Drivers –0.3 V+ + 0.3 VI Inputvoltagerange V Receivers ±30 Drivers V– –0.3 V+ + 0.3 VO Outputvoltagerange V Receivers –0.3 VCC + 0.3 D OUT Short-circuitduration Continuous TJ Operatingvirtualjunctiontemperature 150 °C Tstg Storagetemperaturerange –65 150 °C (1) Stressesbeyond thoselistedunder"absolutemaximum ratings"may cause permanentdamage tothedevice.These arestressratings only,and functionaloperationofthedeviceattheseorany otherconditionsbeyond thoseindicatedunder"recommended operating conditions"isnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmay affectdevicereliability. (2) AllvoltagesarewithrespecttonetworkGND. Package Thermal Impedance overoperatingfree-airtemperaturerange(unlessotherwisenoted) UNIT D package 73 DW package 57 qJA Package thermalimpedance(1)(2) °C/W N package 67 PW package 108 (1) Maximum power dissipationisa functionofTJ(max),qJA,and TA.The maximum allowablepower dissipationatany allowableambient temperatureisPD = (TJ(max)– TA)/qJA.Operatingattheabsolutemaximum TJ of150°C can affectreliability. (2) The package thermalimpedance iscalculatedinaccordancewithJESD 51-7. Recommended OperatingConditions(1) (seeFigure4) MIN NOM MAX UNIT Supplyvoltage 4.5 5 5.5 V VIH Driverhigh-levelinputvoltage D IN 2 V VIL Driverlow-levelinputvoltage D IN 0.8 V Driverinputvoltage D IN 0 5.5 VI V Receiverinputvoltage –30 30 TRS202EC 0 70 TA Operatingfree-airtemperature °C TRS202EI –40 85 (1) TestconditionsareC1 –C4 = 0.1mF atVCC = 5 V ±0.5V. ElectricalCharacteristics(1) overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted)(seeFigure4) PARAMETER TEST CONDITIONS MIN TYP (2) MAX UNIT ICC Suppy current No load,VCC = 5 V 8 15 mA (1) TestconditionsareC1 –C4 = 0.1mF atVCC = 5 V + 0.5V. (2) AlltypicalvaluesareatVCC = 5 V,and TA = 25°C. Copyright© 2007–2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):TRS202E
SLLS847C –JULY 2007–REVISED MAY 2010 www.ti.com DRIVER SECTION ElectricalCharacteristics(1) overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted)(seeFigure4) PARAMETER TEST CONDITIONS MIN TYP (2) MAX UNIT VOH High-leveloutputvoltage D OUT atR L = 3 kΩ toGND, D IN = GND 5 9 V VOL Low-leveloutputvoltage D OUT atR L = 3 kΩ toGND, D IN = VCC –5 –9 V IIH High-levelinputcurrent VI= VCC 15 200 mA IIL Low-levelinputcurrent VIat0 V –15 –200 mA IOS (3) Short-circuitoutputcurrent VCC = 5.5V VO = 0 V –10 –60 mA ro Outputresistance VCC ,V+, and V– = 0 V VO = ±2 V 300 Ω (1) TestconditionsareC1 –C4 = 0.1mF atVCC = 5 V + 0.5V. (2) AlltypicalvaluesareatVCC = 5 V,and TA = 25°C. (3) Short-circuitdurationsshouldbe controlledtopreventexceedingthedeviceabsolutepower-dissipationratings,and notmore thanone outputshouldbe shortedata time. SwitchingCharacteristics(1) overrecommended rangesofsuplyvoltageand operatingfree-airtemperature(unlessotherwisenoted)(seeFigure4) PARAMETER TEST CONDITIONS MIN TYP (2) MAX UNIT C L = 50 to1000 pF, R L = 3 kΩ to7 kΩ,Maximum datarate 120 kbit/sOne D OUT switching, See Figure1 Propagationdelaytime,low-to C L = 2500 pF, R L = 3 kΩ,tPLH(D) 2 mshigh-leveloutput Alldriversloaded, See Figure1 Propagationdelaytime,high-to C L = 2500 pF, R L = 3 kΩ,tPHL(D) 2 mslow-leveloutput Alldriversloaded, See Figure1 R L = 3 kΩ to7 kΩ,tsk(p) Pulseskew (3) C L = 150 to2500 pF, 300 nsSee Figure2 Slew rate,transitionregion C L = 50 to1000 pF,SR(tr) R L = 3 kΩ to7 kΩ, 3 6 30 V/ms(seeFigure1) VCC = 5 V (1) TestconditionsareC1 –C4 = 0.1mF atVCC = 5 V + 0.5V. (2) AlltypicalvaluesareatVCC = 5 V,and TA = 25°C. (3) Pulseskew isdefinedas |tPLH – tPHL |ofeach channelofthesame device. ESD Protection PIN TEST CONDITIONS TYP UNIT Human-Body Model ±15 D OUT ,R IN ContactDischarge ±8 kV Air-gapDischarge ±15
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www.ti.com SLLS847C –JULY 2007–REVISED MAY 2010 RECEIVER SECTION ElectricalCharacteristics(1) overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted)(seeFigure4) PARAMETER TEST CONDITIONS MIN TYP (2) MAX UNIT VOH High-leveloutputvoltage IOH = –1 mA 3.5 VCC – 0.4 V VOL Low-leveloutputvoltage IOL = 1.6mA 0.4 V VIT+ Positive-goinginputthresholdvoltage VCC = 5 V, TA = 25°C 1.7 2.4 V VIT– Negative-goinginputthresholdvoltage VCC = 5 V, TA = 25°C 0.8 1.2 V Vhys Inputhysteresis(VIT+ – VIT–) 0.2 0.5 1 V ri Inputresistance VI= ±3 V to±25 V 3 5 7 kΩ (1) TestconditionsareC1 –C4 = 0.1mF atVCC = 5 V + 0.5V. (2) AlltypicalvaluesareatVCC = 5 V,and TA = 25°C. SwitchingCharacteristics(1) overrecommended rangesofsuplyvoltageand operatingfree-airtemperature(unlessotherwisenoted)(seeFigure3) PARAMETER TEST CONDITIONS MIN TYP (2) MAX UNIT tPLH(R) Propagationdelaytime,low-tohigh-leveloutput C L = 150 pF 0.5 10 ms tPHL(R) Propagationdelaytime,high-tolow-leveloutput C L = 150 pF 0.5 10 ms tsk(p) Pulseskew (3) 300 ns (1) TestconditionsareC1 –C4 = 0.1mF atVCC = 5 V + 0.5V. (2) AlltypicalvaluesareatVCC = 5 V,and TA = 25°C. (3) Pulseskew isdefinedas |tPLH – tPHL |ofeach channelofthesame device. Copyright© 2007–2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):TRS202E
TEST□CIRCUIT VOLTAGE□WAVEFORMS 0□V 3□V Output Input VOL VOH tTLH□(D) Generator (see□Note□B) RL RS-232 Output tTHL (D)CL (see□Note A) NOTES: A.□□□C includes□probe□and□jig□capacitance.L B. The□pulse□generator□has□the□following□characteristics:□PRR□=□120□kbit/s,□Z =□50 ,□50%□duty□cycle,□t 10□ns,□t 10□ns.O r f/c87 /c163 /c163 1.5□V 1.5□V 3□V – 3□V 3□V – 3□V SR(t )□=f 6□V t or□tTHL(D TLH(D)) TEST□CIRCUIT VOLTAGE□WAVEFORMS 0□V 3□V Output Input VOL VOH tPLH□(D)tPHL (D) 50% 50% NOTES: A.□□□C includes□probe□and□jig□capacitance.L B. The□pulse□generator□has□the□following□characteristics:□PRR□=□120□kbit/s,□Z =□50 ,□50%□duty□cycle,□t 10□ns,□t 10□ns.O r f/c87 /c163 /c163 1.5□V 1.5□V 50 /c87 Generator (see□Note□B) RL RS-232 Output CL (see□Note A) TEST□CIRCUIT VOLTAGE□WAVEFORMS 50 /c87 50%50% -3□V 3□V 1.5□V1.5□V Output Input VOL VOH tPHL (R) Generator (see□Note□B) tPLH□(R) Output CL (see□Note A) NOTES: A.□□□C includes□probe□and□jig□capacitance.L B. The□pulse□generator□has□the□following□characteristics:□Z =□50 ,□50%□duty□cycle,□t 10□ns,□t 10□ns.O r f/c87 /c163 /c163 TRS202E SLLS847C –JULY 2007–REVISED MAY 2010 www.ti.com PARAMETER MEASUREMENT INFORMATION Figure1. DriverSlew Rate Figure2. DriverPulse Skew Figure3. ReceiverPropagationDelay Times
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=□0.1 F,/c109 RIN2 DOUT1 DOUT2 C3□can□be□connected□to□V or□GND.CC NOTES: A .□□□Resistor□values□shown□are□nominal. C2+ C2– C1+ C1–
0.1 F,/c109
6.3□V
0.1 F/c109
16□V 16□V 5□k/c87 5□k/c87
0.1 F/c109 ,
16□V B□.□□□Nonpolarized□ceramic□capacitors□are□acceptable.□If□polarized□tantalum□or□electrolytic□capacitors□are□used,□they□should□be connected□as□shown. TRS202E www.ti.com SLLS847C –JULY 2007–REVISED MAY 2010
APPLICATION INFORMATION
Figure4. TypicalOperatingCircuitand CapacitorValues CapacitorSelection The capacitortypeused forC1-C4 isnotcriticalforproperoperation.The TRS202E requires0.1-mF capacitors, althoughcapacitorsup to 10 mF can be used withoutharm. Ceramic dielectricsare suggestedforthe 0.1-mF capacitors.When usingtheminimum recommended capacitorvalues,make surethecapacitancevaluedoes not degrade excessivelyas the operatingtemperaturevaries.Ifin doubt,use capacitorswitha larger(e.g.,2×) nominal value.The capacitors'effectiveseriesresistance(ESR), which usuallyrisesat low temperatures, influencestheamount ofrippleon V+ and V–. Use largercapacitors(upto10 mF)toreducetheoutputimpedance atV+ and V–. Bypass VCC to ground withat least0.1 mF. In applicationssensitiveto power-supplynoisegeneratedby the charge pumps, decoupleVCC to ground witha capacitorthe same sizeas (orlargerthan)the charge-pump capacitors(C1–C4). Copyright© 2007–2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLink(s):TRS202E
+ DUT RD 1.5□k/c87 VHBM 100□pF CS 100 150 200500 1.5 1.0 0.5 0.0 V = 2 kVHBM DUT = 10-V, 1-/c87Zener Diode| Time (ns) I (A)DUT TRS202E SLLS847C –JULY 2007–REVISED MAY 2010 www.ti.com ESD Protection TI TRS202E deviceshave standardESD protectionstructuresincorporatedon the pins to protectagainst electrostaticdischargesencounteredduringassembly and handling.In addition,the RS232 bus pins(driver outputsand receiverinputs)ofthesedeviceshave an extralevelofESD protection.Advanced ESD structures were designedtosuccessfullyprotectthesebus pinsagainstESD dischargeof±15-kVwhen powered down. ESD TestConditions StringentESD testingisperformedby TI,based on variousconditionsand procedures.PleasecontactTI fora reliabilityreportthatdocuments testsetup,methodology,and results. Human-Body Model (HBM) The HBM ofESD testingisshown inFigure5.Figure6 shows thecurrentwaveform thatisgeneratedduringa dischargeintoa low impedance.The model consistsof a 100-pF capacitor,charged to the ESD voltageof concern,and subsequentlydischargedintothedeviceundertest(DUT) througha 1.5-kΩ resistor. Figure5. HBM ESD TestCircuit Figure6. TypicalHBM CurrentWaveform
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www.ti.com SLLS847C –JULY 2007–REVISED MAY 2010 Machine Model (MM) The MM ESD testappliestoallpinsusinga 200-pF capacitorwithno dischargeresistance.The purposeofthe MM testistosimulatepossibleESD conditionsthatcan occurduringthehandlingand assembly processesof manufacturing.In thiscase,ESD protectionisrequiredforallpins,not justRS-232 pins.However, afterPC boardassembly,theMM testno longerisas pertinenttotheRS-232 pins. Copyright© 2007–2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLink(s):TRS202E
Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) TRS202ECD ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202ECDG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202ECDR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202ECDRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202ECDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202ECDWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202ECDWR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202ECDWRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202ECN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TRS202ECNE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TRS202ECPW ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202ECPWG4 ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202ECPWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202ECPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202EID ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202EIDG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202EIDR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202EIDRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202EIDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202EIDWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202EIDWR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202EIDWRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202EIN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TRS202EINE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TRS202EIPW ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PACKAGE OPTION ADDENDUM www.ti.com 21-Apr-2010 Addendum-Page 1
Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) TRS202EIPWG4 ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202EIPWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS202EIPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 21-Apr-2010 Addendum-Page 2
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 30-Jul-2010 Pack Materials-Page 1
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TRS202ECDR SOIC D 16 2500 346.0 346.0 33.0 TRS202ECDWR SOIC DW 16 2000 346.0 346.0 33.0 TRS202ECPWR TSSOP PW 16 2000 346.0 346.0 29.0 TRS202EIDR SOIC D 16 2500 346.0 346.0 33.0 TRS202EIDWR SOIC DW 16 2000 346.0 346.0 33.0 TRS202EIPWR TSSOP PW 16 2000 346.0 346.0 29.0 PACKAGE MATERIALS INFORMATION www.ti.com 30-Jul-2010 Pack Materials-Page 2
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,65 M0,10 0,10 0,25 0,50 0,75 0,15 NOM Gage Plane 9,80 9,60 7,90 7,70 2016 6,60 6,40 4040064/F 01/97 0,30 6,60 6,20 0,19 4,30 4,50 0,15 A 1,20 MAX 5,10 4,90 3,10 2,90 A MAX A MIN DIM PINS ** 0,05 4,90 5,10 Seating Plane 0°–8° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-153
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