TRF1216_07 TI | Alldatasheet
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www.ti.com DEVICE INFORMATION
FEATURES
(TOP VIEW) P0031-02 6 7 8 9 10 161920 18 17
DESCRIPTION
3.5-GHz, HIGH DYNAMIC RANGE, LOW-NOISE DOWN-CONVERTER Performs First Down-Conversion in 3.5-GHz Radios (3300 3800 MHz) Integrated LNA/Mixer/IF Amp/LO Buffer Provision for External Image Reject/Band-Pass Filter Low Noise-Figure/High Linearity Digital 10-dB Attenuator for High-Level Signals Frequency Range: 3.3 3.8 GHz dB of Gain with dB of Gain Control (10-dB Fixed) 2.5-dB Noise Figure, Typical LO Drive Level dBm, Typical The TRF1216 is the first of two integrated circuits used in the receiver section of Texas Instruments 3.5-GHz radio chipset. The TRF1216 down-converts the 3.5-GHz input frequency to an intermediate frequency in the range of 400 MHz to 500 MHz. The device provides a differential output that passes through a SAW filter before connecting to a second down converter. For the best performance, Texas Instruments TRF1212 should be used to perform both the second down conversion and also provide the local oscillator for the TRF1216. The TRF1216 includes a LNA with switchable attenuation, a balanced mixer, a variable gain IF amplifier and a differential LO Buffer for improved performance. In order to provide exceptional image rejection and extra jammer immunity, the TRF1216 offers a signal path to an off-chip filter. Specifications are provided assuming an in-band 2-dB insertion loss filter. To maximize input dynamic range, a 10-dB switchable attenuator is provided in the RF path as well as dB of analog IF gain control. After the image reject filter, an on-chip Balun converts the signal from single ended to differential in order to provide better noise immunity at the mixer. Please be aware that an important notice concerning availability, standard warranty, and use in critical
applications
sheet. PRODUCTION DATA information is current as of publication date. Copyright 2005, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
www.ti.com BLOCK DIAGRAM LNAI MixerDual Stage-LNA LO Buffer VGA LOP VDD1 RFAGC LON BALUN LNAO MXRI IFOP IFON RFATTN VDDLO IFB VDDIFVDD2 GND B0084-01 TRF1216 SLWS172A APRIL 2005 REVISED DECEMBER 2005 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. The detailed block diagram and the pin-out of the ASIC are shown in Figure and Table Figure Detailed Block Diagram of TRF1216 TERMINAL FUNCTIONS TERMINAL I/O TYPE NO. NAME LNAO O Analog LNA Output, Ω ac-coupled VDD1 I Power LNA1 DC Bias (+5 V nominal) GND Ground 16, LNAI I Analog RF input Needs dc block and input matching for optimum noise figure LOP I Analog LO input positive, ac coupled LON I Analog LO input negative, ac coupled VDDLO I Power LO DC Bias (+5 V nominal) Not connected for normal operation. IF Bias Adjustment. Do not ground this pin or connect to any IFB other pin. VDDIF I Power IF Bias Network dc Bias (+5 V nominal) IFON O Analog IF output and bias (see the application schematic for connections). IFOP O Analog IF output and bias (see the application schematic for connections). Input voltage for analog gain control V RFAGC V to 1.5 V Max gain at V RFAGC V Min gain at RFAGC I Analog V RFAGC 1.5 V TTL control for switched attenuator TTL low Attenuator switched in TTL high Attenuator RFATTN I Digital switched out MXRI I Analog Mixer Input Ω VDD2 Power LNA2 dc bias (+5 V nominal) Back GND Back of package has metal base that must be grounded for thermal and RF performance.
www.ti.com ABSOLUTE MAXIMUM RATINGS ELECTRICAL CHARACTERISTICS TRF1216 SLWS172A APRIL 2005 REVISED DECEMBER 2005 VALUES UNIT V DD DC supply voltage, VDD to 5.5 V P IN RF input power dBm T J Junction temperature 200 C P D Power dissipation 1100 mW V D Digital input voltage 0.3 to 5.5 V V A Analog input voltage 0.3 to V θ JC Thermal resistance junction-to-case (1) 9.1 C/W T stg Storage temperature to 105 C T op Operating temperature to C Lead temperature (40 Sec Max) 260 C (1) Thermal resistance is junction to ambient assuming thermal pad with nine thermal vias under package metal base. See the recommended PCB layout. The characteristics listed in the following tables are at V CC T A C unless otherwise specified. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DC CHARACTERISTICS V DD Supply voltage 5.5 V I DD Total supply current 175 200 mA I LNA1 LNA1 supply current Pin (VDD1) mA I LNA2 LNA2 supply current Pin (VDD2) mA I IF IF AMP supply current Pin (VDDIF) plus IF drain bias on pins mA and (IFOP, IFON) I LO LO supply current Pin (VDDLO) mA V AGC Gain control voltage V I AGC Gain control current 100 µ A V IH Input high voltage 2.5 V V IL Input low voltage 0.8 V I IH Input high current 300 µ A I IL Input low current µ A
www.ti.com DOWNCONVERTER CHARACTERISTICS TRF1216 SLWS172A APRIL 2005 REVISED DECEMBER 2005 Unless otherwise stated V DD FRF 3500 MHz, T A C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT F RF RF input frequency 3300 3800 MHz F LO LO input frequency 2800 3400 MHz F IF IF output frequency 400 480 500 MHz G Maximum gain V AGC RFATTN disabled, Measured into 100- Ω dB differential load Δ AGC Analog gain control range V AGC from to 1.5 Any RFATTN setting. Measured dB into 100- Ω differential load Δ ATTN Switched attenuator range RFATTN from high-to-low, any VAGC setting. 8.5 11.5 dB Measured into 100- Ω differential load G HG Gain flatness full band Any 200-MHz band dB G NB Gain flatness MHz Any 6-MHz band 0.4 dB V AGC RFATTN disabled 2.5 V AGC RFATTN enabled 4.8 NF Noise figure (1) dB V AGC 1.5 RFATTN disabled 3.2 V AGC 1.5 RFATTN enabled 6.8 V AGC RFATTN disabled V AGC RFATTN enabled IP-1dB Input power at 1-dB compression dBm V AGC 1.5 RFATTN disabled V AGC 1.5 RFATTN enabled V AGC RFATTN disabled V AGC RFATTN enabled IIP3 Input 3rd order intercept point dBm V AGC 1.5 RFATTN disabled V AGC 1.5 RFATTN enabled P LO LO input power Referenced to 100- Ω differential dBm LO to MXRI leakage LO input dBm, V AGC V dB LO to IF leakage LO input dBm, V AGC V dB LNAO to RXI isolation F RF F 3300 to 3800 MHz, RFATTN TTL High dB (1) Assured by lab characterization/design and not subject to production test.
www.ti.com TYPICAL CHARACTERISTICS f − Frequency − MHz 3300 3350 3400 3450 3500 3550 3600 3650 3700 3750 3800 Gain − dB VAGC = 0 V G001 Gain With Attenuator Disabled Gain With Attenuator Enabled −40° C 25° C 85° C f − Frequency − MHz 3300 3350 3400 3450 3500 3550 3600 3650 3700 3750 3800 Gain − dB VAGC = 1.5 V G002 Gain With Attenuator Enabled −40° C 25° C 85° C Gain With Attenuator Disabled TRF1216 SLWS172A APRIL 2005 REVISED DECEMBER 2005 Measurements resulting in the following graphs were taken on the evaluation board of the ASIC (see Figure Figure Gain vs Frequency for VAGC V Figure Gain vs Frequency for VAGC 1.5 V
www.ti.com VAGC − Analog Gain Control Voltage − V Gain − dB G003 Attenuator Disabled3550 MHz
3800 MHz
3300 MHz
TA = 25° C f − Frequency − MHz −25 −20 −15 −10 3300 3350 3400 3450 3500 3550 3600 3650 3700 3750 3800 Input P1dB − dBm TA = 25° C G004 Attenuator Disabled, VAGC = 1.5 V Attenuator Enabled, VAGC = 1.5 V Attenuator Disabled, VAGC = 0 V Attenuator Enabled, VAGC = 0 V TRF1216 SLWS172A APRIL 2005 REVISED DECEMBER 2005 TYPICAL CHARACTERISTICS (continued) Figure Gain vs VAGC for Different Frequencies, A Figure Input P1dB vs Frequency, A
www.ti.com f − Frequency − MHz −15 −10 3300 3350 3400 3450 3500 3550 3600 3650 3700 3750 3800 Input IP3 − dBm TA = 25° C G005 Attenuator Disabled, VAGC = 1.5 V Attenuator Enabled, VAGC = 1.5 V Attenuator Disabled, VAGC = 0 V Attenuator Enabled, VAGC = 0 V Frequency [GHz] Gain [dB] NF [dB] −40C 85C 25C −40C 85C 25C TRF1216 SLWS172A APRIL 2005 REVISED DECEMBER 2005 TYPICAL CHARACTERISTICS (continued) Figure Input IP3 vs Frequency, A Figure LNA Noise Figure vs Frequency With VAGC V
www.ti.com APPLICATION INFORMATION Dia. 15 Mil 1 oz. Copper + ½ oz. Copper Plated Upper and Lower Surfaces Layer 2: 1 oz. Copper Layer 3: 1 oz. Copper ½ oz. Copper Plated DuPont CB 100 Conductive ViaPlug
8 Mil
10 Mil Core FR4
A typical application schematic is shown in Figure The PCB material recommendations are shown in Table and Figure Table PCB Recommendations Board Material FR4 Board Material Core Thickness mil Copper Thickness (starting) oz Prepreg Thickness mil Recommended Number of Layers Via Plating Thickness oz Final Plate White immersion tin Final Board Thickness mil NOTE: Top and bottom surface finish: copper flash with µ in white tin immersion. Figure PCB Construction and Via Cross Section
www.ti.com S0122-01 LO_POS LO_NEG RF_IN IF OUT_NEG IF OUT_POS VRFAGC RFATTN VDD1 LOP GND LON IFON MXRI IFOP GND IFB GND RFAGC 100 pF (A) 0.01 Fm 0.01 Fm 0.01 Fm 0 W 22 nH (B) 22 nH (B) 270 nH 270 nH 10 pF 0.01 Fm 0.01 Fm VDD VDD VDD BPF Z = 50 W VDD2 LNAO Back GND GND GND LNAI 19 1820 17 16 VDDLO VDDIF 87 106 9 RF ATTN 100 pF (A) 100 pF (A) 100 pF (A) 100 pF (A) 100 pF (A) TRF1216 SLWS172A APRIL 2005 REVISED DECEMBER 2005 Place 100-pF capacitors close to package pins. Place 22-nH inductors close to package pins. Figure Recommended Application Schematic
www.ti.com M0022-02
0.25 TYP
Notes: 9 Via Holes, Each 0.38 mm. Solder Mask. No Solder Mask Under Chip, On Lead Pads or On Ground Connections. Dimensions in mm DIA 0.38 TYP PIN 1
0.50 TYP
1.00 TYP
0.60 TYP
0.20 TYP
2.80 2.80 2.00 2.00 TRF1216 SLWS172A APRIL 2005 REVISED DECEMBER 2005 Figure 10. Recommended Pad Layout
Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) TRF1216IRGPR ACTIVE QFN RGP 20 3000 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR TRF1216IRGPRG3 ACTIVE QFN RGP 20 3000 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR TRF1216IRGPT ACTIVE QFN RGP 20 250 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR TRF1216IRGPTG3 ACTIVE QFN RGP 20 250 Green (RoHS & no Sb/Br) CU SN Level-3-260C-168 HR (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 5-Feb-2007 Addendum-Page 1
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