TPSTT733

TPS778 TI | Alldatasheet

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Technical content

/C0084/C0080/C0083/C0055/C0055/C0055/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0051/C0051 /C0119/C0105/C0116/C0104 /C0082/C0069/C0083/C0069/C0084 /C0079/C0085/C0084/C0080/C0085/C0084 /C0084/C0080/C0083/C0055/C0055/C0056/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0051/C0051 /C0119/C0105/C0116/C0104 /C0080/C0071 /C0079/C0085/C0084/C0080/C0085/C0084 /C0070/C0065/C0083/C0084/C0262/C0084/C0082/C0065/C0078/C0083/C0073/C0069/C0078/C0084/C0262/C0082/C0069/C0083/C0080/C0079/C0078/C0083/C0069 /C0055/C0053/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0068/C0082/C0079/C0080/C0079/C0085/C0084 /C0076/C0073/C0078/C0069/C0065/C0082 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0079/C0082/C0083 SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004 www.ti.com /C0068Open Drain Power-On Reset With 200 ms Delay (TPS777xx) /C0068Open Drain Power Good (TPS778xx) /C0068750-mA Low-Dropout Voltage Regulator /C0068Available in 1.5-V, 1.8-V, 2.5-V, 3.3-V Fixed Output and Adjustable Versions /C0068Dropout Voltage to 260 mV (Typ) at 750 mA (TPS77x33) /C0068Ultralow 85 /C0109A Typical Quiescent Current /C0068Fast Transient Response /C00682% Tolerance Over Specified Conditions for Fixed-Output Versions /C00688-Pin SOIC and 20-Pin TSSOP PowerPAD (PWP) Package /C0068Thermal Shutdown Protection

description

TPS777xx and TPS778xx are designed to have a fast transient response and be stable with a 10 µF low ESR capacitor. This combination provides high performance at a reasonable cost. TA − Free-Air Temperature − °C −40 0 20 120 103 −60 40 60 80 100 − Dropout Voltage − mVVDO TPS77x33 DROPOUT VOLTAGE vs FREE-AIR TEMPERATURE 102 101 100 10−1 10−2 −20 140 IO = 750 mA IO = 10 mA IO = 0 C o = 10 µF t − Time − µs TPS77x33 LOAD TRANSIENT RESPONSE I − Output Current − mAO VO − Change in∆ Output Voltage − mV 500 604020 80 100 140 120 160 180 2000 −50 1000 C o = 2x47 µF ESR = 1/2x100 mΩ VO = 3.3 V VI = 4.3 V /C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 Copyright  1999 − 2004, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. GND EN IN IN RESET /PG FB/NC OUT OUT D PACKAGE (TOP VIEW) NC − No internal connection GND/HSINK GND/HSINK GND NC EN IN IN NC GND/HSINK GND/HSINK GND/HSINK GND/HSINK NC NC RESET /PG FB/NC OUT OUT GND/HSINK GND/HSINK PWP PACKAGE (TOP VIEW)

shuts down the regulator, reducing the quiescent current to 1 µA at TJ = 25°C. undervoltage condition on the regulated output voltage. TPS778xx families are available in 8-pin SOIC and 20-pin PWP packages.

3.3 TPS77733PWP TPS77833PWP TPS77733D TPS77833D

2.5 TPS77725PWP TPS77825PWP TPS77725D TPS77825D

1.8 TPS77718PWP TPS77818PWP TPS77718D TPS77818D

packages are available taped and reeled. Add an R suffix to the device type (e.g., TPS77701DR). (1)See application information section for capacitor selection details. Figure 1. Typical Application Configuration for Fixed Output Options

/C0084/C0080/C0083/C0055/C0055/C0055/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0051/C0051 /C0119/C0105/C0116/C0104 /C0082/C0069/C0083/C0069/C0084 /C0079/C0085/C0084/C0080/C0085/C0084 /C0084/C0080/C0083/C0055/C0055/C0056/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0051/C0051 /C0119/C0105/C0116/C0104 /C0080/C0071 /C0079/C0085/C0084/C0080/C0085/C0084 /C0070/C0065/C0083/C0084/C0262/C0084/C0082/C0065/C0078/C0083/C0073/C0069/C0078/C0084/C0262/C0082/C0069/C0083/C0080/C0079/C0078/C0083/C0069 /C0055/C0053/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0068/C0082/C0079/C0080/C0079/C0085/C0084 /C0076/C0073/C0078/C0069/C0065/C0082 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0079/C0082/C0083 SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004 www.ti.com functional block diagram—adjustable version 200 ms Delay (for RESET Option) Vref = 1.1834 V OUT FB/NC EN GND PG or RESET IN External to the device functional block diagram—fixed-voltage version Vref = 1.1834 V OUT EN GND PG or RESET IN 200 ms Delay (for RESET Option)

/C0084/C0080/C0083/C0055/C0055/C0055/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0051/C0051 /C0119/C0105/C0116/C0104 /C0082/C0069/C0083/C0069/C0084 /C0079/C0085/C0084/C0080/C0085/C0084 /C0084/C0080/C0083/C0055/C0055/C0056/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0051/C0051 /C0119/C0105/C0116/C0104 /C0080/C0071 /C0079/C0085/C0084/C0080/C0085/C0084 /C0070/C0065/C0083/C0084/C0262/C0084/C0082/C0065/C0078/C0083/C0073/C0069/C0078/C0084/C0262/C0082/C0069/C0083/C0080/C0079/C0078/C0083/C0069 /C0055/C0053/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0068/C0082/C0079/C0080/C0079/C0085/C0084 /C0076/C0073/C0078/C0069/C0065/C0082 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0079/C0082/C0083 SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004 www.ti.com Terminal Functions TERMINAL I/O DESCRIPTIONNAME NO. I/O DESCRIPTION EN 2 I Enable input FB/NC 7 I Feedback input voltage for adjustable device (no connect for fixed options) GND 1 Regulator ground IN 3, 4 I Input voltage OUT 5, 6 O Regulated output voltage RESET 8 O RESET output TERMINAL I/O DESCRIPTIONNAME NO. I/O DESCRIPTION EN 5 I Enable input FB/NC 15 I Feedback input voltage for adjustable device (no connect for fixed options) GND 3 Regulator ground GND/HSINK 1, 2, 9, 10, 11, 12, 19, 20 Ground/heatsink IN 6, 7 I Input NC 4, 8, 17, 18 No connect OUT 13, 14 O Regulated output voltage RESET 16 O RESET output TERMINAL I/O DESCRIPTIONNAME NO. I/O DESCRIPTION EN 2 I Enable input FB/NC 7 I Feedback input voltage for adjustable device (no connect for fixed options) GND 1 Regulator ground IN 3, 4 I Input voltage OUT 5, 6 O Regulated output voltage PG 8 O PG output TERMINAL I/O DESCRIPTIONNAME NO. I/O DESCRIPTION EN 5 I Enable input FB/NC 15 I Feedback input voltage for adjustable device (no connect for fixed options) GND 3 Regulator ground GND/HSINK 1, 2, 9, 10, 11, 12, 19, 20 Ground/heatsink IN 6, 7 I Input NC 4, 8, 17, 18 No connect OUT 13, 14 O Regulated output voltage PG 16 O PG output

/C0084/C0080/C0083/C0055/C0055/C0055/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0051/C0051 /C0119/C0105/C0116/C0104 /C0082/C0069/C0083/C0069/C0084 /C0079/C0085/C0084/C0080/C0085/C0084 /C0084/C0080/C0083/C0055/C0055/C0056/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0051/C0051 /C0119/C0105/C0116/C0104 /C0080/C0071 /C0079/C0085/C0084/C0080/C0085/C0084 /C0070/C0065/C0083/C0084/C0262/C0084/C0082/C0065/C0078/C0083/C0073/C0069/C0078/C0084/C0262/C0082/C0069/C0083/C0080/C0079/C0078/C0083/C0069 /C0055/C0053/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0068/C0082/C0079/C0080/C0079/C0085/C0084 /C0076/C0073/C0078/C0069/C0065/C0082 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0079/C0082/C0083 SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004 www.ti.com TPS777xx RESET timing diagram (1)Vres is the minimum input voltage for a valid RESET. The symbol Vres is not currently listed within EIA or JEDEC standards for semiconductor symbology. ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ ÎÎ VI Vres(1) Vres t t t VO Threshold Voltage RESET Output 200 ms Delay 200 ms Delay Output Undefined Output Undefined VIT+(2) VIT−(2) VIT−(2) VIT+(2) Less than 5% of the output voltage (2)VIT −Trip voltage is typically 5% lower than the output voltage (95%VO ) VIT− to VIT+ is the hysteresis voltage.

/C0084/C0080/C0083/C0055/C0055/C0055/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0051/C0051 /C0119/C0105/C0116/C0104 /C0082/C0069/C0083/C0069/C0084 /C0079/C0085/C0084/C0080/C0085/C0084 /C0084/C0080/C0083/C0055/C0055/C0056/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0051/C0051 /C0119/C0105/C0116/C0104 /C0080/C0071 /C0079/C0085/C0084/C0080/C0085/C0084 /C0070/C0065/C0083/C0084/C0262/C0084/C0082/C0065/C0078/C0083/C0073/C0069/C0078/C0084/C0262/C0082/C0069/C0083/C0080/C0079/C0078/C0083/C0069 /C0055/C0053/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0068/C0082/C0079/C0080/C0079/C0085/C0084 /C0076/C0073/C0078/C0069/C0065/C0082 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0079/C0082/C0083 SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004 www.ti.com absolute maximum ratings over operating free-air temperature range (unless otherwise noted)(1) (1)Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2)All voltage values are with respect to network terminal ground. DISSIPATION RATING TABLE 1 − FREE-AIR TEMPERATURES PACKAGE AIR FLOW (CFM) TA < 25°C POWER RATING DERATING FACTOR ABOVE T A = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING D 0 568 mW 5.68 mW/°C 312 mW 227 mWD 250 904 mW 9.04 mW/°C 497 mW 361 mW DISSIPATION RATING TABLE 2 − FREE-AIR TEMPERATURES PACKAGE AIR FLOW (CFM) TA < 25°C POWER RATING DERATING FACTOR ABOVE T A = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING PWP § 0 2.9 W 23.5 mW/°C 1.9 W 1.5 W PWP § 300 4.3 W 34.6 mW/ °C 2.8 W 2.2 W PWP ¶ 0 3 W 23.8 mW/°C 1.9 W 1.5 W PWP ¶ 300 7.2 W 57.9 mW/°C 4.6 W 3.8 W (1)This parameter is measured with the recommended copper heat sink pattern on a 1-layer PCB, 5 in × 5 in PCB, 1 oz. copper, 2 in × 2 in coverage (4 in2). (2)This parameter is measured with the recommended copper heat sink pattern on a 8-layer PCB, 1.5 in × 2 in PCB, 1 oz. copper with layers 1, 2, 4, 5, 7, and 8 at 5% coverage (0.9 in2) and layers 3 and 6 at 100% coverage (6 in2). For more information, refer to TI technical brief SLMA002. recommended operating conditions MIN MAX UNIT Input voltage, VI(1) 2.7 10 V Output voltage range, VO TPS77701 1.5 5.5 VOutput voltage range, VO TPS77801 1.2 5.5 V Operating junction temperature, TJ −40 125 °C (1) Minimum VIN = VOUT + VDO or 2.7V, whichever is greater.

/C0084/C0080/C0083/C0055/C0055/C0055/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0051/C0051 /C0119/C0105/C0116/C0104 /C0082/C0069/C0083/C0069/C0084 /C0079/C0085/C0084/C0080/C0085/C0084 /C0084/C0080/C0083/C0055/C0055/C0056/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0051/C0051 /C0119/C0105/C0116/C0104 /C0080/C0071 /C0079/C0085/C0084/C0080/C0085/C0084 /C0070/C0065/C0083/C0084/C0262/C0084/C0082/C0065/C0078/C0083/C0073/C0069/C0078/C0084/C0262/C0082/C0069/C0083/C0080/C0079/C0078/C0083/C0069 /C0055/C0053/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0068/C0082/C0079/C0080/C0079/C0085/C0084 /C0076/C0073/C0078/C0069/C0065/C0082 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0079/C0082/C0083 SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004 www.ti.com electrical characteristics over recommended operating temperature range (TJ = −40°C to 125°C), VI = VO(typ) + 1 V, IO = 1 mA, EN = 0 V, Co = 10 µF (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TPS77701 TPS77801 TPS77x15 TJ = 25°C, 2.7 V < V IN < 10 V 1.5 Output voltage (10 A to 750 mA load) TPS77x15 TJ = −40°C to 125°C, 2.7 V < VIN < 10 V 1.470 1.530 VOutput voltage (10 µA to 750 mA load) TPS77x18 TJ = 25°C, 2.8 V < V IN < 10 V 1.8 V TPS77x18 TJ = −40°C to 125°C, 2.8 V < VIN < 10 V 1.764 1.836 TPS77x25 TJ = 25°C, 3.5 V < V IN < 10 V 2.5 TPS77x25 TJ = −40°C to 125°C, 3.5 V < VIN < 10 V 2.450 2.550 TPS77x33 TJ = 25°C, 4.3 V < V IN < 10 V 3.3 TPS77x33 TJ = −40°C to 125°C, 4.3 V < VIN < 10 V 3.234 3.366 Quiescent current (GND current) 10 µA < IO < 750 mA, TJ = 25°C 85 AQuiescent current (GND current) IO = 750 mA 125 µA Output voltage line regulation (∆VO /VO ) VO + 1 V < VI ≤ 10 V, TJ = 25°C 0.01 %/V Load regulation 3 mV Output noise voltage (TPS77x18) BW = 200 Hz to 100 kHz, Co = 10 µF, TJ = 25°C, IC = 750 µA 54 µVrms Output current limit VO = 0 V 1.2 1.7 2 A Thermal shutdown junction temperature 150 °C Standby current EN = VI, TJ = 25°C,

2.7 V < VI < 10 V 1 µA

Standby current EN = VI,

2.7 V < VI < 10 V 10 µA

FB input current TPS77x01 FB = 1.5 V 2 nA High level enable input voltage 1.7 V Low level enable input voltage 0.9 V Power supply ripple rejection f = 1 KHz, C o = 10 µF, TJ = 25°C 60 dB Minimum input voltage for valid RESETIO(RESET) = 300 µA 1.1 V Trip threshold voltage VO decreasing 92 98 %V O Reset (TPS777xx) Hysteresis voltage Measured at VO 0.5 %V OReset (TPS777xx) Output low voltage VI = 2.7 V, I O(RESET) = 1 mA 0.15 0.4 V Leakage current V(RESET) = 5 V 1 µA RESET time-out delay 200 ms

/C0084/C0080/C0083/C0055/C0055/C0055/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0051/C0051 /C0119/C0105/C0116/C0104 /C0082/C0069/C0083/C0069/C0084 /C0079/C0085/C0084/C0080/C0085/C0084 /C0084/C0080/C0083/C0055/C0055/C0056/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0051/C0051 /C0119/C0105/C0116/C0104 /C0080/C0071 /C0079/C0085/C0084/C0080/C0085/C0084 /C0070/C0065/C0083/C0084/C0262/C0084/C0082/C0065/C0078/C0083/C0073/C0069/C0078/C0084/C0262/C0082/C0069/C0083/C0080/C0079/C0078/C0083/C0069 /C0055/C0053/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0068/C0082/C0079/C0080/C0079/C0085/C0084 /C0076/C0073/C0078/C0069/C0065/C0082 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0079/C0082/C0083 SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004 www.ti.com electrical characteristics over recommended operating temperature range (TJ = −40°C to 125°C), VI = VO(typ) + 1 V, IO = 1 mA, EN = 0 V, Co = 10 µF (unless otherwise noted) (continued) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Minimum input voltage for valid PG IO(PG) = 300 µA 1.1 V PG Trip threshold voltage VO decreasing 92 98 %V O PG (TPS778xx) Hysteresis voltage Measured at VO 0.5 %V O(TPS778xx) Output low voltage VI = 2.7 V, IO(PG) = 1 mA 0.15 0.4 V Leakage current V(PG) = 5 V 1 µA Input current (EN) EN = 0 V −1 0 1 AInput current (EN) EN = VI −1 1 µA TPS77733 IO = 750 mA, TJ = 25°C 260 Dropout voltage (1) TPS77733 IO = 750 mA, 427 mVDropout voltage (1) TPS77833 IO = 750 mA, TJ = 25°C 260 mV TPS77833 IO = 750 mA, 427 (1)IN voltage equals VO (typ) − 100 mV; TPS77x01 output voltage set to 3.3 V nominal with external resistor divider. TPS77x15, TPS77x18, and TPS77x25 dropout voltage limited by input voltage range limitations (i.e., TPS77x33 input voltage needs to drop to 3.2 V for purpose of this test). TYPICAL CHARACTERISTICS Table of Graphs FIGURE VO Output voltage vs Output current 2, 3, 4 VO Output voltage vs Free-air temperature 5, 6, 7 Ground current vs Free-air temperature 8 Power supply ripple rejection vs Frequency 9 Output spectral noise density vs Frequency 10 Zo Output impedance vs Frequency 11 VDO Dropout voltage vs Input voltage 12 VDO Dropout voltage vs Free-air temperature 13 Input voltage (min) vs Output voltage 14 Line transient response 15, 17 Load transient response 16, 18 VO Output voltage vs Time 19 Equivalent series resistance (ESR) vs Output current 21 − 24

/C0084/C0080/C0083/C0055/C0055/C0055/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0051/C0051 /C0119/C0105/C0116/C0104 /C0082/C0069/C0083/C0069/C0084 /C0079/C0085/C0084/C0080/C0085/C0084 /C0084/C0080/C0083/C0055/C0055/C0056/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0051/C0051 /C0119/C0105/C0116/C0104 /C0080/C0071 /C0079/C0085/C0084/C0080/C0085/C0084 /C0070/C0065/C0083/C0084/C0262/C0084/C0082/C0065/C0078/C0083/C0073/C0069/C0078/C0084/C0262/C0082/C0069/C0083/C0080/C0079/C0078/C0083/C0069 /C0055/C0053/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0068/C0082/C0079/C0080/C0079/C0085/C0084 /C0076/C0073/C0078/C0069/C0065/C0082 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0079/C0082/C0083 SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004 www.ti.com

APPLICATION INFORMATION

The TPS777xx and TPS778xx families include four fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, and 3.3 V), and an adjustable regulator, the TPS77x01 (adjustable from 1.5 V to 5.5 V for TPS77701 option and 1.2 V to 5.5 V for TPS77801 option). device operation The TPS777xx and TPS778xx feature very low quiescent current, which remains virtually constant even with varying loads. Conventional LDO regulators use a pnp pass element, the base current of which is directly proportional to the load current through the regulator (I B = IC /β). The TPS777xx and TPS778xx use a PMOS transistor to pass current; because the gate of the PMOS is voltage driven, operating current is low and invariable over the full load range. Another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes into dropout. The resulting drop in β forces an increase in IB to maintain the load. During power up, this translates to large start-up currents. Systems with limited supply current may fail to start up. In battery-powered systems, it means rapid battery discharge when the voltage decays below the minimum required for regulation. The TPS777xx and TPS778xx quiescent currents remain low even when the regulator drops out, eliminating both problems. The TPS777xx and TPS778xx families also feature a shutdown mode that places the output in the high-impedance state (essentially equal to the feedback-divider resistance) and reduces quiescent current to 2 µA. If the shutdown feature is not used, EN should be tied to ground. minimum load requirements The TPS777xx and TPS778xx families are stable even at zero load; no minimum load is required for operation. FB—pin connection (adjustable version only) The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option . The output voltage is sensed through a resistor divider network to close the loop as it is shown in Figure 26. Normally, this connection should be as short as possible; however, the connection can be made near a critical circuit to improve performance at that point. Internally, FB connects to a high-impedance wide-bandwidth amplifier and noise pickup feeds through to the regulator output. Routing the FB connection to minimize/avoid noise pickup is essential. external capacitor requirements An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047 µF or larger) improves load transient response and noise rejection if the TPS777xx or TPS778xx are located more than a few inches from the power supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load transients with fast rise times are anticipated. Like all low dropout regulators, the TPS777xx and TPS778xx require an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance value is 10 µF and the ESR (equivalent series resistance) must be between 50 mΩ and 1.5 Ω. Capacitor values 10 µF or larger are acceptable, provided the ESR is less than 1.5 Ω. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided they meet the requirements described previously.

/C0084/C0080/C0083/C0055/C0055/C0055/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0051/C0051 /C0119/C0105/C0116/C0104 /C0082/C0069/C0083/C0069/C0084 /C0079/C0085/C0084/C0080/C0085/C0084 /C0084/C0080/C0083/C0055/C0055/C0056/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0051/C0051 /C0119/C0105/C0116/C0104 /C0080/C0071 /C0079/C0085/C0084/C0080/C0085/C0084 /C0070/C0065/C0083/C0084/C0262/C0084/C0082/C0065/C0078/C0083/C0073/C0069/C0078/C0084/C0262/C0082/C0069/C0083/C0080/C0079/C0078/C0083/C0069 /C0055/C0053/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0068/C0082/C0079/C0080/C0079/C0085/C0084 /C0076/C0073/C0078/C0069/C0065/C0082 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0079/C0082/C0083 SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004 www.ti.com The TPS777xx features a RESET output that can be used to monitor the status of the regulator. The internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal regulated value, the RESET output transistor turns on, taking the signal low. The open-drain output requires a pullup resistor. If not used, it can be left floating. RESET can be used to drive power-on reset circuitry or as a low-battery indicator. RESET does not assert itself when the regulated output voltage falls outside the specified 2% tolerance, but instead reports an output voltage low relative to its nominal regulated value (refer to timing diagram for start-up sequence). power-good indicator The TPS778xx features a power-good (PG) output that can be used to monitor the status of the regulator. The internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal regulated value, the PG output transistor turns on, taking the signal low. The open-drain output requires a pullup resistor. If not used, it can be left floating. PG can be used to drive power-on reset circuitry or used as a low-battery indicator. regulator protection The TPS777xx and TPS778xx PMOS-pass transistors have a built-in back diode that conducts reverse currents when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be appropriate. The TPS777xx and TPS778xx also feature internal current limiting and thermal protection. During normal operation, the TPS777xx and TPS778xx limit output current to approximately 1.7 A. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds 150°C(typ), thermal-protection circuitry shuts it down. Once the device has cooled below 130°C(typ), regulator operation resumes.

/C0084/C0080/C0083/C0055/C0055/C0055/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0055/C0051/C0051 /C0119/C0105/C0116/C0104 /C0082/C0069/C0083/C0069/C0084 /C0079/C0085/C0084/C0080/C0085/C0084 /C0084/C0080/C0083/C0055/C0055/C0056/C0048/C0049/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0049/C0056/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0050/C0053/C0044 /C0084/C0080/C0083/C0055/C0055/C0056/C0051/C0051 /C0119/C0105/C0116/C0104 /C0080/C0071 /C0079/C0085/C0084/C0080/C0085/C0084 /C0070/C0065/C0083/C0084/C0262/C0084/C0082/C0065/C0078/C0083/C0073/C0069/C0078/C0084/C0262/C0082/C0069/C0083/C0080/C0079/C0078/C0083/C0069 /C0055/C0053/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0068/C0082/C0079/C0080/C0079/C0085/C0084 /C0076/C0073/C0078/C0069/C0065/C0082 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0079/C0082/C0083 SLVS230G − SEPTEMBER 1999 − REVISED JANUARY 2004 www.ti.com POWER DISSIPATION AND JUNCTION TEMPERATURE Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, P D(max), and the actual dissipation, PD , which must be less than or equal to PD(max). The maximum-power-dissipation limit is determined using the following equation: P D(max) /C0043 TJmax /C0042TA R /C0113JA Where: TJmax is the maximum allowable junction temperature. TA is the ambient temperature. R θJA is the thermal resistance junction-to-ambient for the package, and is calculated as derating factorfrom the dissipation rating tables. The regulator dissipation is calculated using: P D /C0043/C0466V I/C0042V O /C0467/C0032IO Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermal protection circuit.

www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TPS77701D Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77701 TPS77701D.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77701 TPS77701DR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77701 TPS77701DR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77701 TPS77701PWP Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77701 TPS77701PWP.A Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77701 TPS77701PWPR Active Production HTSSOP (PWP) | 20 2000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77701 TPS77701PWPR.A Active Production HTSSOP (PWP) | 20 2000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77701 TPS77715D Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77715 TPS77715D.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77715 TPS77715DR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77715 TPS77715DR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77715 TPS77715PWP Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77715 TPS77715PWP.A Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77715 TPS77715PWPG4 Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77715 TPS77718D Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77718 TPS77718D.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77718 TPS77718DR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77718 TPS77718DR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77718 TPS77718PWP Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77718 TPS77718PWP.A Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77718 TPS77718PWPG4 Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77718 TPS77718PWPR Active Production HTSSOP (PWP) | 20 2000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77718 TPS77718PWPR.A Active Production HTSSOP (PWP) | 20 2000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77718 TPS77725D Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77725 TPS77725D.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77725 TPS77725PWP Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77725 TPS77725PWP.A Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77725 TPS77725PWPR Active Production HTSSOP (PWP) | 20 2000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77725 Addendum-Page 1

www.ti.com 23-May-2025 Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TPS77725PWPR.A Active Production HTSSOP (PWP) | 20 2000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77725 TPS77733D Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77733 TPS77733D.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77733 TPS77733DR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77733 TPS77733DR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77733 TPS77733PWP Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77733 TPS77733PWP.A Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77733 TPS77733PWPR Active Production HTSSOP (PWP) | 20 2000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77733 TPS77733PWPR.A Active Production HTSSOP (PWP) | 20 2000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77733 TPS77801D Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77801 TPS77801D.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77801 TPS77801DG4 Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77801 TPS77801DR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77801 TPS77801DR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77801 TPS77801PWP Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77801 TPS77801PWP.A Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77801 TPS77801PWPG4 Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77801 TPS77801PWPR Active Production HTSSOP (PWP) | 20 2000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77801 TPS77801PWPR.A Active Production HTSSOP (PWP) | 20 2000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77801 TPS77801PWPRG4 Active Production HTSSOP (PWP) | 20 2000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77801 TPS77815D Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77815 TPS77815D.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77815 TPS77815DR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77815 TPS77815DR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77815 TPS77815PWP Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77815 TPS77815PWP.A Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77815 TPS77815PWPG4 Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77815 TPS77815PWPR Active Production HTSSOP (PWP) | 20 2000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77815 TPS77815PWPR.A Active Production HTSSOP (PWP) | 20 2000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77815 TPS77818D Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77818 TPS77818D.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77818 Addendum-Page 2

www.ti.com 23-May-2025 Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TPS77818PWP Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77818 TPS77818PWP.A Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77818 TPS77818PWPG4 Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77818 TPS77818PWPR Active Production HTSSOP (PWP) | 20 2000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77818 TPS77818PWPR.A Active Production HTSSOP (PWP) | 20 2000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77818 TPS77825D Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77825 TPS77825D.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77825 TPS77825DR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77825 TPS77825DR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77825 TPS77825PWP Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77825 TPS77825PWP.A Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77825 TPS77825PWPR Active Production HTSSOP (PWP) | 20 2000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77825 TPS77825PWPR.A Active Production HTSSOP (PWP) | 20 2000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77825 TPS77833D Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77833 TPS77833D.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77833 TPS77833DR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77833 TPS77833DR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 77833 TPS77833PWP Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77833 TPS77833PWP.A Active Production HTSSOP (PWP) | 20 70 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77833 TPS77833PWPR Active Production HTSSOP (PWP) | 20 2000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77833 TPS77833PWPR.A Active Production HTSSOP (PWP) | 20 2000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PT77833 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Addendum-Page 3

www.ti.com 23-May-2025 (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 4

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS77701DR SOIC D 8 2500 350.0 350.0 43.0 TPS77701PWPR HTSSOP PWP 20 2000 356.0 356.0 35.0 TPS77715DR SOIC D 8 2500 350.0 350.0 43.0 TPS77718DR SOIC D 8 2500 350.0 350.0 43.0 TPS77718PWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS77725PWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS77733DR SOIC D 8 2500 350.0 350.0 43.0 TPS77733PWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS77801DR SOIC D 8 2500 350.0 350.0 43.0 TPS77801PWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS77815DR SOIC D 8 2500 350.0 350.0 43.0 TPS77815PWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS77818PWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS77825DR SOIC D 8 2500 350.0 350.0 43.0 TPS77825PWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 TPS77833DR SOIC D 8 2500 350.0 350.0 43.0 TPS77833PWPR HTSSOP PWP 20 2000 350.0 350.0 43.0 Pack Materials-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) TPS77701D D SOIC 8 75 505.46 6.76 3810 4 TPS77701D.A D SOIC 8 75 505.46 6.76 3810 4 TPS77701PWP PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77701PWP.A PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77715D D SOIC 8 75 505.46 6.76 3810 4 TPS77715D.A D SOIC 8 75 505.46 6.76 3810 4 TPS77715PWP PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77715PWP.A PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77715PWPG4 PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77718D D SOIC 8 75 505.46 6.76 3810 4 TPS77718D.A D SOIC 8 75 505.46 6.76 3810 4 TPS77718PWP PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77718PWP.A PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77718PWPG4 PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77725D D SOIC 8 75 505.46 6.76 3810 4 TPS77725D.A D SOIC 8 75 505.46 6.76 3810 4 TPS77725PWP PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77725PWP.A PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77733D D SOIC 8 75 505.46 6.76 3810 4 TPS77733D.A D SOIC 8 75 505.46 6.76 3810 4 TPS77733PWP PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77733PWP.A PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77801D D SOIC 8 75 505.46 6.76 3810 4 TPS77801D.A D SOIC 8 75 505.46 6.76 3810 4 TPS77801DG4 D SOIC 8 75 505.46 6.76 3810 4 TPS77801PWP PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77801PWP.A PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77801PWPG4 PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77815D D SOIC 8 75 505.46 6.76 3810 4 Pack Materials-Page 4

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) TPS77815D.A D SOIC 8 75 505.46 6.76 3810 4 TPS77815PWP PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77815PWP.A PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77815PWPG4 PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77818D D SOIC 8 75 505.46 6.76 3810 4 TPS77818D.A D SOIC 8 75 505.46 6.76 3810 4 TPS77818PWP PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77818PWP.A PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77818PWPG4 PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77825D D SOIC 8 75 505.46 6.76 3810 4 TPS77825D.A D SOIC 8 75 505.46 6.76 3810 4 TPS77825PWP PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77825PWP.A PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77833D D SOIC 8 75 505.46 6.76 3810 4 TPS77833D.A D SOIC 8 75 505.46 6.76 3810 4 TPS77833PWP PWP HTSSOP 20 70 530 10.2 3600 3.5 TPS77833PWP.A PWP HTSSOP 20 70 530 10.2 3600 3.5 Pack Materials-Page 5

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