TPSC106025R0500

TPS60101_16 TI1 | Alldatasheet

Document overview

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Technical content

/C0084/C0080/C0083/C0054/C0048/C0049/C0048/C0049 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0069/C0068 /C0051/C0046/C0051/C0262/C0086 /C0049/C0048/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0078/C0079/C0073/C0083/C0069 /C0067/C0072/C0065/C0082/C0071/C0069 /C0080/C0085/C0077/C0080 /C0068/C0067/C0047/C0068/C0067 /C0067/C0079/C0078/C0086/C0069/C0082/C0084/C0069/C0082 SLVS214B − JUNE 1999 − REVISED AUGUST 2008 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

features

/C0068Up to 100-mA Output Current /C0068Less Than 5-mVpp Output Voltage Ripple /C0068No Inductors Required/Low EMI /C0068Regulated 3.3-V ±4% Output /C0068Only Four External Components Required /C0068Up to 90% Efficiency /C00681.8-V to 3.6-V Input Voltage Range /C006850-µA Quiescent Supply Current /C00680.05-µA Shutdown Current /C0068Load Isolated in Shutdown /C0068Space-Saving Thermally-Enhanced TSSOP PowerPAD  Package /C0068Evaluation Module Available (TPS60100EVM−131)

applications

Replaces DC/DC Converters With Inductors in − Battery-Powered Applications − Two Battery Cells to 3.3-V Conversion − Portable Instruments − Battery-Powered Microprocessor and DSP Systems − Miniature Equipment − Backup-Battery Boost Converters − PDAs − Laptops − Handheld Instrumentation − Medical Instruments − Cordless Phones

description

The TPS60101 step-up, regulated charge pump generates a 3.3-V ±4% output voltage from a 1.8-V to 3.6-V input voltage (two alkaline, NiCd, or NiMH batteries). Output current is 100 mA from a 2-V input. Only four external capacitors are needed to build a complete low-noise dc/dc converter. The push-pull operating mode of two single-ended charge pumps assures the low output voltage ripple as current is continuously transferred to the output. From a 2-V input, the TPS60101 can start into full load with loads as low as 33 Ω. The TPS60101 features either constant frequen- cy mode to minimize noise and output voltage ripple or the power-saving pulse-skip mode to extend battery life at light loads. The TPS60101 switching frequency is 300 kHz. The logic shutdown function reduces the supply current to 1-µA (max) and disconnects the load from the input. Special current-control circuitry prevents excessive current from being drawn from the battery during start-up. This DC/DC converter requires no inductors and has low EMI. It is available in the small 20-pin TSSOP PowerPAD package (PWP). Copyright  1999, Texas Instruments Incorporated/C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments Incorporated. output voltage ripple typical operating circuit Figure 1 3.45 3.25 3.3 3.35 3.4 3.05 3.1 3.15 3.2 501234 6789 t − Time − µs − Output Voltage − VVO SKIP =COM = 3V8 = 0 V VIN = 2.4 V VO = 3.3 V IO = 100 mA C O = 22 µF X5R Ceramic IN IN C1+ C1− ENABLE OUT OUT FB C2+ C2− SYNC SKIP COM 3V8 PGND GND INPUT

1.8 V to

3.6 V C IN 4.7 µF OUTPUT 3.3 V 100 mA C O 10 µF C 2F 1 µF C 1F 1 µF OFF/ON TPS60101

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Figure 2. Bottom View of PWP Package, option, add an R suffix to the part number (e.g., TPS60101PWPR). connected to IN the regulator operates in preregulated 3.8-V mode. connected to IN the regulator operates in single-ended mode requiring only one flying capacitor. is on chip to match internal reference voltage of 1.22 V. GND 1, 20 GROUND. Analog ground for internal reference and control circuitry. Connect to PGND through a short trace. Connect both INs through a short trace. capacitor CO . VO = 3.3 V when 3V8 = low and VO = 3.8 V when 3V8 = high. PGND 9−12 PGND power ground. Charge-pump current flows through this pin. Connect all PGNDs together. and noise are minimized in this mode. When SKIP is connect to IN, the device operates in pulse skip mode. Quiescent current is lowest in this mode. in the regulated 3.3-V mode.

/C0084/C0080/C0083/C0054/C0048/C0049/C0048/C0049 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0069/C0068 /C0051/C0046/C0051/C0262/C0086 /C0049/C0048/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0078/C0079/C0073/C0083/C0069 /C0067/C0072/C0065/C0082/C0071/C0069 /C0080/C0085/C0077/C0080 /C0068/C0067/C0047/C0068/C0067 /C0067/C0079/C0078/C0086/C0069/C0082/C0084/C0069/C0082 SLVS214B − JUNE 1999 − REVISED AUGUST 2008

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics at CIN = 10 µF, C1F = C2F = 2.2 µF†, CO = 22 µF, TC = −40°C to 85°C, VIN = 2 V, VFB = VO , VENABLE = VIN, VSKIP = VIN or 0 V and VCOM = V3V8 = VSYNC = 0 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIN Input voltage 1.8 3.6 V VIN(UV) Input undervoltage lockout threshold 1.6 1.8 V IO(MAX) Maximum output current 100 mA VO Output voltage

1.8 V < VIN < 2 V, 0 < I O < 50 mA,

VO(Start-Up) = 3.3 V, TC = 25°C 3.17 3.3 3.43 VVO Output voltage 2 V < VIN < 3.3 V, 0 < I O < 100 mA 3.17 3.3 3.43 V VO(RIP) Output voltage ripple IO = 100 mA, V SKIP = 0 V 5‡ mV PP IO(LEAK) Output leakage current VIN = 2.4 V, V ENABLE = 0 V 1 µA IQ Quiescent current VSKIP = VIN = 2.4 V 50 90 µA IQ Quiescent current (no-load input current) VSKIP = VIN = 2.4 V VSKIP = 0 V, V IN = 2.4 V 1.5 mA IDD(SDN) Shutdown supply current VIN = 2.4 V, V ENABLE = 0 V 0.05 1 µA fOSC(int) Internal switching frequency VIN = 2.4 V 200 300 400 kHz fOSC(ext) External clock frequency VSYNC = VIN,V IN = 1.8V to 3.6 V 400 600 800 kHz External clock duty cycle VSYNC = VIN,V IN = 1.8V to 3.6 V 20% 80% Efficiency IO = 50 mA 80% VINL Input voltage low, ENABLE, SKIP, COM, 3V8, SYNC VIN = 1.8 V 0.3 × VIN V VINH Input voltage high, ENABLE, SKIP, COM, 3V8, SYNC VIN = 3.6 V 0.7 × VIN V II(LEAK) Input leakage current, ENABLE, SKIP, COM, 3V8, SYNC VENABLE = VSKIP = VCOM = V3V8 = VSYNC = VGND or VIN 0.01 0.1 µA Output load regulation VO = 3.3 V, 1 mA < I O < 100 mA TC = 25°C 0.004 %/mA Output line regulation 2 V < VIN < 3.3 V, V O = 3.3 V, IO = 50 mA, T C = 25°C 0.6 %/V Short circuit current VIN = 2.4 V V O = 0 V, TC = 25°C 125 mA † Use only ceramic capacitors with X5R or X7R dielectric as flying capacitors. ‡ Achieved with CO = 22 µF X5R dielectric ceramic capacitor

/C0084/C0080/C0083/C0054/C0048/C0049/C0048/C0049 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0069/C0068 /C0051/C0046/C0051/C0262/C0086 /C0049/C0048/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0078/C0079/C0073/C0083/C0069 /C0067/C0072/C0065/C0082/C0071/C0069 /C0080/C0085/C0077/C0080 /C0068/C0067/C0047/C0068/C0067 /C0067/C0079/C0078/C0086/C0069/C0082/C0084/C0069/C0082 SLVS214B − JUNE 1999 − REVISED AUGUST 2008 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics for preregulated 3.8-V Mode (V(3V8) = V IN), at CIN = 10 µF, C 1F = C2F = 2.2 µF†, CO = 22 µF, TC = −40°C to 85°C, VIN = 2.4 V, VFB = VO , VENABLE = VIN, VSKIP = VIN or 0 V and VCOM = VSYNC = 0 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIN Input voltage 2.2 3.6 V IO(MAX) Maximum output current 100 mA VO Output voltage 2.2 V < VIN < 3.6 V, 0 < IO < 100 mA 3.6 3.8 4 V IO(LEAK) Output leakage current VENABLE = 0 V 1 µA IQ Quiescent current VSKIP = VIN 60 µA IQ Quiescent current (no-load input current) VSKIP = 0 V 2 mA IDD(SDN) Shutdown supply current VENABLE = 0 V 0.05 1 µA fOSC Internal switching frequency 200 300 400 kHz Short circuit current VO = 0 V, T C = 25°C 125 mA † Use only ceramic capacitors with X5R or X7R dielectric as flying capacitors.

/C0084/C0080/C0083/C0054/C0048/C0049/C0048/C0049 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0069/C0068 /C0051/C0046/C0051/C0262/C0086 /C0049/C0048/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0078/C0079/C0073/C0083/C0069 /C0067/C0072/C0065/C0082/C0071/C0069 /C0080/C0085/C0077/C0080 /C0068/C0067/C0047/C0068/C0067 /C0067/C0079/C0078/C0086/C0069/C0082/C0084/C0069/C0082 SLVS214B − JUNE 1999 − REVISED AUGUST 2008

6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS † Figure 5 0.1 1 10 Efficiency − % EFFICIENCY vs OUTPUT CURRENT (V O = 3.3 V) 100 100 1000 IO − Output Current − mA V(SKIP) = VIN, V(3V8) = 0 V VIN = 1.8 V VIN = 2 V VIN = 2.4 V VIN = 2.7 V Figure 6 11 0 Efficiency − % EFFICIENCY vs OUTPUT CURRENT (V O = 3.3 V) 100 100 1000 IO − Output Current − mA V(SKIP) = 0 V V(3V8) = 0 V VIN = 1.8 V VIN = 2 V VIN = 2.4 V VIN = 2.7 V Figure 7 0.1 1 10 Efficiency − % EFFICIENCY vs OUTPUT CURRENT (V O = 3.8 V) 100 100 1000 IO − Output Current − mA V(SKIP) = VIN V(3V8) = VIN VIN = 3 V VIN = 2.3 V VIN = 2.7 V Figure 8 11 0 Efficiency − % EFFICIENCY vs OUTPUT CURRENT (V O = 3.8 V) 100 100 1000 IO − Output Current − mA V(SKIP) = 0 V V(3V8) = VIN VIN = 3 V VIN = 2.3 V VIN = 2.7 V †T C = 25°C, VCOM = VSYNC = 0 V, CIN = 10 µF, C1F = C2F = 2.2 µF, CO = 22 µF, unless otherwise noted

/C0084/C0080/C0083/C0054/C0048/C0049/C0048/C0049 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0069/C0068 /C0051/C0046/C0051/C0262/C0086 /C0049/C0048/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0078/C0079/C0073/C0083/C0069 /C0067/C0072/C0065/C0082/C0071/C0069 /C0080/C0085/C0077/C0080 /C0068/C0067/C0047/C0068/C0067 /C0067/C0079/C0078/C0086/C0069/C0082/C0084/C0069/C0082 SLVS214B − JUNE 1999 − REVISED AUGUST 2008

8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS † Figure 13 3.35 3.2 3.1 1.5 2 2.5 3 − Output Voltage − V 3.4 3.45 OUTPUT VOLTAGE vs INPUT VOLTAGE 3.5 3.5 4 3.3 3.25 3.15 3.05 VIN − Input Voltage − V VO V(SKIP) = VIN or 0 V V(3V8) = 0 V IO = 1 mA to 100 mA Figure 14 3.7 3.4 3.2 1.5 2 2.5 3 − Output Voltage − V 3.8 3.9 OUTPUT VOLTAGE vs INPUT VOLTAGE 3.10 3.5 4 3.6 3.5 3.3 3.1 VIN − Input Voltage − V VO V(SKIP) = VIN or 0 V V(3V8) = VIN IO = 10 mA IO = 100 mA Figure 15 3.33 3.32 3.31 3.30 01234 5 3.34 3.35 OUTPUT VOLTAGE vs TIME 3.36 67 8 t − Time − µs V(SKIP) = 0 V V(3V8) = 0 V VIN = 2.4 V IO = 50 mA C O = 22 µF (X5R ceramic) Constant Frequency Mode Less than 5 mVpp − Output Voltage − VVO Figure 16 3.34 3.32 3.3 −5 0 5 10 15 20 25 3.36 OUTPUT VOLTAGE vs TIME 3.38 t − Time − µs V(SKIP) = VIN V(3V8) = 0 V IO = 100 mA − Output Voltage − VVO Pulse-Skip Mode †T C = 25°C, VCOM = VSYNC = 0 V, CIN = 10 µF, C1F = C2F = 2.2 µF, CO = 22 µF, unless otherwise noted

/C0084/C0080/C0083/C0054/C0048/C0049/C0048/C0049 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0069/C0068 /C0051/C0046/C0051/C0262/C0086 /C0049/C0048/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0078/C0079/C0073/C0083/C0069 /C0067/C0072/C0065/C0082/C0071/C0069 /C0080/C0085/C0077/C0080 /C0068/C0067/C0047/C0068/C0067 /C0067/C0079/C0078/C0086/C0069/C0082/C0084/C0069/C0082 SLVS214B − JUNE 1999 − REVISED AUGUST 2008

10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS † Figure 21 0 2.5 5 Output − dB f − Frequency − MHz FREQUENCY SPECTRUM CONSTANT FREQUENCY MODE ‡ 7.5 10 Vµ V(SKIP) = 0 V V(3V8) = 0 V VIN = 2.4 V IO = 100 mA RBW = 300 Hz Figure 22 0 2.5 5 Output − dB 100 f − Frequency − MHz FREQUENCY SPECTRUM PULSE-SKIP MODE ‡ 7.5 10 Vµ V(SKIP) = VIN V(3V8) = 0 V VIN = 2.4 V IO = 100 mA RBW = 300 Hz Figure 23 0 2.5 5 f − Frequency − MHz FREQUENCY SPECTRUM CONSTANT FREQUENCY MODE ‡ 7.5 10 Output − dB Vµ V(SKIP) = 0 V V(3V8) = 0 V VIN = 2.4 V IO = 10 mA Figure 24 0 2.5 5 Output − dB f − Frequency − MHz FREQUENCY SPECTRUM PULSE-SKIP MODE ‡ 7.5 10 Vµ V(SKIP) = VIN V(3V8) = 0 V VIN = 2.4 V IO = 10 mA †T C = 25°C, VCOM = VSYNC = 0 V, CIN = 10 µF, C1F = C2F = 2.2 µF, CO = 22 µF, unless otherwise noted ‡Test circuit: TPS60100EVM−131 with TPS60101

12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Figure 29. Functional Block Diagram TPS60101 transfer phase. This operation guarantees an almost constant output current which ensures a low output ripple. mode are externally selected via the SKIP input pin.

start-up time and eliminates the need for a Schottky diode between IN and OUT. below 3.3 V. Then the error amplifier reactivates the oscillator and switching of the power stages starts again. deactivates all functions except bandgap reference and error amplifier when the output is higher than 3.3 V.

3.3 V 100 mA

Figure 30. Typical Operating Circuit TPS60101 in Constant Frequency Mode Table 1. Tradeoffs Between Operating Modes NOTE: Even in pulse-skip mode the output ripple amplitude is small if the push-pull operating mode is selected via COM.

14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

In push-pull operating mode (COM = low), the two single-ended charge pumps operate with 180° phase shift. of the TPS60101 in push-pull mode is shown in Figure 1 and Figure 30. Figure 31. Typical Operating Circuit TPS60101 in Single-Ended Operating Mode Table 2. Tradeoffs Between Operating Modes V) regulated mode is shown in Figure 1 and Figure 30. voltage for a low-dropout regulator.

that the output noise contains only well-defined frequency components. Figure 32. Typical Operating Circuit TPS60101 With External Synchronization when the input voltage falls below 1.6 V.

/C0084/C0080/C0083/C0054/C0048/C0049/C0048/C0049 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0069/C0068 /C0051/C0046/C0051/C0262/C0086 /C0049/C0048/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0078/C0079/C0073/C0083/C0069 /C0067/C0072/C0065/C0082/C0071/C0069 /C0080/C0085/C0077/C0080 /C0068/C0067/C0047/C0068/C0067 /C0067/C0079/C0078/C0086/C0069/C0082/C0084/C0069/C0082 SLVS214B − JUNE 1999 − REVISED AUGUST 2008

16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

APPLICATION INFORMATION

The TPS60101 requires only four external capacitors as shown in the basic application circuit. Their values are closely linked to the output current capacity, output noise requirements, and mode of operation. Generally, the transfer capacitors (CxF) will be the smallest. The input capacitor improves system efficiency by reducing the input impedance and stabilizes the input current. C IN is recommended to be about two to four times as large as CxF. The output capacitor (CO ) can be selected from 5-times to 50-times larger than CxF, depending on the mode of operation and ripple tolerance†. Tables 3 and 4 show capacitor values recommended for low quiescent-current operation (pulse-skip mode) and for low output voltage ripple operation (constant-frequency mode). A recommendation is given for smallest size. Table 3. Recommended Capacitor Values for Low Quiescent-Current Operation† † All measurements are done with additional 1-µF X7R ceramic capacitors at input and output. Table 4. Recommended Capacitor Values for Low Output Voltage Ripple Operation† † All measurements are done with additional 1-µF X7R ceramic capacitors at input and output.

/C0084/C0080/C0083/C0054/C0048/C0049/C0048/C0049 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0069/C0068 /C0051/C0046/C0051/C0262/C0086 /C0049/C0048/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0078/C0079/C0073/C0083/C0069 /C0067/C0072/C0065/C0082/C0071/C0069 /C0080/C0085/C0077/C0080 /C0068/C0067/C0047/C0068/C0067 /C0067/C0079/C0078/C0086/C0069/C0082/C0084/C0069/C0082 SLVS214B − JUNE 1999 − REVISED AUGUST 2008 17POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 For the TPS60101, the smallest board space size can be achieved using Sprague’s 595D-series tantalum capacitors for input and output. However, with the trend towards high capacitance ceramic capacitors in smaller size packages, these type of capacitors might become competitive in size soon. Table 5. Recommended Capacitors to their typically lower ESR. Table 6. Recommended Capacitor Manufacturers power-dissipation limits and deratings.

/C0084/C0080/C0083/C0054/C0048/C0049/C0048/C0049 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0069/C0068 /C0051/C0046/C0051/C0262/C0086 /C0049/C0048/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0078/C0079/C0073/C0083/C0069 /C0067/C0072/C0065/C0082/C0071/C0069 /C0080/C0085/C0077/C0080 /C0068/C0067/C0047/C0068/C0067 /C0067/C0079/C0078/C0086/C0069/C0082/C0084/C0069/C0082 SLVS214B − JUNE 1999 − REVISED AUGUST 2008

18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

All capacitors should be soldered in close proximity to the IC. A PCB layout proposal for a two-layer board is given in Figure 33. Care has been taken to connect both single-ended charge pumps symmetrically to the load to achive optimized output voltage ripple performance. The proposed layout also provides improved thermal performance as the exposed leadframe is soldered to the PCB. The bottom layer of the PCB is a ground plain only. All ground areas on the PCB should be connected. Connect ground areas on top layer to the bottom layer via through hole connections. GND GND GND ENABLE SYNC C1+ C1− GND GND OUT IN 3V8 COM SKIP C2+ C2− Figure 33. Recommended PCB Layout for TPS60101 (top view)

/C0084/C0080/C0083/C0054/C0048/C0049/C0048/C0049 /C0082/C0069/C0071/C0085/C0076/C0065/C0084/C0069/C0068 /C0051/C0046/C0051/C0262/C0086 /C0049/C0048/C0048/C0262/C0109/C0065 /C0076/C0079/C0087/C0262/C0078/C0079/C0073/C0083/C0069 /C0067/C0072/C0065/C0082/C0071/C0069 /C0080/C0085/C0077/C0080 /C0068/C0067/C0047/C0068/C0067 /C0067/C0079/C0078/C0086/C0069/C0082/C0084/C0069/C0082 SLVS214B − JUNE 1999 − REVISED AUGUST 2008 19POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TPS60101 with LC output filter for ultra low ripple For applications where extremely low output ripple is required, a small LC filter is recommended. This is shown in Figure 34. The addition of a small inductor and filter capacitor will reduce the output ripple well below what could be achieved with capacitors alone. The corner frequency of 500 kHz was chosen above the 300 kHz switching frequency to avoid loop stability issues in case the feedback is taken from the output of the LC filter. Leaving the feedback (FB) connection point before the LC filter, the filter capacitance value can be increased to achieve even higher ripple attenuation without affecting stability margin. IN IN C1+ C1− ENABLE OUT OUT FB C2+ C2− SYNC SKIP COM 3V8 PGND GND INPUT 1.8 V to 3.6 V C IN 4.7 µF OUTPUT C O = 22 µF C 2F 1 µF C 1F 1 µF OFF/ON TPS60101 + 1 µF 0.1 µH Figure 34. TPS60101 With LC Filter for Ultra Low Output Ripple Applications

www.ti.com 12-Aug-2016 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples TPS60101PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 TPS60101 TPS60101PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 TPS60101 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

www.ti.com 12-Aug-2016 Addendum-Page 2 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

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