Power Management

TPS922052DGNR

Texas Instruments

TPS92205x 65-V 2-A/4-A Buck LED Driver with Inductive Fast Dimming JUNE 2023

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TPS92205x 65-V 2-A/4-A Buck LED Driver with Inductive Fast Dimming

1 Features

4.5-V to 65-V wide input range
LED common anode connection
Integrated 300-mΩ/150-mΩ MOSFET for 2-A/4-A continuous output current
Optional switching frequency: 100 kHz ~ 2.2 MHz
Spread spectrum for TPS922053 and the TPS922055
Advanced dimming options: – Analog dimming (256:1) – Fast PWM dimming (200-ns pulse width) – Hybrid and flexible dimming (2000:1 at 20-kHz PWM, 10,000:1 at 4-kHz PWM, 1,000,000:1 at 120-Hz PWM)
CV charging mode
Full protection features: – LED open and short protection – Cycle-by-cycle current limit – Thermal shutdown – Switching FET failure protection – External component failure protection – Fault output (open drain)
Configurable thermal foldback curve
SON, SOT and SOP package options

2 Applications

Constant illumination: – Indoor, outdoor, stage lighting – Surgical lighting – Projector, laser TV, printer, IP camera
Instant illumination: – Machine vision – Camera flash, fire alarm, strobe – VR and AR wearable
CV and CC source: – Battery charger – TEC controller – LCD backlight Simplified Schematic

3 Description

The TPS92205x family is a 2-A/4-A non-synchronous Buck LED driver with 4.5-V to 65-V wide input range. By integrating the low-side NMOS switch, the device is capable of driving LEDs as well as charging batteries with high power density and high efficiency. The family also supports common anode connection and single layer PCB design. The switching frequency is configurable from 100 kHz to 2.2 MHz with optional spread spectrum feature for better EMI performance. The TPS92205x family supports four dimming options, including analog dimming, PWM dimming, hybrid dimming and flexible dimming. Each dimming method can be configured through the PWM and ADIM input pins by means of simple high and low signals. The family adopts an adaptive off-time current mode control along with smart and accurate sampling to enable inductive fast dimming (IFD) and achieve high dimming ratio. The TPS92205x family also provides multiple systematic protections, including LED open and short, sense resistor open and short , configurable thermal foldback and thermal shutdown. A Fault output sends out acknowledge signals as soon as any fault condition is detected. Device Information PART NUMBER PACKAGE BODY SIZE (NOM) TPS92205x VSON (14) 4.5 mm x 3.0 mm WSON (12) 3.0 mm x 3.0 mm HVSSOP (12) 4.0 mm x 3.0 mm TPS92205x SOT-23-THN (14) 4.2 mm x 3.3 mm LED Brightness Linearity ADVANCE INFORMATION TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. ADVANCE INFORMATION for preproduction products; subject to change without notice.

10.1 Receiving Notification of Documentation Updates..30

11 Mechanical, Packaging, and Orderable

4 Revision History

June 2023 * Advance Information release TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 www.ti.com ADVANCE INFORMATION

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5 Device Comparison Table

Part Number Package Max MOSFET continuous current Spread Spectrum TPS922052DMTR VSON (14) 2 A Disabled TPS922052DRRR WSON (12) 2 A Disabled TPS922052DGNR HVSSOP (12) 2 A Disabled TPS922052DYYR SOT-23-THN (14) 2 A Disabled TPS922053DMTR VSON (14) 2 A Enabled TPS922053DRRR WSON (12) 2 A Enabled TPS922053DGNR HVSSOP (12) 2 A Enabled TPS922053DYYR SOT-23-THN (14) 2 A Enabled TPS922054DMTR VSON (14) 4 A Disabled TPS922054DRRR WSON (12) 4 A Disabled TPS922054DGNR HVSSOP (12) 4 A Disabled TPS922055DMTR VSON (14) 4 A Enabled TPS922055DRRR WSON (12) 4 A Enabled TPS922055DGNR HVSSOP (12) 4 A Enabled www.ti.com TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: TPS922052 TPS922053 TPS922054 TPS922055

6 Pin Configuration and Functions

Figure 6-1. 14-Pin VSON Top View Figure 6-2. 12-Pin HVSSOP Top View TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 www.ti.com ADVANCE INFORMATION

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Table 6-1. Pin Functions PIN TYPE(1) DESCRIPTION NAME SOT Package WSON Package SOP Package VSON Package PGND 1 Thermal Pad Thermal Pad 1 G Power ground pin. AGND 2 Thermal Pad Thermal Pad 2 G Analog ground pin. VIN 3 1 1 3 P Input power pin. VCC 4 2 2 4 P Internal LDO output pin. Connect with a 10-V, 1-uF capacitor to AGND. ADIM/HD 5 3 3 5 I Analog dimming or hybrid dimming pin. Pull high for PWM dimming only, pull low for hybrid dimming, input PWM signal for analog dimming. PWM/EN 6 4 4 6 I PWM dimming or EN pin. Pull high for always on, pull low for disabling the device, input PWM signal for PWM dimming. FAULT 7 5 5 7 O Open drain output. Pull low when fault is detected. TEMP 8 6 6 8 I/O Thermal foldback pin. Put different resistor values to AGND to set different thermal foldback behavior curves. FSET 9 7 7 9 I/O Switching frequency set pin, with range of 100 kHz ~ 2.2 MHz. Put different resistor values to AGND for different switching frequencies. COMP 10 8 8 10 I/O Error-amilifier output. Connect capacitors to AGND. Different capacitor values determine different softstart times and bandwidths. UVP 11 9 9 11 I Undervoltage detection pin. Put different resistor dividers to set the LED open detection thresholds. CSP 12 10 10 12 I LED current sense positive pin. CSN 13 11 11 13 I LED current sense negative pin. SW 14 12 12 14 P Switching node pin. Internally connected to the low-side MOSFET. Connect with the power inductor and the schottky diode. Thermal Pad N/A Y Y Y G Power/analog ground pin for WSON and SOT. (1) I = Input, O = Output, P = Supply, G = Ground TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 www.ti.com ADVANCE INFORMATION

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7 Specifications

7.1 Absolute Maximum Ratings

over operating ambient temperature range (unless otherwise noted)(1) MIN MAX UNIT Voltage on pins VIN, UVP, CSP, CSN, SW –0.3 65 V Voltage on pins VCC, ADIM/HD, EN/PWM, FAULT, TEMP, FSET, COMP –0.3 5.5 V Operation junction temperature TJ –40 125 °C Storage temperature Tstg –65 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Theseare stress ratings only, which do not imply functional operation of the device at these or anyother conditions beyond those indicated under Recommended OperatingConditions. Exposure to absolute-maximum-rated conditions for extended periods mayaffect device reliability.

7.2 ESD Ratings

V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500 (1) JEDEC document JEP155 states that 500-V HBM allows safemanufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safemanufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating ambient temperature range (unless otherwise noted) MIN MAX UNIT Input voltage range VIN 4.5 63 V Input voltage range UVP, CSP, CSN 0 63 V Input voltage range VCC, ADIM/HD, EN/PWM, TEMP, FSET 0 5 V Output voltage range SW 0 63 V FAULT, COMP 0 5 V Operating junction temperature, TJ –40 125 °C

7.4 Thermal Information

THERMAL METRIC(1) TPS92205 TPS92205 TPS92205 TPS92205 UNITSOT SOP SON SON

14 PINS 12 PINS 12 PINS 14 PINS

RθJA Junction-to-ambient thermal resistance 96.0 47.4 39.1 °C/W RθJC(top) Junction-to-case (top) thermal resistance 33.5 44.2 39.5 °C/W RθJB Junction-to-board thermal resistance 33.1 19.7 14.7 °C/W ψJT Junction-to-top characterization parameter 0.7 1.0 0.9 °C/W ψJB Junction-to-board characterization parameter 32.9 19.7 14.7 °C/W (1) For more information about traditional and new thermalmetrics, see the Semiconductor and IC Package Thermal Metricsapplication report, SPRA953. www.ti.com TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: TPS922052 TPS922053 TPS922054 TPS922055

7.5 Electrical Characteristics

The electrical ratings specified in this section apply to all specifications in this document, unless otherwise noted. These specifications are interpreted as conditions that do not degrade the device parametric or functional specifications for the life of the product containingit. TJ = –40°C to +125°C, VIN = 4.5 V to 60 V, (unlessotherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUT SUPPLY VVIN_UVLO VIN undervoltage lockout Rising VIN 3.0 3.2 3.4 V Falling VIN 2.8 3.0 3.2 V Hysteresis 0.2 V ISD Shut down current from VIN VIN = 12 V, VEN/PWM = 0 V 0.8 2.3 µA IOFF PWM off current from VIN VIN = 12 V, VEN/PWM = 0 V 2.5 mA IOP Normal operating current 400-kHz switching frequency 4.6 mA IOP Normal operating current 2.2-MHz switching frequency 10.0 mA VVCC Internal LDO output voltage IVCC = 10mA 5.0 5.15 5.3 V IVCC_LIM Internal LDO output current limit 38 47 56 mA DIMMING VPWM_L Low-level input voltage 0.4 V VPWM_H High-level input voltage 1.2 V VADIM_L Low-level input voltage 0.4 V VADIM_H High-level input voltage 1.2 V tPWM_OUT_ON PWM output minimum on time 150 ns tPWM_IN_ON PWM input minimum on time 150 ns tPWM_IN_OFF PWM input minimum off time to disable device 57 77 ms fADIM Analog Dimming input frequency 6-bit ADIM resolution 0.1 156 kHz fADIM Analog Dimming input frequency 8-bit ADIM resolution 0.1 39 kHz FAULT VOL Output level low I = 3mA 0.1 V ILEAKAGE Output leakage current V = 5 V 1 µA FEEDBACK AND ERROR AMPLIFIER gM(ea) Transconductance gain ADIM 100% duty cycle, VCSP-CSN = 200mV, VCOMP = 1.5V 205 265 325 μA/V ICOMP Source/sink current ADIM 100% duty cycle, VCSP-CSN = 200mV ± 200mV, VCOMP = 1.5V ±24 ±40 ±56 µA VCSP-CSN Current sense threshold ADIM 100% duty cycle 194 200 206 mV VCSP-CSN Current sense threshold ADIM 12.5% duty cycle, compared with 100% duty cycle 11.875 12.5 13.125 % VCSP-CSN Current sense threshold ADIM 1.17% duty cycle, compared with 100% duty cycle 0.82 1.17 1.52 % ILEAK_CSP/N CSP+CSN pin leakage current VIN = 60 V, VEN/PWM = 5 V 22 31 µA ILEAK_CSP/N CSP+CSN pin leakage current VIN = 60 V, VEN/PWM = 0 V 10 15 µA TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 www.ti.com ADVANCE INFORMATION

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7.6 Typical Characteristics

VIN = 12V, unless otherwise specified Figure 7-1. Output Current vs. Input Voltage Figure 7-2. Output Current vs. LED Count Figure 7-3. PWM Duty Cycle vs. CSP-CSN Voltage in Hybrid Dimming Figure 7-4. ADIM Duty Cycle vs. CSP-CSN Voltage in Analog Dimming Figure 7-5. VIN UVLO Threshold vs. Junction Temperature Figure 7-6. EN/PWM Threshold vs. Junction Temperature TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 www.ti.com ADVANCE INFORMATION

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7.6 Typical Characteristics (continued)

VIN = 12V, unless otherwise specified Figure 7-7. ADIM/HD Threshold vs. Junction Temperature Figure 7-8. Efficiency at 4-A Output Current, 10-µH Inductor, 24-V Input Voltage Figure 7-9. Efficiency at 4-A Output Current, 10-µH Inductor, 48-V Input Voltage www.ti.com TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: TPS922052 TPS922053 TPS922054 TPS922055

8 Detailed Description

8.1 Overview

The TPS92205x family is a 2-A/4-A non-synchronous Buck LED driver with 4.5-V to 65-V wide input range. By integrating the low-side NMOS switch with constant current and constant voltage controls, the device is capable of not only driving LEDs but also charging batteries with high power density and high efficiency. The device also supports common anode connection and single layer PCB design, hence saving cost of connector, harness and PCB. The switching frequency is configurable through FSET pin, ranging from 100 kHz to 2.2 MHz, with optional spread spectrum feature to decrease the EMC emission and reduce the input filter size. The device supports four dimming options, including analog dimming, PWM dimming, hybrid dimming and flexible dimming. Each dimming method can be configured through the PWM and ADIM input pins by means of simple high/low sequencing signals at startup. In PWM dimming mode, once the dimming mode is configured, LED is turned on and off corresponding to on and off of the PWM input signal at PWM input pin. The PWM dimming mode supports ultra-narrow pulse width down to 200 ns. In analog dimming mode, LED current is regulated corresponding to the pulse width duty cycle of the PWM input signal at ADIM input pin. In hybrid dimming mode, the LED current is controlled by a pre-determined combination of analog dimming and PWM dimming through the PWM input signal at PWM input pin. In flexible dimming mode, the LED current is controlled by analog dimming through the PWM input signal at ADIM input pins and PWM dimming through the PWM input signal at PWM input pins, respectively. The device adopts an adaptive off-time current mode control along with smart and accurate sampling to enable inductive fast dimming (IFD) and achieve high dimming ratio. The compensation bandwidth can be adjusted through an external capacitor based on system requirement. For safety and protection, the devices support full systematic protections including LED open and short, sense resistor open and short, configurable thermal foldback and thermal shutdown protection. The fault output pin sends out acknowledge signals as soon as any fault condition is detected.

8.2 Functional Block Diagram

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8.3 Feature Description

8.3.1 Adaptive Off-Time Current Mode Control

The TPS92205x device adopts an adaptive off-time current mode control to support fast transient response over a wide range of operation. The switching frequency is configurable through FSET pin, ranging from 100 kHz to 2.2 MHz. For average output current regulation, the sensed voltage across the sensing resistor between the CSP and CSN pins is compared with the internal voltage reference, V REF , through the error amplifier. The output of the error amplifier, VCOMP, passes through an external compensation network and is then compared with the peak current feedback at the PWM comparator. During each switching cycle, when the internal NMOS FET is turned on, the peak currernt is sensed through the internal FET. When the sensed value of peak current reaches VCOMP at the input of PWM comparator, the NMOS FET is turned off and the adaptive off-time counter starts counting. Once the adaptive off-time counter stops counting, the counter is reset until when the NMOS FET stays off. The counting off time is determined by the external resistor connected to the FSET pin and the input/output feedforward. Thus, the device is able to maintain a nearly constant switching frequnecy at steady state and regulate the output average current at a desired value. Figure 8-1. Adaptive off-time current mode control method

8.3.1.1 Switching Frequency Settings

The switching frequency of TPS92205x device is adjustable from 100 kHz to 2.2 MHz by means of changing RFSET connected between FSET pin and AGND. The default switching frequency is 100 kHz when the FSET pin is connected to nothing. The resistor value and the corresponding switching frequency are listed in the below table: Table 8-1. Switching Frequency vs. RFSET Resistor Value Switching Frequency Resistor Value (kΩ) 100 kHz 232 200 kHz 138 300 kHz 83 400 kHz 59 600 kHz 38 800 kHz 28

1 MHz 23

1.2 MHz 18

1.5 MHz 13

1.8 MHz 11

2.2 MHz 9

For example, if RFSET is set to 59 kΩ, the corresponding switching frequency is set to 400 kHz. In most cases, the lower switching frequency, the higher system efficiency and the better thermal behavior. www.ti.com TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: TPS922052 TPS922053 TPS922054 TPS922055

8.3.1.2 Spread Spectrum

The TPS92205x device enables the spread spectrum feature (±7% from central frequency, 2-kHz modulation frequency) which reduces EMI noise at the switching frequency and its high-order harmonics. On the other hand, the TPS92205x device disables the spread spectrum feature toward better brightness performance in low brightness scenario.

8.3.2 Setting LED Current

The LED current is set by the external sensing resistor between CSP and CSN pins. The internal voltage reference, VREF, is fixed at 200 mV for full-scale current and the sensing resistor can be calculated using the equation Equation 9. R SE NS E = V C SP − C SN I F S (1) where

VCSP-CSN = 200 mV

8.3.3 Internal Soft Start

The TPS92205x family implements the internal soft-start function. After enabled, the devices start to gradually increase the output current until reaching the desired current in approximately 5 ms.

8.3.4 Undervoltage Lockout

The TPS92205x device implements an internal undervoltage-lockout (UVLO) circuitry connecting to the VCC pin. The UVLO is triggered and then the device is disabled when the VCC pin voltage falls below the internal UVLO threshold voltage, V VCC_UVLO typically 3.0 V, with a typical 0.2-V hysteresis. The VCC pin is the output of an internal regulator of which the input is supplied by the VIN pin. Therefore, if VIN pin voltage falls close to above the VVCC_UVLO (around 500 mV above), the UVLO will be triggered.

8.3.5 Dimming Mode

The TPS922052/3/4/5 device has four optional dimming modes:

PWM dimming
Analog dimming
Hybrid dimming
Flexible dimming The configuration to one of the four dimming modes are shown as below Table 8-2. Dimming Mode Configuration Dimming Mode EN/PWM Pin ADIM/HD Pin PWM Dimming PWM signal High Analog Dimming High PWM signal Hybrid Dimming PWM signal Low Flexible Dimming PWM signal PWM signal TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 www.ti.com ADVANCE INFORMATION

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8.3.5.1 PWM Dimming

The PWM dimming mode is enabled when the ADIM/HD input pin is always high and the PWM/EN input pin is configured by a PWM input signal. In PWM dimming mode, when the PWM input signal at the PWM pin turns from low to high, the internal NMOS FET starts switching and the inductor current rises to the determined value. The LED current is then regulated at the determined value as long as the PWM input signal stays high. When the PWM input signal turns from high to low, the internal FET is turned off causing the inductor current falling to zero. The internal FET maintains off and the LED current stays zero if the PWM input signal stays low. The TPS922052/3/4/5 device supports PWM input signals with ultra-narrow pulse width down to 200 ns in PWM dimming mode.

8.3.5.2 Analog dimming

The TPS92205x device supports analog dimming which regulates the LED current through the PWM input signal at the ADIM/HD pin. The analog dimming mode is enabled when the PWM/EN pin is always high and the ADIM/HD pin is configured by a PWM input signal. The internal voltage reference, V REF, changes in proportion to the duty cycle of the PWM input signal at the ADIM/HD pin. V REF is 200 mV when the PWM input signal at the ADIM/HD pin has a 100% duty cycle, for instance, and VREF is 20 mV when the PWM input signal has a 10% duty cycle. Note that the internal digital circuits is able to respond to the duty cycle change of the PWM input signal with tens of micro-seconds delay.

8.3.5.3 Hybrid Dimming

The TPS92205x device supports a unique hybid dimming function to maximize the dimming performance, especially when both high dimming frequency and high dimming ratio are needed. The hybrid dimming mode is enabled when the ADIM/HD pin is always low and the PWM/EN pin is configured by a PWM input signal. When the hybrid dimming is enabled, the LED current is regulated by the analog dimming at high brightness level (12.5% ~ 100%) and by the PWM dimming at low brightness level (0% ~ 12.5%), respectively. At high brightness level, the internal voltage reference, V REF, changes in proportion to the duty cycle of the PWM input signal at the PWM/EN pin. At low brightness level, V REF stays unchanged and an internal PWM generator is enabled. Thus, the LED is turned on and off corresponding to the on and off of the internal PWM signal of which the frequency and the duty cycle are configured by the PWM input signal at the PWM/EN pin. The detailed hybrid dimming behavior is illustrated in the below figure. TON TPWM PWM Input 100% ILED D=6.25% D=50% 75% 50% 25% D=25% Hybrid Mode D=3.125% ILED 12.5% Figure 8-2. Hybrid Dimming www.ti.com TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: TPS922052 TPS922053 TPS922054 TPS922055

8.3.5.4 Flexible Dimming

The TPS92205x family also supports flexible dimming to maximize the flexibility of dimming control, in which the LED current value and the on/off behavior can be controlled independently. The flexible dimming mode is enabled when both the ADIM/HD pin and the PWM/EN pin are configured by PWM input signals at the same time. Therefore, in fleixble dimming mode, the LED is turned on and off corresponding to the on and off of the PWM input signal at the PWM/EN pin while the reference voltage changes in proportion to the duty cycle of the PWM input signal at the ADIM/HD pin.

8.3.6 CV Charging Mode

The TPS92205x family enables constant voltage (CV) charging operation when the UVP voltage is below the CV threshold. During CV charging mode, the output current continuously decreases until the UVP voltage rises above the threshold. The device then returns to CC operation mode once the UVP voltage rises above the threshold. Figure 8-3. CC/CV Mode Transition TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 www.ti.com ADVANCE INFORMATION

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8.3.7 Fault Protection

The TPS92205xfamily is able to provide fault protections and send fault report signals in many fault conditions, including LED open, LED ± short, LED short to PGND, sense resistor open and short, internal switching FET fault and thermal shutdown. Table 8-3. Protections TYPE CRITERION BEHAVIOR LED open load VUVP < 1.2 V FAULT pin pull low. The device stops switching and recovers when fault is removed. LED+ and LED- short circuit VIN - VCSN < 750mV FAULT pin pull low. The device keeps normal behavior. LED- short to PGND VUVP < 1.2 V FAULT pin pull low. The device stops switching and recovers when fault is removed. Sense-resistor open load VCSP - VCSN > 300mV FAULT pin pull low. The device stops switching and recovers when fault is removed. Sense-resistor short circuit COMP pin is clamped high FAULT pin pull low. The device keeps switching under the cycle-by-cycle current limit. Switching FET open COMP pin is clamped high FAULT pin pull low. The device stops switching and recovers when fault is removed. Switching FET short VCSP - VCSN > 300mV FAULT pin pull low. The device stops switching and recovers when fault is removed. Thermal shutdown TJ > TTSD FAULT pin pull low. The device stops switching and recovers when TJ falls below the hysteresis level. www.ti.com TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: TPS922052 TPS922053 TPS922054 TPS922055

8.3.8 Thermal Foldback

The TPS92205x family integrates thermal shutdown protection to prevent the device from overheating. In order to provide design margin of system thermal performance, the device enables a programmable thermal foldback function which automatically reduces the full-scale output current, I FS, at high junction temperature. When the device along with the LEDs are mounted on the same thermal substrate, the thermal performance is effectively improved due to the reduction of dissipation need for both device and LED. As the device junction temperature rises above the thermal foldback threshold temperature, T th, the full-scale current starts to reduce following the current-temperature curve shown in the below figure. The current starts to reduce from the 100% level at typically rate of 2% of I FS per °C until it drops to 50% of the full scale. Once the junction temperature rises 25°C above the T th, the current continues to decrease at a lower rate until the temperature reaches above the overtemperature shutdown threshold temperature, TTSD. Full-Scale Current TTSDTth IFS 50% 2% decrease of IFS per ºC Tth + 25°C 100% Figure 8-4. Thermal Foldback The Tth can be adjusted by changing the resistor R TEMP connected between the TEMP and AGND pin. The T th and the corresponding RTEMP value are listed in below table. Table 8-4. Tth vs. RTEMP resistor value Tth (°C) Resistor Value (kΩ) 80 200 90 100 100 60 110 40 120 28 130 20 140 15 150 10 TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 www.ti.com ADVANCE INFORMATION

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9 Application and Implementation

9.1 Application Information

The TPS92205x family is typically used as a Buck converter to drive one or more LEDs from an input from 4-V to 60-V range.

9.2 Typical Application

9.2.1 TPS922055 24-V Input, 3-A, 8-piece WLED Driver With Analog Dimming

Figure 9-1. 24-V Input, 3-A, 8-piece WLED, Analog Dimming Reference Design

9.2.1.1 Design Requirements

For this design example, use the parameters in the following table. Table 9-1. Design Parameters PARAMETER VALUE Input voltage range 24 V ±10% LED forward voltage 1.75 V Output voltage 14.1 V (1.75 × 8 + 0.1) Maximum LED current 3 A Inductor current ripple 30% of maximum LED current LED current ripple 20mA or less Input voltage ripple 200mV or less Dimming type Analog dimming with TPS922055: 500-Hz, 10% to 100% PWM input at the ADIM pin www.ti.com TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 19 Product Folder Links: TPS922052 TPS922053 TPS922054 TPS922055

9.2.1.2 Detailed Design Procedure

9.2.1.2.1 Inductor Selection

For this design, the input voltage is a 24-V, rail with 10% variation. The output is 8 white LEDs in series and the inductor current ripple by requirement is less than 30% of maximum LED current. To choose a proper peak-to-peak inductor current ripple, the low-side FET current limit should not be violated when the converter works in no-load condition. This requires half of the peak-to-peak inductor current ripple to be lower than that limit. Another consideration is to ensure reasonable inductor core loss and copper loss caused by the peak-to- peak current ripple. Once this peak-to-peak inductor current ripple is chosen, use Equation 11 to calculate the recommended value of the output inductor L. L = 8176 × k88+0(max )F 8176 o (2) where

KIND is a coefficient that represents the amount of inductor ripple current relative to the maximum LED current.
ILED is the maximum LED current.
fSW is the switching frequency.
VIN(max) is the maximum input voltage.
VOUT is the sum of the voltage across LED load and the voltage across sense resistor. With the chosen inductor value, the user can calculate the actual inductor current ripple using Equation 12. +.(NELLHA ) = 8176 × k88+0(max )F 8176o (3) The design ratings of inductor RMS current and saturation current must be greater than those seen in the system requirement. This is to ensure no inductor overheat or saturation occurring. During power up, transient conditions or fault conditions, the inductor current may exceed its normal operating current and reach the current limit. Therefore, it is preferred to select a saturation current rating equal to or greater than the converter current limit. The peak-inductor-current and RMS current equations are shown in Equation 4 and Equation 5. L(ripple) L(peak) LED I I I 2 (4) L(ripple)2 L(rms) LED I I I 12 (5) In this design, VIN(max) = 24 V, V OUT = 14.1 V, ILED = 3 A, f SW = 400 kHz, choose K IND = 0.3, the calculated inductance is 16.2 µH. A 22-µH inductor is chosen. With this inductor, the ripple, peak, and rms currents of the inductor are 0.66 A, 3.33 A, and 3.01 A, respectively.

9.2.1.2.2 Input Capacitor Selection

An input capacitor is required to reduce the surge current drawn from the input supply and the switching noise coming from the device. Ceramic capacitors with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. For most applications, it is recommended to place a 10- μF capacitor along with a 0.1-µF capacitor from VIN to PGND/AGND to provide high-frequency filtering. The input capacitor voltage rating must be greater than the maximum input voltage. Use equation x to calculate the input ripple voltage, where ESR CIN is the ESR of input capacitor, and K DR is the derating coefficient of ceramic capacitance at the applied DC voltage. In this design, a 10-µF, 35-V X7R ceramic capacitor is chosen, yielding around 40-mV input ripple voltage. TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 www.ti.com ADVANCE INFORMATION

20 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated

Product Folder Links: TPS922052 TPS922053 TPS922054 TPS922055

9.2.1.2.3 Output Capacitor Selection

The output capacitor reduces the high-frequency current ripple through the LED string. Excessive current ripple increases the RMS current in the LED string, therefore increasing the LED temperature. 1. Calculate the total dynamic resistance of the LED string (RLED) using the LED manufacturer's datasheet. 2. Calculate the required impedance of the output capacitor (Z OUT) given the acceptable peak-to-peak ripple current through the LED string, I LED(ripple) . IL(ripple) is the peak-to-peak inductor ripple current as calculated with the selected inductor. 3. Calculate the minimum effective output capacitance required. 4. Increase the output capacitance appropriately due to the derating effect of applied DC voltage. See Equation 6, Equation 7, and Equation 8. 4.'& = ¿8( ¿+( × # KB .'&O (6) <%176 = +.(NELLHA ) F +.'&(NELLHA ) (7) %176 = 1 2è × B59 × <%176 (8) Once the output capacitor is chosen, Equation 9 can be used to estimate the peak-to-peak ripple current through the LED string. +.'&(NELLHA ) = <%176 × +.(NELLHA ) (9) CREE WLED is used here. The dynamic resistance of the LED is 0.29 ohm at 3-A forward current. Ceramic capacitors with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. In this design, a 10-µF, 35-V X7R ceramic capacitor is chosen. The calculated ripple current of the LED is about 23.8mA. The maximum LED current is 3 A at 100% PWM duty and the corresponding V REF is 200 mV. By using Equation 9, the sense resistance is calculated as 67 mΩ. (10) Note that the power consumption of the sense resistor is 603 mW, requiring enough margin of the resistor's power rating in selection. In this design, a 0.1-µF, 50-V X7R ceramic capacitor is chosen for C BOOT. Additionally, a 1-µF, 50-V X7R ceramic capacitor is chosen for CSENSE. For loop stability, it is recommended to select a 1-nF, 10-V X7R ceramic capacitor for CCOMP and a 1-kΩ resistor for RCOMP. www.ti.com TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: TPS922052 TPS922053 TPS922054 TPS922055

9.2.1.3 Application Curves

Blue: SW, Red: Inductor Current, Green: LED Current Ripple (AC) Figure 9-2. LED Current Ripple at PWMADIM = 10%,

500 Hz and FSW = 400 kHz

Blue: SW, Red: Inductor Current, Green: LED Current Ripple (AC) Figure 9-3. LED Current Ripple at PWMADIM = 100%, 500 Hz and FSW = 400 kHz Yellow: PWMADIM, Blue: SW, Red: Inductor Current, Green: LED Current Figure 9-4. LED Current Transient for a PWMADIM Transition from 10% to 90%, 500 Hz Yellow: PWMADIM, Blue: SW, Red: Inductor Current, Green: LED Current Figure 9-5. LED Current Transient for a PWMADIM Transition from 100% to 10%, 500 Hz Yellow: PWMADIM, Blue: SW, Red: Inductor Current, Green: LED Current Figure 9-6. Start-Up at PWMADIM = 100%, 500 Hz Yellow: PWMADIM, Blue: SW, Red: Inductor Current, Green: LED Current Figure 9-7. Shutdown at PWMADIM = 100%, 500 Hz TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 www.ti.com ADVANCE INFORMATION

22 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated

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9.2.2 TPS922055 48-V Input, 1-A, 12-piece WLED Driver with PWM Dimming

Figure 9-14. 48-V Input, 1-A, 12-piece WLED, PWM Dimming Reference Design

9.2.2.1 Design Requirements

For this design example, use the parameters in the following table. Table 9-2. Design Parameters PARAMETER VALUE Input voltage range 48 V ±10% LED forward voltage 3 V Output voltage 36.1 V (3 × 12 + 0.1) Maximum LED current 1 A Inductor current ripple 60% of maximum LED current LED current ripple 20mA or less Input voltage ripple 200mV or less Dimming type PWM dimming with TPS922055: 4-kHz, 1% to 100% PWM input at the PWM pin TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 www.ti.com ADVANCE INFORMATION

24 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated

Product Folder Links: TPS922052 TPS922053 TPS922054 TPS922055

9.2.2.2 Detailed Design Procedure

9.2.2.2.1 Inductor Selection

For this design, the input voltage is a 48-V, rail with 10% variation. The output is 12 white LEDs in series and the inductor current ripple by requirement is less than 70% of maximum LED current. To choose a proper peak-to-peak inductor current ripple, the low-side FET current limit should not be violated when the converter works in no-load condition. This requires half of the peak-to-peak inductor current ripple to be lower than that limit. Another consideration is to ensure reasonable inductor core loss and copper loss caused by the peak-to- peak current ripple. Once this peak-to-peak inductor current ripple is chosen, use Equation 11 to calculate the recommended value of the output inductor L. L = 8176 × k88+0(max )F 8176 o (11) where

KIND is a coefficient that represents the amount of inductor ripple current relative to the maximum LED current.
ILED is the maximum LED current.
fSW is the switching frequency.
VIN(max) is the maximum input voltage.
VOUT is the sum of the voltage across LED load and the voltage across sense resistor. With the chosen inductor value, the user can calculate the actual inductor current ripple using Equation 12. +.(NELLHA ) = 8176 × k88+0(max )F 8176o (12) The design ratings of inductor RMS current and saturation current must be greater than those seen in the system requirement. This is to ensure no inductor overheat or saturation occurring. During power up, transient conditions or fault conditions, the inductor current may exceed its normal operating current and reach the current limit. Therefore, it is preferred to select a saturation current rating equal to or greater than the converter current limit. The peak-inductor-current and RMS current equations are shown in Equation 4 and Equation 5. L(ripple) L(peak) LED I I I 2 (13) L(ripple)2 L(rms) LED I I I 12 (14) In this design, VIN(max) = 48 V, V OUT = 36.1 V, ILED = 1 A, f SW = 400 kHz, choose K IND = 0.7, the calculated inductance is 32.1 µH. A 47-µH inductor is chosen. With this inductor, the ripple, peak, and rms currents of the inductor are 0.48 A, 1.24 A, and 1.01 A, respectively.

9.2.2.2.2 Input Capacitor Selection

An input capacitor is required to reduce the surge current drawn from the input supply and the switching noise coming from the device. Ceramic capacitors with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. For most applications, it is recommended to place a 10- μF capacitor along with a 0.1-µF capacitor from VIN to PGND/AGND to provide high-frequency filtering. The input capacitor voltage rating must be greater than the maximum input voltage. Use equation x to calculate the input ripple voltage, where ESR CIN is the ESR of input capacitor, and K DR is the derating coefficient of ceramic capacitance at the applied DC voltage. In this design, a 10-µF, 100-V X7R ceramic capacitor is chosen, yielding around 30-mV input ripple voltage. www.ti.com TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 25 Product Folder Links: TPS922052 TPS922053 TPS922054 TPS922055

9.2.2.2.3 Output Capacitor Selection

The output capacitor reduces the high-frequency current ripple through the LED string. Excessive current ripple increases the RMS current in the LED string, therefore increasing the LED temperature. 1. Calculate the total dynamic resistance of the LED string (RLED) using the LED manufacturer's datasheet. 2. Calculate the required impedance of the output capacitor (Z OUT) given the acceptable peak-to-peak ripple current through the LED string, I LED(ripple) . IL(ripple) is the peak-to-peak inductor ripple current as calculated with the selected inductor. 3. Calculate the minimum effective output capacitance required. 4. Increase the output capacitance appropriately due to the derating effect of applied DC voltage. See Equation 6, Equation 7, and Equation 8. 4.'& = ¿8( ¿+( × # KB .'&O (15) <%176 = +.(NELLHA ) F +.'&(NELLHA ) (16) %176 = 1 2è × B59 × <%176 (17) Once the output capacitor is chosen, Equation 9 can be used to estimate the peak-to-peak ripple current through the LED string. +.'&(NELLHA ) = <%176 × +.(NELLHA ) (18) Cree WLED is used here. The dynamic resistance of the LED is 0.67 ohm at 1-A forward current. Ceramic capacitors with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. In this design, a 10-µF, 100-V X7R ceramic capacitor is chosen. The calculated ripple current of the LED is about 11.5mA. The maximum LED current is 1 A at 100% PWM duty and the corresponding V REF is 200 mV. By using Equation 9, the sense resistance is calculated as 200 mΩ. (19) Note that the power consumption of the sense resistor is 200 mW, requiring enough margin of the resistor's power rating in selection. In this design, a 0.1-µF, 50-V X7R ceramic capacitor is chosen for C BOOT. Additionally, a 1-µF, 50-V X7R ceramic capacitor is chosen for CSENSE. For loop stability, it is recommended to select a 1-nF, 10-V X7R ceramic capacitor for CCOMP and a 1-kΩ resistor for RCOMP. TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 www.ti.com ADVANCE INFORMATION

Product Folder Links: TPS922052 TPS922053 TPS922054 TPS922055

9.2.2.3 Application Curves

Blue: SW, Red: Inductor Current, Green: LED Current Ripple (AC) Figure 9-15. LED Current Ripple at PWMADIM = 100%, 500 Hz and FSW = 400 kHz Yellow: PWMPWM, Blue: SW, Red: Inductor Current, Green: LED Current Figure 9-16. LED Current Transient for a PWMPWM Transition from 2% to 99%, 20 kHz Yellow: PWMPWM, Blue: SW, Red: Inductor Current, Green: LED Current Figure 9-17. Start-Up at PWMPWM = 10%, 20 kHz Yellow: PWMPWM, Blue: SW, Red: Inductor Current, Green: LED Current Figure 9-18. Shutdown at PWMPWM = 10%, 20 kHz Yellow: PWMPWM, Blue: SW, Red: Inductor Current, Green: LED Current Figure 9-19. Start-Up at PWMPWM = 100%, 20 kHz Yellow: PWMPWM, Blue: SW, Red: Inductor Current, Green: LED Current Figure 9-20. Shutdown at PWMPWM = 100%, 20 kHz www.ti.com TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 27 Product Folder Links: TPS922052 TPS922053 TPS922054 TPS922055

Yellow: PWMPWM, Blue: SW, Red: Inductor Current, Green: LED Current Figure 9-21. LED PWM Dimming at PWMPWM = 0.1%, 120 Hz Yellow: PWMPWM, Blue: SW, Red: Inductor Current, Green: LED Current Figure 9-22. LED PWM Dimming at PWMPWM = 99.9%, 120 Hz Yellow: PWMPWM, Blue: SW, Red: Inductor Current, Green: LED Current Figure 9-23. LED PWM Dimming at PWMPWM = 1%, 20 kHz Yellow: PWMPWM, Blue: SW, Red: Inductor Current, Green: LED Current Figure 9-24. LED PWM Dimming at PWMPWM = 10%, 20 kHz Yellow: PWMPWM, Blue: SW, Red: Inductor Current, Green: LED Current Figure 9-25. LED PWM Dimming at PWMPWM = 90%, 20 kHz Yellow: PWMPWM, Blue: SW, Red: Inductor Current, Green: LED Current Figure 9-26. LED PWM Dimming at PWMPWM = 99%, 20 kHz TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 www.ti.com ADVANCE INFORMATION

Product Folder Links: TPS922052 TPS922053 TPS922054 TPS922055

9.3 Power Supply Recommendations

The device is designed to operate from an input voltage supply ranging between 4.5 V and 65 V. This input supply must be well regulated. The device requires an input capacitor to reduce the surge current drawn from the input supply and the switching noise from the device. Ceramic capacitors with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. For most applications, a 10-μF capacitor is enough.

9.4 Layout

The TPS92205x family requires a proper layout for optimal performance. The following section gives some guidelines to ensure a proper layout.

9.4.1 Layout Guidelines

An example of a proper layout for theTPS92205x device is shown in Figure 9-27.

Creating a large PGND plane for good electrical and thermal performance is important.
The IN and PGND traces should be as wide as possible to reduce trace impedance. Wide traces have the additional advantage of providing excellent heat dissipation.
Thermal vias can be used to connect the top-side PGND plane to additional printed-circuit board (PCB) layers for heat dissipation and grounding.
The input capacitors must be located as close as possible to the IN pin and the PGND/AGND pin.
The VCC capacitor should be placed as close as possible to VCC pin to ensure stable LDO output voltage.
The SW trace must be kept as short as possible to reduce parasitic inductance and thereby reduce transient voltage spikes. Short SW trace also reduces radiated noise and EMI.
Do not allow switching current to flow under the device.
The routing of CSN and CSP traces are recommended to be in parallel and kept as short as possible and placed away from the high-voltage switching trace and the ground shield.
The compensation capacitor must be placed as close as possible to COMP pin so as to prevent oscillation and system instability.

9.4.2 Layout Example

Figure 9-27. 12-Pin WSON Top View Layout Example www.ti.com TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 ADVANCE INFORMATION Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 29 Product Folder Links: TPS922052 TPS922053 TPS922054 TPS922055

10 Device and Documentation Support

10.1 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Subscribe to updates to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

10.2 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

10.3 Trademarks

TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners.

10.4 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

10.5 Glossary

TI Glossary This glossary lists and explains terms, acronyms, and definitions.

11 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most- current data available for the designated devices. This data is subject to change without notice and without revision of this document. For browser-based versions of this data sheet, see the left-hand navigation pane. TPS922052, TPS922053, TPS922054, TPS922055 SLVSGG9 – JUNE 2023 www.ti.com ADVANCE INFORMATION

Product Folder Links: TPS922052 TPS922053 TPS922054 TPS922055

www.ti.com 21-Jun-2023 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead finish/ Ball material (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples PTPS922053DMTR ACTIVE 3000 TBD Call TI Call TI -40 to 125 Samples PTPS922053DYYR ACTIVE SOT-23-THIN DYY 14 3000 TBD Call TI Call TI -40 to 125 Samples PTPS922055DMTR ACTIVE VSON DMT 14 3000 TBD Call TI Call TI -40 to 125 Samples PTPS922055DRRR ACTIVE WSON DRR 12 3000 TBD Call TI Call TI -40 to 125 Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and Addendum-Page 1

www.ti.com 21-Jun-2023 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

www.ti.com GENERIC PACKAGE VIEW This image is a representation of the package family, actual package may vary. Refer to the product data sheet for package details. VSON - 0.9 mm max heightDMT 14 PLASTIC SMALL OUTLINE - NO LEAD3 x 4.5, 0.65 mm pitch 4225088/A

www.ti.com PACKAGE OUTLINE C 12X 0.5 0.3 1.5±0.1 2.5 10X 0.5 12X 0.3 0.2

0.8 MAX

0.05 0.00 2.5±0.1 A 3.1 2.9 B 3.1 2.9 (0.1) TYP WSON - 0.8 mm max heightDRR0012C PLASTIC SMALL OUTLINE - NO LEAD 4222932/A 05/2016 PIN 1 INDEX AREA 0.08 SEATING PLANE 6 7 (OPTIONAL) PIN 1 ID

0.1 C A B

0.05 THERMAL PAD EXPOSED

13 SYMM

NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. SCALE 4.000

www.ti.com EXAMPLE BOARD LAYOUT

0.07 MIN

0.07 MAX

12X (0.25) 12X (0.6) (2.5) (R ) TYP0.05 ( ) VIA TYP 0.2 (1.5) (2.8) 10X (0.5) (0.5) (1) WSON - 0.8 mm max heightDRR0012C PLASTIC SMALL OUTLINE - NO LEAD 4222932/A 05/2016 SYMM 6 7 SYMM LAND PATTERN EXAMPLE SCALE:20X NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. SOLDER MASK OPENINGSOLDER MASK METAL UNDER SOLDER MASK DEFINED METALSOLDER MASK OPENING SOLDER MASK DETAILS NON SOLDER MASK DEFINED (PREFERRED)

www.ti.com EXAMPLE STENCIL DESIGN (2.8) 12X (0.6) 12X (0.25) 10X (0.5) 2X (1.38) 2X (1.11) (0.66) WSON - 0.8 mm max heightDRR0012C PLASTIC SMALL OUTLINE - NO LEAD 4222932/A 05/2016 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SYMM METAL TYP SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 13 81.7% PRINTED SOLDER COVERAGE BY AREA SCALE:20X SYMM 6 7

NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.50 per side. 5. Reference JEDEC Registration MO-345, Variation AB PACKAGE OUTLINE 4224643/B 07/2021 www.ti.com SOT-23-THIN - 1.1 mm max height PLASTIC SMALL OUTLINE DYY0014A A 0.1 C B PIN 1 INDEX AREA 4.3 4.1 NOTE 3 2.1 1.9 3.36 3.16 14X 0.31 0.11 0.1 C A B 1.1 MAX C SEATING PLANE 0.2

0.08 TYP

0.1 0.0 0.25 GAUGE PLANE 0°- 8° 0.63 0.33 DETAIL A TYP 12X 0.5

NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. EXAMPLE BOARD LAYOUT 4224643/B 07/2021 www.ti.com SOT-23-THIN - 1.1 mm max heightDYY0014A PLASTIC SMALL OUTLINE SYMM SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 20X 14X (0.3) 14X (1.05) (3) 12X (0.5) (R0.05) TYP 7 8 METAL SOLDER MASK OPENING SOLDER MASK OPENING METAL UNDER SOLDER MASK NON- SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS

NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. EXAMPLE STENCIL DESIGN 4224643/B 07/2021 www.ti.com SOT-23-THIN - 1.1 mm max heightDYY0014A PLASTIC SMALL OUTLINE SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 20X SYMM SYMM 14X (0.3) 14X (1.05) (3) 12X (0.5) (R0.05) TYP 7 8

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Product Information

TPS922052DGNR specifications and overview.

Summary

TPS92205x 65-V 2-A/4-A Buck LED Driver with Inductive Fast Dimming JUNE 2023

Description

TPS92205x 65-V 2-A/4-A Buck LED Driver with Inductive Fast Dimming JUNE 2023

Source title TPS922052DGNR Datasheet(PDF) - Texas Instruments

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TPS922052 TI | Alldatasheet

Document overview

Technical content

1 Features

2 Applications

3 Description

11 Mechanical, Packaging, and Orderable

4 Revision History

2 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated

5 Device Comparison Table

6 Pin Configuration and Functions

4 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated

6 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated

7 Specifications

7.1 Absolute Maximum Ratings

7.2 ESD Ratings

7.3 Recommended Operating Conditions

7.4 Thermal Information

14 PINS 12 PINS 12 PINS 14 PINS

7.5 Electrical Characteristics

8 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated

7.6 Typical Characteristics

10 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated

7.6 Typical Characteristics (continued)

8 Detailed Description

8.1 Overview

8.2 Functional Block Diagram

12 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated

8.3 Feature Description

8.3.1 Adaptive Off-Time Current Mode Control

8.3.1.1 Switching Frequency Settings

1 MHz 23

1.2 MHz 18

1.5 MHz 13

1.8 MHz 11

2.2 MHz 9

8.3.1.2 Spread Spectrum

8.3.2 Setting LED Current

8.3.3 Internal Soft Start

8.3.4 Undervoltage Lockout

8.3.5 Dimming Mode

14 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated

8.3.5.1 PWM Dimming

8.3.5.2 Analog dimming

8.3.5.3 Hybrid Dimming

8.3.5.4 Flexible Dimming

8.3.6 CV Charging Mode

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8.3.7 Fault Protection

8.3.8 Thermal Foldback

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9 Application and Implementation

9.1 Application Information

9.2 Typical Application

9.2.1 TPS922055 24-V Input, 3-A, 8-piece WLED Driver With Analog Dimming

9.2.1.1 Design Requirements

9.2.1.2 Detailed Design Procedure

9.2.1.2.1 Inductor Selection

9.2.1.2.2 Input Capacitor Selection

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9.2.1.2.3 Output Capacitor Selection

9.2.1.3 Application Curves

500 Hz and FSW = 400 kHz

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9.2.2 TPS922055 48-V Input, 1-A, 12-piece WLED Driver with PWM Dimming

9.2.2.1 Design Requirements

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9.2.2.2 Detailed Design Procedure

9.2.2.2.1 Inductor Selection

9.2.2.2.2 Input Capacitor Selection

9.2.2.2.3 Output Capacitor Selection

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9.2.2.3 Application Curves

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9.3 Power Supply Recommendations

9.4 Layout

9.4.1 Layout Guidelines

9.4.2 Layout Example