TPS92201 TI | Alldatasheet
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Technical content
TPS92201 1.5-A High Efficiency Synchronous Buck LED Driver
1 Features
- 2.5-V to 5.5-V input voltage range
- 1.5-A constant output current
- Up to 95% efficiency
- 0.1-μA shutdown current
- 220-mΩ (HS) / 170-mΩ (LS) MOSFETs
- Up to 100% switching duty cycle
- 1.5-MHz switching frequency
- Force PWM mode for low output ripple (TPS92201)
- Power save mode for high efficiency in light load (TPS92201A)
- 0.6-V to VIN output voltage range
- 100mV feedback regulation voltage
- 1% to 100% analog dimming with high accuracy
- 20-kHz to 200-kHz PWM input frequency
- Internal soft startup
- Full protection with over current, LED open/short, FB resistor open/short
- Thermal shutdown protection
- Available in WSON-6 package
2 Applications
- Test and measurement
- Power delivery
- Building automation – Smart home camera – Video doorbell – IP camera – Smart doorlock – Flashlight
3 Description
The TPS92201 is a high-efficiency 1.5-A synchronous buck-type LED driver with 2.5-V to 5.5-V input range. By integrating the high-side and low-side MOSFET, high efficiency and compact solution size can be achieved. The ultra-low 1- μA shutdown current helps saving power in battery-powered applications. Adaptive off-time with peak current control scheme is adapted in the TPS92201. To get the smallest output ripple, the device operates at typically 1.5-MHz pulse width modulation (PWM) mode in full current range. Adaptive off-time with peak current control scheme is adapted in the TPS92201A. At medium to heavy load, the device operates in pulse width modulation (PWM) mode with 1.5-MHz switching frequency. At light load, the device automatically enters pulse frequency modulation (PFM) to maintain high efficiency over the entire load current range. The integrated switches have the capability to deliever up to 1.5-A constant current. Analog dimming is achieved by adjusting the duty cycle of the PWM input with 1% to 100% range. 20kHz to 200kHz input PWM frequency can be supported to avoid audible noise. For safety and protection, the TPS92201 device implement full protections, including LED open, LED short, FB resistor open, FB resistor short and thermal shutdown. Device Information (1) PART NUMBER PACKAGE BODY SIZE (NOM) TPS92201DRV WSON (6) 2 mm × 2 mm (3) TPS92201ADRV WSON (6) TPS92201DRL (2) SOT563 (6) 1.6 mm × 1.6 mm TPS92201ADRL (2) SOT563 (6) (1) For more information, see Section 11. (2) Preview information (not Production Data). (3) The package size (length x width) is a nominal value and includes pins, where applicable. PWM VIN FB GND SW VOUT VIN: 2.5V - 5.5V EN 2.2 H RSENSE 10 F 4.7 F PWM: 20kHz - 200kHz Simplified Schematic TPS92201, TPS92201A SLVSH40 – NOVEMBER 2023 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
11 Mechanical, Packaging, and Orderable
TPS92201, TPS92201A SLVSH40 – NOVEMBER 2023 www.ti.com
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4 Device Comparison Table
PART NUMBER MATERIAL POWER SAVE MODE PACKAGE TPS92200 TPS92201DRVR No WSON-6 TPS92201MDRVR(1) No TPS92201A TPS92201ADRVR Yes TPS92201AMDRVR(1) Yes (1) Extended Temperature devices, supporting –55°C to approximately 125°C operating ambient temperature. www.ti.com TPS92201, TPS92201A SLVSH40 – NOVEMBER 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: TPS92201 TPS92201A
5 Pin Configuration and Functions
5 GND
Figure 5-1. DRV Package 6-Pin WSON Top View 2 EN
3 VIN
PWM1 Figure 5-2. DRL Package 6-Pin SOT563 Top View PIN NUMBER I/O/PWR DESCRIPTION NAME DRV DRL PWM 1 6 I PWM input. LED output current is adjusted according to the PWM input duty cycle. EN 2 5 I Device enable input. Logic high enables the device, logic low disables the device and turns the device into shutdown. Do not leave floating. VIN 3 4 PWR Power supply input. SW 4 3 PWR Switch pin. Connecting the internal FET switches and inductor terminal. GND 5 2 PWR Power ground. FB 6 1 I Feedback pin for the internal control loop. Connect this pin to an external resistor to set output current. TPS92201, TPS92201A SLVSH40 – NOVEMBER 2023 www.ti.com
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6 Specifications
6.1 Absolute Maximum Ratings
over operating ambient temperature range (unless otherwise noted)(1) MIN MAX UNIT Voltage VIN, EN, PWM –0.3 6 V SW (DC) –0.3 VIN + 0.3 V SW (AC, 10ns transient) –3 9 V FB –0.3 5.5 V Operating junction temperature, TJ –40 150 °C Storage temperature, Tstg –65 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Theseare stress ratings only, which do not imply functional operation of the device at these or anyother conditions beyond those indicated under Recommended OperatingConditions. Exposure to absolute-maximum-rated conditions for extended periods mayaffect device reliability.
6.2 ESD Ratings
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V Charged-device model (CDM), per ANSI/ESDA/JEDEC JS-002(2) ±500 (1) JEDEC document JEP155 states that 500-V HBM allows safemanufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safemanufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating ambient temperature range (unless otherwise noted) MIN MAX UNIT Input stage VIN 2.5 5.5 V VEN –0.1 6 V VPWM –0.1 6 V Output stage VOUT VIN V IOUT 1.5 A Peripheral component Effective inductance 2.2 4.7 μH Effective capacitance μF Temperature Operating Ambient temperature, TA -40 85 °C Operating Junction temperature, TJ –40 125 °C
6.4 Thermal Information
THERMAL METRIC(1) TPS92201, TPS92201A UNITDRL (SOT563) DRV (WSON-6)
6 PINS 6 PINS
RθJA Junction-to-ambient thermal resistance 152 82.6 °C/W RθJC(top) Junction-to-case (top) thermal resistance 73.1 106.5 °C/W RθJB Junction-to-board thermal resistance 41.3 45.8 °C/W ψJT Junction-to-top characterization parameter 2.1 7.7 °C/W ψJB Junction-to-board characterization parameter 40.7 45.7 °C/W (1) For more information about traditional and new thermalmetrics, see the Semiconductor and IC Package Thermal Metricsapplication report, SPRA953. www.ti.com TPS92201, TPS92201A SLVSH40 – NOVEMBER 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: TPS92201 TPS92201A
6.5 Electrical Characteristics
VIN = 2.5 V to 5.5 V, TA = –40°C to +85°C(TA = –55°C to +125°C for TPS92201MDRVR and TPS92201AMDRVR); Typical values are at TA = 25°C (unless otherwise specified) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUT SUPPLY VIN Input voltage range 2.5 5.5 V VIN_UVLO VIN undervoltage lockout Fallng VIN 2.1 2.2 V Rising VIN 2.3 2.4 V Hysteresis 0.1 V ISD Shutdown current into VIN VIN = 3.6 V, VEN = 0 0.1 0.5 µA ISD_ET Shutdown current into VIN VIN = 3.6 V, VEN = 0 (TPS92201MDRVR and TPS92201AMDRVR) 0.1 1.75 µA IQ Quiescent current into VIN VIN = 3.6 V, VEN = 2V, VFB=0V, Not switching (TPS92201) 450 520 600 µA VIN = 3.6 V, VEN = 2V, VFB=0V, Not switching (TPS92201A) 520 630 720 µA LOGIC INTERFACE VEN_H High-level threshold voltage of EN 1.2 V VEN_L Low-level threshold voltage of EN 0.4 V VIH_PWM High-level threshold voltage of PWM 1 V VIL_PWM Low-level threshold voltage of PWM 0.7 V tEN_ON EN minimum on time to enable device µS tEN_OFF EN minimum off time to disable device µS tPWM_ON PWM minimum on time when dimming the output current 5 µS fPWM PWM input frequency 20 200 kHz DPWM PWM input duty cycle 1 100 % ILKG Leakage current of EN pin VIN = 5.5 V, VEN = 5.5V, VPWM = 5.5V, 1 µA ILKG Leakage current of PWM pin VIN = 5.5 V, VEN = 5.5V, VPWM = 5.5V, 0.5 µA OUTPUT STAGE VFB_REF FB pin regulation voltage at maximum duty cycle PWM = 100%, IOUT = 500mA 92 100 104 mV FB pin regulation voltage at 50% duty cycle PWM = 50%, IOUT = 0mA(TM), FPWM=20KHz -8% 50 +8% mV FB pin regulation voltage at 50% duty cycle PWM = 50%, IOUT = 0mA(TM), FPWM=200KHz -10% 50 +10% mV FB pin regulation voltage at 5% duty cycle PWM = 5%, IOUT = 500mA 5 mV FB pin regulation voltage at 1% duty cycle PWM = 1%, IOUT = 500mA 1 mV RHS High-side FET on resistance 220 330 mΩ RLS Low-side FET on resistance 170 300 mΩ fSW Switching frequency 1.5 MHz Dmax Maximum switching duty cycle 100 % ILIM_HS High-side current limit 1.9 2.16 A TPS92201, TPS92201A SLVSH40 – NOVEMBER 2023 www.ti.com
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6.6 Typical Characteristics
Vin(V) Iq(mA) 2.5 3 3.5 4 4.5 5 5.5 0.55 0.57 0.59 0.61 0.63 0.65 0.67 0.69 0.71 0.73 0.75 Figure 6-1. Quiescent Current vs Input Voltage Vin(V) Isd(uA) 2.5 3 3.5 4 4.5 5 5.5 0.025 0.0275 0.03 0.0325 0.035 0.0375 0.04 0.0425 0.045 0.0475 Figure 6-2. Shutdown Current vs Input Voltage Vin(V) Vfb Accuracy(%) 2.5 3 3.5 4 4.5 5 5.5 40% Duty 70% Duty 100% Duty Figure 6-3. FB Voltage Accuracy Junction Temperature(°C) Rdson(mohm) -60 -40 -20 0 20 40 60 80 100 120 140 160 180 200 220 240 260 280 300 320 Figure 6-4. High-Side FET On Resistance vs Junction Temperature Junction Temperature(°C) Rdson(mohm) -60 -40 -20 0 20 40 60 80 100 120 140 130 140 150 160 170 180 190 200 210 220 230 240 250 Figure 6-5. Low-Side FET On Resistance vs Junction Temperature DUTY(%) V FB (mV) 0 10 20 30 40 50 60 70 80 90 100 100 Figure 6-6. PWM duty cycle vs FB voltage www.ti.com TPS92201, TPS92201A SLVSH40 – NOVEMBER 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: TPS92201 TPS92201A
7 Detailed Description
7.1 Overview
The TPS92201 is a high-efficiency 1.5-A synchronous buck-type LED driver with 2.5-V to 5.5-V input range. The device operates at typically 1.5-MHz pulse width modulation (PWM) mode in full current range. In additional, TPS92201A can support Power Save Mode, the device operates in pulse width modulation (PWM) mode with 1.5-MHz switching frequency at heavy load, similar as TPS92201. But at light load, the device automatically enters pulse frequency modulation (PFM) to maintain high efficiency over the entire load current range. In Power Save Mode, the converter reduces switching frequency and minimizes current consumption, the output voltage rises slightly above the nominal output voltage. This effect is minimized by increasing the output capacitor. The integrated switches for both deivces have the capability to deliever up to 1.5-A constant current and no need for external Schottky diode. Analog dimming is achieved by adjusting the duty cycle of the PWM in 1% to 100% range. Full protection methods are implemented including LED open, LED short, FB resistor open, FB resistor short and thermal shutdown.
7.2 Functional Block Diagram
+VREF Control Logic EA VIN GNDFB Dimming Control Peak Current Detect EN Thermal Shutdown PWM Zero Current Detect TOFFVIN VSW Figure 7-1. TPS92201 Functional Block Diagram
7.3 Feature Description
7.3.1 Adaptive Off-time Control
Adaptive off-time with peak current control scheme is used in the device. The device operates at typically 1.5-MHz pulse width modulation (PWM) mode in full current range. At medium to heavy load, the device operates in pulse width modulation (PWM) mode with 1.5-MHz switching frequency. At light load, the device automatically enters pulse frequency modulation (PFM) to maintain high efficiency over the entire load current range. Based on the VIN/VOUT ratio, a simple circuit sets the required off time for the low-side MOSFET. The switching frequency relatively constant regardless of the variation of input voltage, output voltage, and load current.
7.3.2 Power Save Mode
TPS92201A automatically enters Power Save Mode to improve efficiency at light load when the inductor current becomes discontinuous. In Power Save Mode, the converter reduces switching frequency and minimizes current consumption. In Power Save Mode, the output voltage rises slightly above the nominal output voltage. This effect is minimized by increasing the output capacitor. TPS92201, TPS92201A SLVSH40 – NOVEMBER 2023 www.ti.com
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7.3.3 Soft Startup
After enabling the device, internal soft startup circuitry ramps up the output voltage which reaches nominal output voltage during a startup time. Output current rises smoothly and excessive inrush current is avoided. In battery-power system, the soft startup prevents extra voltage drop on primary power supply with high internal impedance. The internal soft startup period is xx ms typically.
7.3.4 Low Dropout Operation
The device offers a low input-to-output voltage differential by entering 100% switching duty cycle mode. In this mode, the high-side MOSFET switch is constantly turned on and the low-side MOSFET is switched off. The minimum input voltage to maintain output regulation, depending on the load current and output voltage, is calculated as: V IN _ MIN = V FB + V F _ I OUT + I OUT x R D S _ ON + R L (1) where
- VFB is the feedback reference voltage, which is typically 100 mV
- VF_IOUT is the LED forward voltage at output current
- IOUT is the output current setting
- RDS_ON is the high-side FET resistance when turning on
- RL is the inductor ohmic resistance DCR
7.3.5 LED Current Setting
The LED current is set by the external resistor between the FB pin and GND, calculated as: I LED = V F B R SENSE (2) where
- VFB is the feedback reference voltage, which is typically 100 mV
- RSENSE is the resistance between FB and GND
7.3.6 Voltage Reference
The feedback reference produces a precise ±5% voltage reference over whole temperature range when the PWM duty cycle is 100%, which is typically 100mV. In analog dimming mode, the feedback voltage is proportional to the duty cycle of PWM imput as shown in Figure 7-2. PWM duty VFB (mV) 100 Figure 7-2. FB voltage with PWM duty cycle www.ti.com TPS92201, TPS92201A SLVSH40 – NOVEMBER 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: TPS92201 TPS92201A
7.3.7 Switch Current Limit
The switch current limit prevents the device from high inductor current and drawing excessive current from battery or input voltage supply. Excessive current might occur with a heavy load or shorted output circuit condition. The device adopts the peak current control by sensing the current of the high-side switch. Once the high-side switch current limit is reached, the high-side switch is turned off and low-side switch is turned on to discharge the inductor current with an adaptive off-time.
7.3.8 Fault Behaviors
The TPS92201 is protected by high-side current limitation in different fault conditions, such as LED open and short, sense resistor open and short. No matter the fault happens before startup or during operation, the device can stay safety. Table 7-1. Fault protection conditions Fault Condition Behavior LED open VFB is driven close to 0 VOUT keeps increasing to VIN. and The high-side switch keeps turn on. LED anode short to cathode VFB is driven to VOUT quickly, then VFB is driven to VOUT quickly, the device keeps switching by minimum on-time. LED anode short to GND VFB is driven close to 0 high-side switch current limit triggered FB resistor open VFB is driven to VOUT - Vf The device keeps switching by the minimum on-time FB short to GND VFB is driven close to 0 VFB is driven close to 0. Current limit is triggered.
7.3.9 Under Voltage Lockout
To avoid mis-operation of the device at low input voltages, under voltage lockout is implemented that shuts down the device at voltages lower than VUVLO with VHYS_UVLO hysteresis.
7.3.10 Thermal Shutdown
The device enters thermal shutdown once the junction temperature exceeds the thermal shutdown rising threshold, T JSD. Once the junction temperature falls below the falling threshold, the device returns to normal operation automatically.
7.4 Device Functional Modes
7.4.1 Enabling/Disabling the Device
The device is enabled by setting the EN input to a logic High. Accordingly, a logic Low disables the device. If the device is enabled, the internal power stage starts switching and regulates the output current to the set value. The EN input must be terminated and should not be floating. TPS92201, TPS92201A SLVSH40 – NOVEMBER 2023 www.ti.com
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8 Application and Implementation
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
8.1 Application Information
The TPS92201 device is typically used as buck-type LED driver to drive IR or white LEDs from a 2.5 V to 5.5 V input.
8.2 Typical Application
VOUT2.5 V - 5.5 V EN 2.2 H 250 m 10 F 4.7 F PWM Input Figure 8-1. TPS92201 400 mA Output Application
8.2.1 Design Requirements
For this design example, use the parameters listed in Table 8-1 as the input parameters. Table 8-1. Design Parameters DESIGN PARAMETER EXAMPLE VALUE Input voltage 2.5 V to 5.5 V Output voltage 1.9 V (1.8 V Vf + 0.1 V VFB) Maximum output current 400 mA Table 8-2 lists the components used for the example. Table 8-2. List of Components REFERENCE DESCRIPTION MANUFACTURER(1) C1 4.7 µF, Ceramic Capacitor, 10 V, X7R, size 0805, GRM21BR71A475KA73L Murata C2 10 µF, Ceramic Capacitor, 10 V, X7R, size 0805, GRM21BR71A106KE51L Murata L1 2.2 µH, Power Inductor, SDER041H-2R2MS Cyntec R1,R2,R3 Chip resistor,1%,size 0603 Std. C3 Optional, 6.8 pF if it is needed Std. (1) See Third-party Products Disclaimer www.ti.com TPS92201, TPS92201A SLVSH40 – NOVEMBER 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: TPS92201 TPS92201A
8.2.2 Detailed Design Procedure
8.2.2.1 Custom Design With WEBENCH® Tools
Click here to create a custom design using the TPS92201 device with the WEBENCH® Power Designer. 1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements. 2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial. 3. Compare the generated design with other possible solutions from Texas Instruments. The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricing and component availability. In most cases, these actions are available:
- Run electrical simulations to see important waveforms and circuit performance
- Run thermal simulations to understand board thermal performance
- Export customized schematic and layout into popular CAD formats
- Print PDF reports for the design, and share the design with colleagues Get more information about WEBENCH tools at www.ti.com/WEBENCH.
8.2.2.2 Setting the Output Voltage
When sizing R2, in order to achieve low current consumption and acceptable noise sensitivity, use a maximum of 200 kΩ for R2. Larger currents through R2 improve noise sensitivity and output voltage accuracy but increase current consumption. /c247 /c248 /c246/c231 /c232 /c230 /c43/c180/c61/c247 /c248 /c246/c231 /c232 /c230 /c43/c180/c61 2 116 . 02 11 R RVR RVV FBOUT (3) A feed forward capacitor, C3 improves the loop bandwidth to make a fast transient response. 6.8-pF capacitance is recommended for R2 of 100-k Ω resistance. A more detailed discussion on the optimization for stability vs. transient response can be found in SLVA289.
8.2.2.3 Output Filter Design
The inductor and output capacitor together provide a low-pass filter. To simplify this process, Table 8-3 outlines possible inductor and capacitor value combinations. Checked cells represent combinations that are proven for stability by simulation and lab test. Further combinations should be checked for each individual application. Table 8-3. Matrix of Output Capacitor and Inductor Combinations VOUT [V] L µH COUT µF 4.7 10 22 2x 22 100 0.6 ≤ VOUT < 1.2 1 + 2.2 ++(3) 2.2 ++(3) + 1.8 ≤ VOUT 1 + + + 2.2 ++(3) + + (1) Inductor tolerance and current de-rating is anticipated. The effective inductance can vary by +20% and -30%. (2) Capacitor tolerance and bias voltage de-rating is anticipated. The effective capacitance can vary by +20% and -50%. (3) This LC combination is the standard value and recommended for most applications.
8.2.2.4 Inductor Selection
The main parameters for inductor selection is inductor value and then saturation current of the inductor. To calculate the maximum inductor current under static load conditions, Equation 4 is given: TPS92201, TPS92201A SLVSH40 – NOVEMBER 2023 www.ti.com
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L MAX,OUTMAX, L fL V VI III /c180 /c45 /c180/c61/c68 /c68/c43/c61 (4) where:
- IOUT,MAX is the maximum output current
- ΔIL is the inductor current ripple
- fSW is the switching frequency
- L is the inductor value It is recommended to choose a saturation current for the inductor that is approximately 20% to 30% higher than IL,MAX. In addition, DC resistance and size should also be taken into account when selecting an appropriate inductor.
8.2.2.5 Input and Output Capacitor Selection
The architecture of the TPS92201 allows use of tiny ceramic-type output capacitors with low equivalent series resistance (ESR). These capacitors provide low output voltage ripple and are thus recommended. To keep its resistance up to high frequencies and to achieve narrow capacitance variation with temperature, it is recommended to use X7R or X5R dielectric. The input capacitor is the low impedance energy source for the converter that helps provide stable operation. A low ESR multilayer ceramic capacitor is recommended for best filtering. For most applications, 4.7-µF input capacitance is sufficient; a larger value reduces input voltage ripple. The TPS92201 is designed to operate with an output capacitor of 10 µF to 47 µF, as outlined in Table 8-3. www.ti.com TPS92201, TPS92201A SLVSH40 – NOVEMBER 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: TPS92201 TPS92201A
8.2.3 Application Performance Curves
VIN = 5 V, VOUT = 1.8 V, L = 2.2 μH, TA = 25°C, unless otherwise noted. DUTY(%) Efficiency(%) 0 10 20 30 40 50 60 70 80 90 100 100 V IN = 2.7V V IN = 3.6V V IN = 5.5V Iset = 1.5A L = 2.2uH 1 IRLED Figure 8-2. 1 IRLED Output Efficiency DUTY(%) Efficiency(%) 0 10 20 30 40 50 60 70 80 90 100 100 V IN = 3.6V V IN = 5.5V Iset = 1.5A L = 2.2uH 2 IRLED Figure 8-3. 2 IRLED Output Efficiency DUTY(%) Efficiency(%) 0 10 20 30 40 50 60 70 80 90 100 100
1 IRLED
2 IRLED
VIN = 3.6V Iset = 1.5A L = 2.2uH Figure 8-4. Output Efficiency at 3.6V Input Voltage DUTY(%) Efficiency(%) 0 10 20 30 40 50 60 70 80 90 100 100 VIN = 5.5V Iset = 1.5A L = 2.2uH Figure 8-5. Output Efficiency at 5.5V Input Voltage VOUT 1V/div Inductor Current 500mA/div 1.5A o set SW 5V/div 20us/div VIN = 5 V Iset = 1.5A Figure 8-6. Vout short to GND protection VOUT 5V/div Inductor Current 1A/div SW 5V/div 100us/div VIN = 5 V Iset = 1.5A Figure 8-7. Vout Open Protection TPS92201, TPS92201A SLVSH40 – NOVEMBER 2023 www.ti.com
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VIN = 5 V Iset = 1.5A L = 2.2uH Figure 8-8. VIN Control Start Up with Load VOUT 1V/div Inductor Current 1A/div SW 5V/div VIN 5V/div 100us/div VIN = 5 V Iset = 1.5A L = 2.2uH Figure 8-9. VIN Control Shutdown with Load SW 2V/div Inductor Current 500mA/div Vout 20mV/div AC 0.4us/div Vin = 5V IOUT = 0.5 A Figure 8-10. PWM Operation SW 2V/div Inductor Current 500mA/div Vout 100mV/div AC 2us/div Vin = 5V IOUT = 0.1 A Figure 8-11. Power Save Mode Operation VOUT 500mV/div AC Inductor Current 500mA/div VEN 2V/div 400us/div IOUT = 1.5 A L=2.2uH Figure 8-12. EN Control Startup with Load VOUT 200mV/div AC Inductor Current 500mA/div VEN 2V/div 400us/div IOUT = 0.1 A L=2.2uH Figure 8-13. EN Control Startup with Load
8.3 Power Supply Recommendations
The power supply to the TPS92201 must have a current rating according to the supply voltage, output voltage and output current.
8.4 Layout
8.4.1 Layout Guidelines
The PCB layout is an important step to maintain the high performance of the TPS92201 device.
- The input/output capacitors and the inductor should be placed as close as possible to the IC. This keeps the power traces short. Routing these power traces direct and wide results in low trace resistance and low parasitic inductance.
- The low side of the input and output capacitors must be connected properly to the power GND to avoid a GND potential shift.
- The sense traces connected to FB are signal traces. Special care should be taken to avoid noise being induced. Keep these traces away from SW nodes. www.ti.com TPS92201, TPS92201A SLVSH40 – NOVEMBER 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: TPS92201 TPS92201A
- GND layers might be used for shielding.
8.4.2 Layout Example
Figure 8-14. TPS92201WSON Layout PWM FB EN GND VIN SW GND VIN sw VOUTL1 R1 Figure 8-15. TPS92201SOT Layout
8.4.3 Thermal Considerations
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, convection surfaces, and the presence of other heat-generating components affect the power dissipation limits of a given component. Two basic approaches for enhancing thermal performance are listed below:
- Improving the power dissipation capability of the PCB design
- Introducing airflow in the system For more details on how to use the thermal parameters, see the application notes: Thermal Characteristics TPS92201, TPS92201A SLVSH40 – NOVEMBER 2023 www.ti.com
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9 Device and Documentation Support
9.1 Device Support
9.1.1 Custom Design With WEBENCH® Tools
Click here to create a custom design using the TPS92201 device with the WEBENCH® Power Designer. 1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements. 2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial. 3. Compare the generated design with other possible solutions from Texas Instruments. The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time pricing and component availability. In most cases, these actions are available:
- Run electrical simulations to see important waveforms and circuit performance
- Run thermal simulations to understand board thermal performance
- Export customized schematic and layout into popular CAD formats
- Print PDF reports for the design, and share the design with colleagues Get more information about WEBENCH tools at www.ti.com/WEBENCH.
9.2 Documentation Support
9.2.1 Related Documentation
Semiconductor and IC Package Thermal Metrics Application Report (SPRA953) Thermal Characteristics of Linear and Logic Packages Using JEDEC PCB Designs Application Report (SZZA017)
9.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Notifications to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.
9.4 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.
9.5 Trademarks
TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners.
9.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
9.7 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions. www.ti.com TPS92201, TPS92201A SLVSH40 – NOVEMBER 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: TPS92201 TPS92201A
NOTE: Page numbers for previous revisions may differ from page numbers in the current version. DATE REVISION NOTES November 2023 * Initial Release TPS92201, TPS92201A SLVSH40 – NOVEMBER 2023 www.ti.com
18 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated
Product Folder Links: TPS92201 TPS92201A
11 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. www.ti.com TPS92201, TPS92201A SLVSH40 – NOVEMBER 2023 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 19 Product Folder Links: TPS92201 TPS92201A
www.ti.com 5-Nov-2023 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead finish/ Ball material (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples TPS92201ADRVR ACTIVE WSON DRV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 34MH Samples TPS92201AMDRVR ACTIVE WSON DRV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 3CZH Samples TPS92201DRVR ACTIVE WSON DRV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 34LH Samples TPS92201MDRVR ACTIVE WSON DRV 6 3000 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 3CXH Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and Addendum-Page 1
www.ti.com 5-Nov-2023 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2
PACKAGE MATERIALS INFORMATION www.ti.com 6-Nov-2023 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 6-Nov-2023 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS92201ADRVR WSON DRV 6 3000 210.0 185.0 35.0 TPS92201AMDRVR WSON DRV 6 3000 210.0 185.0 35.0 TPS92201DRVR WSON DRV 6 3000 210.0 185.0 35.0 TPS92201MDRVR WSON DRV 6 3000 210.0 185.0 35.0 Pack Materials-Page 2
Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. DRV 6 WSON - 0.8 mm max height PLASTIC SMALL OUTLINE - NO LEAD 4206925/F
www.ti.com PACKAGE OUTLINE C 6X 0.35 0.25 1.6 0.1 6X 0.3 0.2 1.3 1 0.1 4X 0.65 0.8 0.7 0.05 0.00 B 2.1 1.9 A 2.1 1.9 (0.2) TYP WSON - 0.8 mm max heightDRV0006A PLASTIC SMALL OUTLINE - NO LEAD 4222173/B 04/2018 PIN 1 INDEX AREA SEATING PLANE 0.08 C 3 4 (OPTIONAL) PIN 1 ID
0.1 C A B
0.05 C THERMAL PAD EXPOSED NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. SCALE 5.500
www.ti.com EXAMPLE BOARD LAYOUT
0.07 MIN
0.07 MAX
(1) 4X (0.65) (1.95) 6X (0.3) 6X (0.45) (1.6) (R0.05) TYP ( 0.2) VIA TYP (1.1) WSON - 0.8 mm max heightDRV0006A PLASTIC SMALL OUTLINE - NO LEAD 4222173/B 04/2018 SYMM 3 4 SYMM LAND PATTERN EXAMPLE SCALE:25X NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommended via locations are shown. SOLDER MASK OPENING SOLDER MASK METAL UNDER SOLDER MASK DEFINED METALSOLDER MASK OPENING SOLDER MASK DETAILS NON SOLDER MASK DEFINED (PREFERRED)
www.ti.com EXAMPLE STENCIL DESIGN 6X (0.3) 6X (0.45) 4X (0.65) (0.7) (1) (1.95) (R0.05) TYP (0.45) WSON - 0.8 mm max heightDRV0006A PLASTIC SMALL OUTLINE - NO LEAD 4222173/B 04/2018 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD #7 88% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:30X SYMM 3 4 SYMM METAL
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