TPS92020 TI | Alldatasheet

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www.ti.com SLUSA54 –JULY 2010 Resonant-SwitchingDriverControllerforLEDLighting Check forSamples: TPS92020 1FEATURES DESCRIPTION• LLC Resonant SwitchingDriverControllerfor Multi-StringLED LightingApplications The TPS92020 is a high-performanceresonant- switchingLED drivercontroller.Itisdesignedforuse• Half-BridgeTopology inhigherpower LED lightingsystems.The TPS92020• Fixedor VariableSwitchingFrequency Control uses resonant switchingin an LLC topologyto• Programmable Soft-StartTime achievea veryhighefficiencycompared totraditional

  • Programmable Dead Time forBest Efficiency half-bridgeconverters.
  • Easy ON/OFF Control The programmable dead time enables zero-voltage switching with minimum magnetizing current,• OvercurrentProtection maximizing system efficiencyacross a varietyof• Over-TemperatureProtection applications.• Bias VoltageUVLO and OVP The TPS92020 can operate in two switching• IntegratedGate DriverWith 0.4-ASource and frequencymodes. Fixedfrequencyallowsforsimple0.8-ASink Capability design when the load currentis constantwhile
  • OperatingTemperature Range: –40°C to125°C variableswitchingallows for optimal closed-loop controlforloadswithvaryingcurrents.The internal• SOIC 8-PinPackage oscillatorsupportstheswitchingfrequenciesfrom 30 kHz to350 kHz.Thishigh-accuracyoscillatorrealizesAPPLICATIONS the minimum switchingfrequencylimitingwith 4%• Commercial /IndustrialLED LightingDrivers tolerance,allowingthedesignertoavoidover-design
  • High Bay LED Lighting ofthepower stageand,thus,furtherreducingoverall
  • Low Bay LED Lighting systemcost.
  • StreetLED Lighting
  • Area LED Lighting
  • Stadium LED Lighting
  • LED WallWashing
  • LED DTV and MonitorBack-lighting
  • ElectronicLightingBallasts Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsofTexas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2010,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

SLUSA54 –JULY 2010 www.ti.com This integratedcircuitcan be damaged by ESD. Texas Instrumentsrecommends thatallintegratedcircuitsbe handled with appropriateprecautions.Failuretoobserveproperhandlingand installationprocedurescan cause damage. ESD damage can rangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmay be more susceptibletodamage because verysmallparametricchanges couldcause thedevicenottomeet itspublishedspecifications. DESCRIPTION (CONTINUED) The programmable soft-starttimermaximizes designflexibilitydemanded by the variedrequirementsof end equipmentsutilizinga half-bridgetopology.The TPS92020 incorporatesa 0.4-Asourceand 0.8-Asinkfordriving a low-costgatedrivertransformer,deliveringcompletesystem protectionfunctionsincludingovercurrent,UVLO, biassupplyOVP and OTP. Table1. PACKAGE INFORMATION (1) OPERATINGDEVICE PACKAGE OPERATING FREQUENCY TEMPERATURE TPS92020D 8-PinSOIC Variable -40°C to125°C (1) Forthemost currentpackage and orderinginformation,see thePackage OptionAddendum attheend ofthisdocument,orvisitthe deviceproductfolderon ti.com. ABSOLUTE MAXIMUM RATINGS (1)(2)(3)(4) overoperatingfree-airtemperaturerange(unlessotherwisenoted) VALUE UNITS MIN MAX VCC 22 Voltagerange V GD1, GD2 -0.5 VVCC + 0.5 Gate drivecurrent– continuous GD1, GD2 ± 25 RT –5 mA Currentrange DT -0.7 Operatingjunctiontemperature TJ −40 125 Storagetemperature Tstg −65 150 Human Body Model (HBM) 2,000 ElectrostaticDischarge V Charged DeviceModel (CDM) 500 Lead temperature(10seconds) 260 (1) These arestresslimits.Stressbeyond theselimitsmay cause permanentdamage tothedevice.Functionaloperationofthedeviceat theseorany conditionsbeyond thoseindicatedunderRECOMMENDED OPERATING CONDITIONS isnotimplied.Exposureto absolutemaximum ratedconditionsforextendedperiodsoftimemay affectdevicereliability. (2) AllvoltagesarewithrespecttoGND. (3) Allcurrentsarepositiveintotheterminal,negativeoutoftheterminal. (4) Innormaluse,terminalsGD1 and GD2 areconnectedtoan externalgatedriverand areinternallylimitedinoutputcurrent. DISSIPATION RATINGS THERMAL IMPEDANCE,PACKAGE T A = 25°C POWER RATING TA = 85°C POWER RATINGJUNCTION-TO-AMBIENT 8-PinSOIC 150°C/watt(1)(2) 667 mW (1) 267 mW (1) (1) Thermalresistanceisa strongfunctionofboardconstructionand layout.Airflowwillreducethermalresistance.Thisnumber isonlya generalguide. (2) Thermalresistancecalculatedwitha low-Kmethodology.

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www.ti.com SLUSA54 –JULY 2010 RECOMMENDED OPERATING CONDITIONS overoperatingfree-airtemperaturerange(unlessotherwisenoted) MIN TYP MAX UNIT VVCC VCC inputvoltagefroma low-impedancesource 11.5 18.0 V R RT RT resistor 1 8.666 kΩ R DT DT resistor 3.3 39 C SS SS capacitor 0.01 1 mF

ELECTRICAL CHARACTERISTICS

overoperatingfree-airtemperaturerange,−40°C < TA < 125°C, TJ = TA,VVCC = 12 V,GND = 0 V,R RT = 4.7kΩ,R DT = 16.9 kΩ,C VCC = 1 mF,(unlessotherwisenoted) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS BIAS SUPPLY (VCC) VCC current,disabled SS = 0 V 1 1.5 mA VCC current,enabled SS = 5 V,C GD1 = C GD2 = 1 nF 2.5 5 7.5 VCC current,UVLO VCC = 9 V 100 400 mA UVLO turn-onthreshold Measured atVCC rising 9.9 10.5 11.1 VUVLO UVLO turn-offthreshold Measured atVCC falling 8.9 9.5 10.1 UVLO hysteresis Measured atVCC 0.7 1 1.3 V OVP turn-offthreshold Measured atVCC rising 18 20 22 VOVP OVP turn-onthreshold Measured atVCC falling 16 18 20 OVP hysteresis Measured atVCC 1.5 2 2.5 DEAD TIME (DT) tDT Dead time R DT = 16.9kΩ 390 420 450 ns OSCILLATOR KICO Switchingfrequencygain/I(RT) R RT = 4.7kΩ,IRT = 0 to1 mA 60 80 100 Hz/mA t GD1, GD2 on-timemismatching -50 50 ns SwitchingfrequencystartingburstfSW(bm) VSS = 5 V 300 350 400mode Switchingfrequencytocome outof VSS = 5 V 280 330 380 kHzburstmode -40°C ≤ TA ≤ 125°C 122 142.5 162 fSW(start) Switchingfrequencyatsoftstart -20°C ≤ TA ≤ 105°C 125 142.5 160 EXTERNAL DISABLE/SOFT START Enablethreshold Measure atSS rising 1.1 1.2 1.3 Disablethreshold Measured atSS falling 0.85 1 1.1 V Disablehysteresis Measured atSS 0.15 0.35 Measured between SS (falling)Disableprop.delay 250 500 750 nsand GD2 (falling) Sourcecurrenton SS pin VSS = 0.5V -225 -175 -125 ISS mA Sourcecurrenton SS pin VSS = 1.35V -5.5 -5 -4.5 Copyright© 2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):TPS92020

SLUSA54 –JULY 2010 www.ti.com ELECTRICAL CHARACTERISTICS (continued) overoperatingfree-airtemperaturerange,−40°C < TA < 125°C, TJ = TA,VVCC = 12 V,GND = 0 V,R RT = 4.7kΩ,R DT = 16.9 kΩ,C VCC = 1 mF,(unlessotherwisenoted) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS PEAK CURRENT LIMIT Level1 overcurrentthreshold– VOCVOC1(off) 0.9 1 1.1rising Level2 overcurrentlatchthreshold–VOC2(off) 1.8 2.0 2.2 VVOC rising Level1 overcurrentthreshold– VOCVOC1(on) 0.5 0.6 0.7falling tdOC Propagationdelay 60 200 500 ns IOC OC biascurrent VOC = 0.8V -200 200 nA GATE DRIVE GD1, GD2 outputvoltagehigh IGD1 = −20 mA, IGD2 = −20 mA 9 11 V GD1, GD2 on-resistancehigh IGD1 = −20 mA, IGD2 = −20 mA 12 30 Ω GD1, GD2 outputvoltagelow IGD1 = −20 mA, IGD2 = 20 mA 0.08 0.2 V GD1, GD2 on-resistancelow IGD1 = −20 mA, IGD2 = 20 mA 4 10 Ω VVCC risingfrom1 V to9 V,tRISE RisetimeGDx 18 35C LOAD = 1 nF ns VVCC fallingfrom9 V to1 V,tFALL FalltimeGDx 12 25C LOAD = 1 nF VVCC = 6 V,IGD1 = 1.2mA,GD1, GD2 outputvoltageduringUVLO 0.5 1.75 VIGD2 = 1.2mA THERMAL SHUTDOWN TSD Thermalshutdownthreshold 160 Thermalshutdownrecoverythreshold 140

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www.ti.com SLUSA54 –JULY 2010 DEVICE INFORMATION TPS92020 (Top View) TERMINAL FUNCTIONS TERMINAL

DESCRIPTION

NAME NO. I/O Setsthedead timeofhigh-sideand low-sideswitchdrivingsignals.Connecta resistortoground.Withinternal 2.25-Vvoltagereference,thecurrentflowingthroughtheresistorsetsthedead time.To preventshootthroughDT 1 I when thispinisaccidentallyshorttoground,theminimum dead timeissetto120 ns.Any dead timesetting lessthan120 ns defaultsto120-nsdead time. GD1 8 O High-sideand low-sideswitchgatedriver.Connectgatedrivertransformerprimarysidetothesetwo pinsto drivethehalfbridge.GD2 5 O GND 6 - Ground. Overcurrentprotection.When thevoltageon thispinisabove 1 V,gatedriversignalsareactivelypulledlow. OC 3 I Afterthevoltagefallsbelow0.6V,thegatedriversignalrecoverswithsoftstart.When OC pinvoltageis above 2 V,thedeviceislatchedoff.BringingVCC belowUVLO levelresetstheovercurrentlatchoff. The currentflowingoutofthispinsetsthefrequencyofthegatedriversignals.Connecttheopto-coupler collectortothispintocontroltheswitchingfrequencyforregulationpurpose.Parallela resistortogroundto RT 2 I settheminimum currentflowingoutofthepinand settheminimum switchingfrequency.To setthemaximum switchingfrequencylimiting,placea resistorinserieswiththeopto-couplertransistor.Thisresistorsetsthe maximum currentflowingoutofthepinand limitsthemaximum switchingfrequency. Soft-start.Thispinsetsthesoft-starttimeofthesystem.Connecta capacitortoground.Pullingthispinbelow SS 4 I 1 V disablesthedevicetoalloweasy ON/OFF control.The soft-startfunctionisenabledafterallfault conditions,includingbiassupplyOV, UVLO, overcurrentprotectionand over-temperatureprotection. Biassupply.Connectthispintoa power supplylessthan20 V.Placea 1-mF capacitorinparalleltogroundtoVCC 7 - filteroutnoise. Copyright© 2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):TPS92020

7 VCC

UVLO10.5V 9.5V

6 GND

5 GD2

GD_Stop 2.25V Dead time generator 2.5V OSC 1.2V/1V FAULT Q Q SET CLR S R Vss Ic 5uA 170uA FAULT Q Q SET CLR D UVLO OV OC TSD RDT Css OC_latch TPS92020 SLUSA54 –JULY 2010 www.ti.com BLOCK DIAGRAM

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Bias Supply Voltage (V) 0.2 0.4 0.6 0.8 1.0 10 11 14 0.1 0.3 0.5 0.7 0.9 Bias Supply Current (mA) VOC = OPEN 0 1.0 2.0 4.0 Timing Resistance Current (mA) 150 200 350 3.0 5.0 100 250 300 Switching Frequency (kHz) –40 °C 25 °C 125 °C 0 200 300 600 Dead Time Current (mA) 400 600 1000 400 700 100 300 700 900 Dead Time (ns) 500100 200 500 800 –40 °C 25 °C 125 °C 0 15 20 40 Dead Time Resistance (k /c87) 400 600 1000 25 45 100 300 700 900 Dead Time (ns) 355 200 500 800 10 30 –40 °C 25 °C 125 °C TPS92020 www.ti.com SLUSA54 –JULY 2010 TYPICAL CHARACTERISTICS AtVVCC = 12 V,R RT = 4.7kΩ,R DT = 16.9kΩ,VSS = 5 V,VOC = 0 V;allvoltagesarewithrespecttoGND, TJ = TA = 25°C, unlessotherwisenoted. Figure1.Bias Supply Currentvs.Bias Supply Voltage Figure2.SwitchingFrequency vs.Timing Resistance Figure3.Dead Time vs.Dead Time Current Figure4.Dead Time vs.Dead Time Resistance Copyright© 2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLink(s):TPS92020

Time (ns) 600 Gate Drive Voltage (V) 100 400 Gate Drive Voltage Gate Drive Current –0.2 0.6 0.8 1.6 0.4 1.0 1.4 0.2 1.2 Gate Drive Current (A) VCC = 15 V 0 600 Time (ns) 1000 Gate Drive Voltage (V) 200 400 Gate Drive Current –0.1 0.3 0.4 0.8 0.2 0.5 0.7 0.1 0.6 Gate Drive Current (A) VCC = 15 V Gate Drive Voltage 800 100 150 200 250 300 –60 20–40 –20 0 40 120 60 80 100 140 Junction Temperature (°C) Propagation Delay Time (ns) –60 9.0 8.0 9.5 8.5 11.5 10.5 12.0 11.0 10.0 –40 –20 0 40 120 60 80 100 140 Junction Temperature (°C) UVLO Threshold Voltage (V) UVLO-On Threshold (VCC Rising) UVLO-Off Threshold (VCC Falling) TPS92020 SLUSA54 –JULY 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) Time Time Figure7.PropagationDelay Time vs.Temperature Figure8.UVLO ThresholdVoltagevs.Temperature

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OVP-Off Threshold (VCC Rising) OVP-On Threshold (VCC Falling) –60 17.0 16.0 17.5 16.5 21.5 20.5 22.0 21.0 20.0 –40 –20 0 40 120 60 80 100 140 Junction Temperature (°C) Overvoltage Threshold (V) 19.0 18.0 19.5 18.5 –60 20–40 –20 0 40 120 60 80 100 140 Junction Temperature (°C) 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 OC Off Threshold (VOC Rising) OC On Threshold (VOC Falling) OC Latch Threshold (VOC Rising) Overcurrent Threshold Voltage (V) 2.4 100 50 100 150 300 200 250 350 Switching Frequency (kHz) On-Time Mismatch Time (ns) TPS92020 www.ti.com SLUSA54 –JULY 2010 TYPICAL CHARACTERISTICS (continued) Figure9.OvervoltageThresholdvs.Temperature Figure10.OvercurrentThresholdVoltagevs.Temperature Figure11.On-Time Mismatch vs.SwitchingFrequency Copyright© 2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLink(s):TPS92020

n:1:1 CR LR LM RE UDG-10045 VGE VOE /c40 /c41 /c40 /c41 /c230 /c246 /c231 /c247/c61 /c180 /c180 /c231 /c247 /c112/c232 /c248 E 2 8R n R /c40 /c41 /c40 /c41 /c119 /c180 /c180/c230 /c246 /c231 /c247 /c119 /c180 /c43/c231 /c247 /c61/c231 /c247 /c119 /c180 /c180/c230 /c246 /c43 /c43 /c119 /c180/c231 /c247 /c231 /c247 /c119 /c180 /c43 /c119 /c180/c232 /c248/c232 /c248 M E M EOUT M EDC R M E R j L R j L RV j L R 1V j Lj L R j C2 TPS92020 SLUSA54 –JULY 2010 www.ti.com

APPLICATION INFORMATION

The soft-switchingcapability,highefficiencyand longholduptimemake theLLC resonantconverterattractivefor many applications,such as digitalTV, ac/dc adaptersand computer power supplies.Figure12 shows the schematicoftheLLC resonantconverter. The LLC resonantconverteris based on the seriesresonantconverter(SRC). By using the transformer magnetizinginductor,zero-voltageswitchingcan be achievedovera wide rangeofinputvoltageand load.As a resultofmultipleresonances,zero-voltageswitchingcan be maintainedeven when theswitchingfrequencyis higherorlowerthanresonantfrequency.Thissimplifiestheconverterdesigntoavoidthezero-currentswitching region,whichcan leadtosystem damage. The converterachievesthebestefficiencywhen operatedclosetoits resonantfrequencyat a nominal inputvoltage.As the switchingfrequencyis lowered the voltagegain is significantlyincreased.Thisallowstheconvertertomaintainregulationwhen theinputvoltagefallslow.These featuresmake theconverterideallysuitedtooperatefromtheoutputofa high-voltageboostPFC pre-regulator, allowingittoholdup throughbriefperiodsofac line-voltagedropout. Due to the natureof resonantconverter,allthe voltagesand currentson the resonantcomponents are approximatelysinusoidal.The gain characteristicof LLC resonantconverterisanalyzedbased on the First Harmonic Approximation(FHA),whichmeans allthevoltagesand currentsaretreatedas sinusoidalshape with thefrequencysame as switchingfrequency. Accordingtotheoperationprincipleoftheconverter,theLLC resonantconvertercan be draw as theequivalent circuitas shown inFigure13. Figure12.LLC Resonant Converter Figure13.LLC Resonant ConverterEquivalent Circuit In thisequivalentcircuit,the Vge and Voe are the fundamentalharmonicsof the voltagegeneratedby the half bridgeand thevoltageon thetransformerprimaryside,respectively.These voltagescan be calculatedthrough Fourieranalysis.The loadresistorR e istheequivalentresistoroftheload,and itcan be calculatedas: (1) Based on thisequivalentcircuit,theconvertergainatdifferentswitchingfrequenciescan be calculatedas: where

  • VDC /2istheequivalentinputvoltagedue tothehalf-bridgestructure (2)

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/c61 /c112 /c180 /c1800 R R

2 L C

/c230 /c246/c61/c231 /c247 /c232 /c248 n ff f /c230 /c246/c61/c231 /c247 /c232 /c248 M n R LL L /c61 R R E E L CQ R /c230 /c246 /c231 /c247 /c231 /c247/c61/c231 /c247/c230 /c246/c231 /c247/c231 /c247 /c232 /c248/c232 /c248 OUT DC VM V /c40 /c41 /c40 /c41 /c40 /c41 /c40 /c41 /c180/c61 /c180 /c43 /c45 /c180 /c43 /c43 /c180 /c180 /c180 n n n n n n n n e L fM L f f 1 f 1 j f L Q TPS92020 www.ti.com SLUSA54 –JULY 2010 Table2.CircuitDefinitionCalculations RESONANT NORMALIZEDNORMALIZED GAIN QUALITY FACTOR INDUCTOR RATIOFREQUENCY FREQUENCY (6) (7)(4) (5) (3) Followingthe definitionsinTable 2, the convertergainat differentswitchingfrequenciescan be calculatedin Equation8. where

  • M istheconvertervoltagegain
  • Ln istheratioofthemagnetizinginductancetotheresonantinductance
  • fn isthenormalizedswitchingfrequency
  • Q e isthequalityfactor (8) Because of the FHA, Equation8 isan approximation.When the switchingfrequencymoves away from the resonantfrequency,theerrorbecomes larger.However,thisequationcan be used as thedesigntool.The final resultsneed tobe verifiedby thetimebased simulationorhardwaretest. Copyright© 2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLink(s):TPS92020

0.5 1 1.5 2 0.5 1.5 0.1 nf M 5/c61eQ 2/c61eQ 1/c61eQ 5 . 0/c61eQ 2 . 0/c61eQ 1 . 0/c61eQ 0.5 1 1.5 2 0.5 1.5 0.1 nf M 5/c61eQ 2/c61eQ 1/c61eQ 5 . 0/c61eQ 2 . 0/c61eQ 1 . 0/c61eQ 0.5 1 1.5 2 0.5 1.5 0.1 nf M 5/c61eQ 2/c61eQ 1/c61eQ 5 . 0/c61eQ 2 . 0/c61eQ 1 . 0/c61eQ 0.5 1 1.5 2 0.5 1.5 0.1 nf M 5/c61eQ 2/c61eQ 1/c61eQ 5 . 0/c61eQ 2 . 0/c61eQ 1 . 0/c61eQ TPS92020 SLUSA54 –JULY 2010 www.ti.com From Equation8,when switchingfrequencyisequaltoresonantfrequency,fn = 1 and convertervoltagegainis equal to 1. Convertergain at differentloads and inductorratioconditionsare shown in Figure14 through Figure17. Figure14.NormalizedSwitchingFrequency Figure15.NormalizedSwitchingFrequency vs.ConverterVoltageGain,Ln=1 vs.ConverterVoltageGain,Ln=5 Figure16.NormalizedSwitchingFrequency Figure17.NormalizedSwitchingFrequency vs.ConverterVoltageGain,Ln=10 vs.ConverterVoltageGain,Ln=20 Based on itstheoryofoperationtheLLC resonantconverteriscontrolledthroughPulseFrequencyModulation (PFM).The outputvoltageisregulatedby adjustingtheswitchingfrequencyaccordingtotheinputand output conditions.Optimalefficiencyisachievedatthenominalinputvoltageby settingtheswitchingfrequencycloseto theresonantfrequency.When theinputvoltagedroopslow theswitchingfrequencyisdecreasedtoboostthe gainand maintainregulation. The TPS92020 resonanthalf-bridgecontrolleruses variableswitchingfrequencycontroltoadjusttheresonant tank impedance and regulateoutputvoltage.This 8-pinpackage deviceintegratesthe criticalfunctionsfor optimizingthesystemperformancewhilegreatlysimplifyingthedesignand layout.

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/c61 /c43 /c180D DTt 20 ns R 24 ns SW RT RT 1 1f I 83 Hz A2 6 ns 1A 150 nsI /c61 /c180 /c187 /c180 /c109 /c230 /c246 /c180 /c43/c231 /c247 /c232 /c248 UDG-10046 2 RT TPS92020 Maximum Frequency Limiting Minimum Frequency Limiting /c40 /c41F max 1 2 1 1I 2.5 V R R /c230 /c246/c61 /c43 /c231 /c247 /c232 /c248 /c40 /c41 /c40 /c41 /c61 /c230 /c246 /c45/c231 /c247 /c231 /c247 /c180/c232 /c248 F max MAX 6 nsI 1 150 ns2 f /c40 /c41F min

2.5 VI R/c61

/c40 /c41 /c40 /c41 /c61 /c230 /c246 /c45/c231 /c247 /c231 /c247 /c180/c232 /c248 F min MIN 6 nsI 1 150 ns2 f TPS92020 www.ti.com SLUSA54 –JULY 2010 AdjustableDead Time Resonant half-bridgeconverterrelieson theresonanttankcurrentatMOSFETs turn-offtoachievesoftswitching and reduceswitchingloss.Higherturn-offcurrentprovidesmore energytodischargethejunctioncapacitor,while itgeneratesmore turn-offloss.Smallerturn-offcurrentreduces turn-offloss,but itrequireslongertime to dischargeMOSFETs junctioncapacitorsand achievesoftswitching.By choosingan appropriatedead time, turn-offcurrentis minimizedwhilestillmaintainingzero-voltageswitching,and best system performanceis realized. InTPS92020, dead timecan be adjustedthrougha singleresistorfrom DT pintoground.With internal2.25-V voltagereference,thecurrentflowthroughtheresistorsetsthedead time. (9) To preventshootthroughwhen theDT pinaccidentallyconnectstoground,thetwo gatedriveroutputslimitthe dead-timetoa minimum of120-ns.Any dead-timesettinglessthan120-ns,defaultstotheminimum 120-nslimit. Oscillator With variableswitchingfrequencycontrol,TPS92020 relieson the internaloscillatorto vary the switching frequency.The oscillatoris controlledby the currentflowingout of RT pin.Except duringsoftstart,the relationshipbetween the gate signalfrequencyand the currentflowingout of RT pincan be representedin Equation10. (10) Since the switchingfrequencyisproportionalto the current,by limitingthe maximum and minimum current flowingoutofRT pin,theminimum and maximum switchingfrequencyoftheconvertercouldbe easilylimited. As shown inFigure18,puttinga resistorfromRT pintogroundlimitstheminimum currentand puttinga resistor inserieswiththeopto-couplerlimitsthemaximum current. Figure18. Maximum and Minimum Frequency SettingforTPS92020 The frequencylimitingresistorcan be calculatedinEquation11 throughEquation14. (12)(11) (14)(13) Copyright© 2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLink(s):TPS92020

tSS(delay) 1.2 V UDG-10047 4 V tSS /c40 /c41 /c61 /c180 /c109 SSSS delay

1.2 Vt C 175 A

VI 1.81mA 2.2 k /c61 /c180 /c180 /c43 /c230 /c246/c43 /c45 /c231 /c247 /c87/c232 /c248 /c61 /c180/c109SS SS

2.8 Vt C 5 A

SLUSA54 –JULY 2010 www.ti.com SoftStart Duringstartup and faultrecoveryconditions,softstartisalwaysimplementedtopreventexcessiveresonanttank currentand ensure Zero-VoltageSwitching(ZVS).Duringsoftstart,the switchingfrequencyisincreased.The soft-starttimecan be programmed by placinga capacitorfromSS pintoground. The soft-startpinalsoservesas an ON/OFF controlpinofthedevice.By activelypullingtheSS pinbelow 1 V, thedeviceisdisabled.When thepulldown isremoved,SS pinvoltageisincreasedbecause ofinternalcharging current.Once SS pin becomes above 1.2 V, the devicestartsto generatedgate-driversignaland enters soft-startmode. The timesequence ofsoftstartisshown inFigure19. Figure19. Soft-StartSequence To preventa longdelaybetween theON command and appearanceofa gatedriversignal,theSS pincurrentis setas two differentlevels.When SS pinvoltageisbelow 1.2V, itsoutputcurrentis175 mA. Thishighcurrent couldchargethesoft-startpincapacitorto1.2V ina shortperiodoftime,and reducesthetimedelay.Thistime delayiscalculatedinEquation15. (15) The switchingfrequencyduringsoftstartisdeterminedby both the currentflowingout of the RT pinand the voltageon SS pin.The switchingfrequencycan be calculatedbased on theEquation16. (16) AfterSS pinvoltagereaches4 V, soft-startperiodisfinishedand switchingfrequencybecomes the same as demanded by theRT pincurrent.The timeused tochargeSS pinfrom1.2V to4 V isdefinedas soft-starttime and can be calculatedinEquation17. (17) To ensure reliableoperation,the gate driversrestartwithGD2 turninghigh.Thispreventsuncertaintyduring systemstartup.

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/c40 /c41 /c40 /c41 /c40 /c41 /c119 /c180 /c180 /c43/c61 /c180 /c180 /c112 /c119 /c180 n n e OUTCR pk 2 n n j L Q 14V n V L TPS92020 www.ti.com SLUSA54 –JULY 2010 Burst-Mode Operation Duringlightloadcondition,the resonantconvertertendsto increaseitsswitchingfrequencyand maintainthe output voltageregulation.However, due to ringingcaused by transformerparasiticcapacitorand the rectification-diode-junctioncapacitors,the energy could be directlytransferredto the load through these capacitors.When thispower becomes more than the load requires,outputvoltagebecome higherthan the regulationlevel.Inthiscase,furtherincreasingtheswitchingfrequencywillnothelpthesituationbecause energy transfertotheloadisnotthroughthepower stageitself. To preventoutputovervoltageduringthiscondition,theTPS92020 includestheburst-modeoperationfunction. When the controlloopdemands switchingfrequencyhigherthan 350 kHz, the gate driverisdisabledand the power stage stopsswitching.When the outputvoltagedrops,the controlloop beginsto demand switching frequencylessthan330 kHz,thegatedriverrecoversand thepower stagebeginstodeliverpower again.This allowsoutputvoltagetobe regulated. Thisburstmode can be easilydisabledby limitingthemaximum switchingfrequencytolessthan350 kHz.Inthis way, thecontrolloopneverdemands a switchingfrequencyhigherthan350 kHz and as a result,burstmode operationdoes notoccur. OvercurrentProtection To preventpower stagefailureunder excessiveloadcurrentcondition,theTPS92020 includesan overcurrent protectionfunction.Witha dedicatedOC pin,thepower stageisshutdown when OC pinvoltageisabove 1 V. Once theOC pinvoltagefallsbelow 0.6V, thegatedriverrecoverswitha softstart.To enhance system safety, theTPS92020 latchesup theentiresystem when theOC pinvoltagerisesabove 2 V. BringingtheVCC voltage belowtheUVLO voltagelevelresetsthedevice. The currentcan be indirectlysensed throughthevoltageacrossresonantcapacitorby usingthesensingnetwork shown inFigure20. Figure20. CurrentSensing forLLC Resonant Converter The generalconceptofthissensingmethod isthattheac voltageacrosstheresonantcapacitorisproportionalto loadcurrent. AccordingtotheFHA model,peak voltageoftheac component on theresonantcapacitorcan be calculatedin Equation18. (18) Therefore,theresonantcapacitorvoltagereachesitsmaximum valueattheminimum switchingfrequencyand maximum load.AccordingtoEquation18,thecurrentsensingnetworkcomponents can be calculated.Due tothe natureofFHA, thefinalcircuitparametersmust be verifiedthroughactualhardwaretest. Copyright© 2010,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLink(s):TPS92020

/c40 /c41/c40 /c41 /c40 /c41 /c61 /c180 MAXCR pk s RS max V R 2 P /c61 /c180S S MIN 10C R f /c40 /c41 /c112/c61 /c180 S P CR pk MAX RR V 2 /c40 /c41 /c180 /c61P P MIN 10C R f TPS92020 SLUSA54 –JULY 2010 www.ti.com Table3.CalculatedCurrentSensing Network Components SYMBOL FUNCTION DESIGN EQUATION R S Transferac voltageacrossresonantcapacitorintocurrentsource (19) C S Blockingdc voltageon resonantcapacitor (20) R P Load resistorofthecurrentsource (21) C P Filtercapacitor (22) Gate Driver Half-bridgeresonantconverteris controlledby the nearly50% duty cyclevariablefrequencysquare wave voltage.This allowsthe halfbridgeto be easilydrivenby the gate-drivertransformer.Compared with a half-bridgedriverdevice,a gate-drivertransformerprovidesa simpleand reliablesolution,which:

  • Eliminatetheneed forgatedriverpower supply
  • Enablesimplifiedlayout
  • Preventingshootthroughdue tothetransformercoupling
  • No latchup The TPS92020 integratestwo-gatedriverswith0.4-Asourceand 0.8-Asinkcapabilitytodirectlydrivethegate drivertransformer. For LLC resonantconverter,itiscriticalforthe gate-driversignalto be preciselysymmetrical.Otherwise,the resonanttank operationwillbe symmetrical.The load currentdistributionwillbe unbalancedforthe output rectifiers,whichinturnrequiresoverdesignofthepower stagesand thermalmanagement. In TPS92020, the gate-driveroutputis preciselytrimmed to have lessthan 50 ns mismatch.Althoughthe gate-driversignalis quitesymmetrical,itis stillrecommended to insertthe dc blockingcapacitorin the gate-drivertransformerprimarysidetopreventtransformersaturationduringfasttransients. VCC Pin Connect a regulatedbiassupplytoVCC pin.When VCC becomes above 10.5V thedeviceisenabledand after allfaultconditionsareclearedthegatedriverstartswithsoftstart.When theVCC voltagedropsbelow 9.5V, the deviceentersUVLO protectionmode and bothgatedriversareactivelypulledlow.When VCC risesabove 20 V the deviceentersVCC overvoltageprotectionmode and the deviceisdisabledwithboth gate driversactively pulledlow.VCC over-voltageprotectionwillrecoverwithsoftstartwhen theVCC voltagereturnsbelow18 V. Over-TemperatureProtection TPS92020 continuouslysenses itsjunctiontemperature.When thejunctiontemperaturerisesabove 160°C the deviceentersover-temperatureprotectionmode withboth gate driversactivelypulledlow.When junction temperaturedropsbelow140°C, gatedriverrestartswithsoftstart.

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www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TPS92020D Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 92020D TPS92020D.A Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 92020D TPS92020D.B Active Production SOIC (D) | 8 75 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 125 92020D TPS92020DR Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 92020D TPS92020DR.A Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 92020D TPS92020DR.B Active Production SOIC (D) | 8 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 92020D (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

www.ti.com 23-May-2025 Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS92020DR SOIC D 8 2500 356.0 356.0 35.0 Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) TPS92020D D SOIC 8 75 506.6 8 3940 4.32 TPS92020D.A D SOIC 8 75 506.6 8 3940 4.32 TPS92020D.B D SOIC 8 75 506.6 8 3940 4.32 Pack Materials-Page 3

www.ti.com PACKAGE OUTLINE C .228-.244 TYP [5.80-6.19] .069 MAX [1.75] 6X .050 [1.27] 8X .012-.020 [0.31-0.51] .150 [3.81] .005-.010 TYP [0.13-0.25] 0 - 8 .004-.010 [0.11-0.25] .010 [0.25].016-.050 [0.41-1.27] 4X (0 -15 ) A .189-.197 [4.81-5.00] NOTE 3 B .150-.157 [3.81-3.98] NOTE 4 4X (0 -15 ) (.041) [1.04] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. 1 8 .010 [0.25] C A B PIN 1 ID AREA SEATING PLANE .004 [0.1] C SEE DETAIL A DETAIL A TYPICAL SCALE 2.800

www.ti.com EXAMPLE BOARD LAYOUT .0028 MAX [0.07] ALL AROUND .0028 MIN [0.07] ALL AROUND (.213) [5.4] 6X (.050 ) [1.27] 8X (.061 ) [1.55] 8X (.024) [0.6] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METAL SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS EXPOSED METAL OPENING SOLDER MASK METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X SYMM 4 5 SEE DETAILS SYMM

www.ti.com EXAMPLE STENCIL DESIGN 8X (.061 ) [1.55] 8X (.024) [0.6] 6X (.050 ) [1.27] (.213) [5.4] (R.002 ) TYP [0.05] SOIC - 1.75 mm max heightD0008A SMALL OUTLINE INTEGRATED CIRCUIT 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X SYMM SYMM 4 5

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