TPS70245PWPRG4

DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 37

Technical content

PWP□PACKAGE (TOP□VIEW) NC VIN1 VIN1 MR EN1 EN2 RESET GND VIN2 VIN2 NC VOUT1 VOUT1 VSENSE1/FB1 PG1 PG2 VSENSE2/FB2 VOUT2 VOUT2 NC NC□=□No□internal□connection 1.8 V VIN1 VIN2 EN1 EN2 VOUT1 VSENSE1 PG1 MR RESET PG2 VSENSE2 VOUT2 TPS70251□PWP 5□V 3.3□V I/O PG2 Core 0.1 /c109F RESET 10 /c109F 10 /c109F 0.1 /c109F MR PG1 EN1 250□k/c87 >2□V <0.7□V 250□k/c87 >2□V <0.7□V >2□V <0.7□V EN2 250□k/c87 TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 www.ti.com SLVS286E –JUNE 2000–REVISED DECEMBER 2009 DUAL-OUTPUT,LOW DROPOUTVOLTAGEREGULATORS WITHINTEGRATEDSVSFORSPLITVOLTAGESYSTEMS 1FEATURES DESCRIPTION 23• Dual Output VoltagesforSplit-Supply The TPS702xx isa low dropoutvoltageregulatorwith Applications integratedSVS (RESET, POR, or power on reset) and power good (PG) functions.These devicesare• IndependentEnable Functions(See Part capableofsupplying500mA and 250mA by regulatorNumber TPS701xx forSequenced Outputs) 1 and regulator2 respectively.Quiescentcurrentis• Output CurrentRange of500mA on Regulator typically190μA at fullload.Differentiatedfeatures,1 and 250mA on Regulator2 such as accuracy,fast transientresponse, SVS

• FastTransientResponse supervisorycircuit(power on reset),manual reset Outputs
• Open DrainPower-On Reset with120ms Delay
• Open DrainPower Good forRegulator1 and Regulator2
• Ultralow190μA (typ)QuiescentCurrent
• 1μA InputCurrentDuring Standby
• Low Noise:65μVRMS WithoutBypass Capacitor
• Quick Output CapacitorDischargeFeature
• One Manual Reset Input
• 2% Accuracy Over Load and Temperature
• UndervoltageLockout (UVLO) Feature
• 20-PinPowerPAD ™ TSSOP Package
• Thermal Shutdown Protection Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsofTexas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2PowerPAD isa trademarkofTexas Instruments. 3Allothertrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2000–2009,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 SLVS286E –JUNE 2000–REVISED DECEMBER 2009 www.ti.com The TPS702xx familyofvoltageregulatorsoffersverylow dropoutvoltageand dualoutputs.These deviceshave extremelylow noiseoutputperformancewithoutusingany added filterbypass capacitorsand are designedto have a fasttransientresponseand be stablewith10μF lowESR capacitors. 1 can supportup to 500mA, and regulator2 can supportup to 250mA. Separatevoltageinputsallowthe designertoconfigurethesourcepower. Because thePMOS devicebehaves as a low-valueresistor,thedropoutvoltageisverylow (typically170mV on regulator1) and isdirectlyproportionalto the outputcurrent.Additionally,sincethe PMOS pass elementisa voltage-drivendevice,thequiescentcurrentisverylow and independentofoutputloading(maximum of230μA overthefullrangeofoutputcurrentand fullrangeoftemperature).ThisLDO familyalsofeaturesa sleepmode; applyinga highsignaltoEN1 orEN2 (enable)shutsdown regulator1 orregulator2,respectively.When a high signalisappliedtobothEN1 and EN2, bothregulatorsentersleepmode, therebyreducingtheinputcurrentto 2μA atTJ = +25°C. For each regulator,thereisan internaldischargetransistortodischargetheoutputcapacitorwhen theregulator isturnedoff(disabled). The PG1 pinreportsthe voltageconditionat VOUT1 . The PG1 pincan be used to implementa SVS (RESET, POR, orpower on reset)forthecircuitrysuppliedby regulator1.The PG2 pinreportsthevoltageconditionsat VOUT2 .The PG2 pincan be used toimplementa SVS (poweron reset)forthecircuitrysuppliedby regulator2. The TPS702xx featuresa RESET (SVS, POR, orpower on reset).RESET outputinitiatesa resetintheeventof an undervoltagecondition.RESET alsoindicatesthestatusofthemanual resetpin(MR). When MR isinthe logichighstate,RESET goes toa highimpedance stateaftera 120ms delay.To monitorVOUT1 ,thePG1 output pincan be connectedtoMR. To monitorVOUT2 ,thePG2 outputpincan be connectedtoMR. The devicehas an undervoltagelockoutUVLO circuitthatpreventstheinternalregulatorsfrom turningon until VIN1 reaches2.5V.

2 SubmitDocumentationFeedback Copyright© 2000–2009,Texas InstrumentsIncorporated

TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 www.ti.com SLVS286E –JUNE 2000–REVISED DECEMBER 2009 This integratedcircuitcan be damaged by ESD. Texas Instrumentsrecommends thatallintegratedcircuitsbe handled with appropriateprecautions.Failuretoobserveproperhandlingand installationprocedurescan cause damage. ESD damage can rangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmay be more susceptibletodamage because verysmallparametricchanges couldcause thedevicenottomeet itspublishedspecifications. ORDERING INFORMATION (1) VOLTAGE (V)(2) PACKAGE- SPECIFIED LEAD TEMPERATURE ORDERING TRANSPORT PRODUCT VOUT1 VOUT2 (DESIGNATOR) RANGE (TJ) NUMBER MEDIA, QUANTITY TPS70202PWP Tube,70 TPS70202 Adjustable Adjustable HTSSOP-20 (PWP) -40°C to+125°C TPS70202PWPR Tape and Reel,2000 TPS70245PWP Tube,70 TPS70245 3.3V 1.2V HTSSOP-20 (PWP) -40°C to+125°C TPS70245PWPR Tape and Reel,2000 TPS70248PWP Tube,70 TPS70248 3.3V 1.5V HTSSOP-20 (PWP) -40°C to+125°C TPS70248PWPR Tape and Reel,2000 TPS70251PWP Tube,70 TPS70251 3.3V 1.8V HTSSOP-20 (PWP) -40°C to+125°C TPS70251PWPR Tape and Reel,2000 TPS70258PWP Tube,70 TPS70258 3.3V 2.5V HTSSOP-20 (PWP) -40°C to+125°C TPS70258PWPR Tape and Reel,2000 (1) Forthemost currentpackage and orderinginformationsee thePackage OptionAddendum locatedattheend ofthisdocument,orsee theTIweb siteatwww.ti.com. (2) Forfixed1.20Voperation,tieFB toOUT. ABSOLUTE MAXIMUM RATINGS (1) Over operatingfree-airtemperaturerange(unlessotherwisenoted). TPS702xx UNIT Inputvoltagerange:VIN1,VIN2 (2) –0.3to+7 V VoltagerangeatEN1, EN2 –0.3to+7 V Outputvoltagerange(VOUT1 ,VSENSE1 ) 5.5 V Outputvoltagerange(VOUT2 ,VSENSE2 ) 5.5 V Maximum RESET, PG1, PG2 voltage 7 V Maximum MR voltage VIN1 V Peak outputcurrent Internallylimited — Continuoustotalpower dissipation See DissipationRatingsTable — Operatingvirtualjunctiontemperaturerange,TJ –40 to+150 °C Storagetemperaturerange,Tstg –65 to+150 °C ESD rating,HBM 2 kV (1) Stressesbeyond thoselistedunderabsolutemaximum ratingsmay cause permanentdamage tothedevice.These arestressratings only,and functionaloperationofthedeviceattheseorany otherconditionsbeyond thoseindicatedunderrecommended operating conditionsisnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmay affectdevicereliability. (2) Allvoltagesaretiedtonetworkground. Copyright© 2000–2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3

TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 SLVS286E –JUNE 2000–REVISED DECEMBER 2009 www.ti.com DISSIPATION RATINGS DERATINGPACKAGE AIR FLOW (CFM) TA ≤ +25°C TA = +70°C TA = +85°CFACTOR 0 3.067W 30.67mW/°C 1.687W 1.227W PWP (1) 250 4.115W 41.15mW/°C 2.265W 1.646W (1) Thisparameterismeasured withtherecommended copperheatsinkpatternon a 4-layerPCB, 1 oz.copperon a 4-inby 4-inground layer.Formore information,refertoTItechnicalbriefSLMA002 . RECOMMENDED OPERATING CONDITIONS Over operatingtemperaturerange(unlessotherwisenoted). MIN MAX UNIT Inputvoltage,VI (1)(regulator1 and 2) 2.7 6 V Outputcurrent,IO (regulator1) 0 500 mA Outputcurrent,IO (regulator2) 0 250 mA Outputvoltagerange(foradjustableoption) 1.22 5.5 V Operatingvirtualjunctiontemperature,TJ –40 +125 °C (1) To calculatetheminimum inputvoltageformaximum outputcurrent,use thefollowingequation:VI(min)= VO(max) + VDO(max load).

4 SubmitDocumentationFeedback Copyright© 2000–2009,Texas InstrumentsIncorporated

Line□regulation□(mV)□=□(%/V)□x Vo x□1000(V 2.7) 100 /c45Imax 100 /c45Imax oLine□regulation□(mV)□=□(%/V)□x Vo (3) IfVO < 1.8VthenVImax = 6V,VImin= 2.7V: IfVO > 2.5VthenVImax = 6V,VImin= VO + 1V: TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 www.ti.com SLVS286E –JUNE 2000–REVISED DECEMBER 2009

ELECTRICAL CHARACTERISTICS

Over recommended operatingjunctiontemperaturerange(TJ = –40°C to+125°C),VIN1 orVIN2 = VOUT(nom) + 1V,IO = 1mA, EN1 = 0V,EN2 = 0V,and C O = 33μF (unlessotherwisenoted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 2.7V< VIN < 6V, FB connectedtoVO 1.22Reference TJ = +25°C voltage 2.7V< VIN < 6V, FB connectedtoVO 1.196 1.244 2.7V< VIN < 6V, TJ = +25°C 1.2 1.2VOutput 2.7V< VIN < 6V, 1.176 1.224 2.7V< VIN < 6V, TJ = +25°C 1.5Output 1.5VOutput 2.7V< VIN < 6V, 1.47 1.53VO voltage(1), V (2) 2.8V< VIN < 6V, TJ = +25°C 1.8 1.8VOutput 2.8V< VIN < 6V, 1.764 1.836 3.5V< VIN < 6V, TJ = +25°C 2.5 2.5VOutput 3.5V< VIN < 6V, 2.45 2.55 4.3V< VIN < 6V, TJ = +25°C 3.3 3.3VOutput 4.3V< VIN < 6V, 3.234 3.366 Quiescentcurrent(GND current)for See (2) TJ = +25°C 190 regulator1 and regulator2,EN1 = EN2 μASee (2) 230= 0V (1) Outputvoltagelineregulation(∆VO /VO ) VO + 1V < VIN ≤ 6V, TJ = +25°C (1) 0.01 %Vforregulator1 and regulator2 (3) VO + 1V < VIN ≤ 6V (1) 0.1 Load regulationforVOUT 1 and VOUT2 TJ = +25°C 1 mV Outputnoise Regulator1 65 Vn BW = 300Hz to50kHz, C O = 33μF,TJ = +25°C μVRMSvoltage Regulator2 65 Regulator1 1.6 1.9 Outputcurrentlimit VOUT = 0V A Regulator2 0.750 1 Thermalshutdownjunctiontemperature +150 °C Regulator1 EN1 = VIN,EN2 = VI TJ = +25°C 2II Standby μA(standby)current Regulator2 EN1 = VIN,EN2 = VI 6 f= 1kHz,C O = 33μF,Regulator1 TJ = +25°C (1) 60Power- IOUT1 = 500mA PSRR supplyripple dB f= 1kHz,C O = 33μF,rejection Regulator2 TJ = +25°C (1) 50IOUT2 = 250mA UVLO threshold 2.4 2.65 V RESET Terminal Minimum inputvoltageforvalidRESET IRESET = 300μA, V(RESET) ≤ 0.8V 1.0 1.3 V t(RESET) RESET pulseduration 80 120 160 ms Outputlowvoltage VIN = 3.5V, I(RESET) = 1mA 0.15 0.4 V Leakage current V(RESET) = 6V 1 μA (1) Minimum inputoperatingvoltageis2.7VorVO(typ)+ 1V,whicheverisgreater.Maximum inputvoltage= 6V,minimum output current= 1mA. (2) IO = 1mA to500mA forRegulator1 and 1mA to250mA forRegulator2. Copyright© 2000–2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5

TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 SLVS286E –JUNE 2000–REVISED DECEMBER 2009 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Over recommended operatingjunctiontemperaturerange(TJ = –40°C to+125°C),VIN1 orVIN2 = VOUT(nom) + 1V,IO = 1mA, EN1 = 0V,EN2 = 0V,and C O = 33μF (unlessotherwisenoted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT PG1/PG2 Terminal Minimum inputvoltageforvalidPGx I(PGx) = 300μA, V(PGx) ≤ 0.8V 1.0 1.3 V Tripthresholdvoltage VO decreasing 92 95 98 %V OUT Hysteresisvoltage Measured atVO 0.5 %V OUT tr(PGx) Risingedge deglitch 30 μs Outputlowvoltage VIN = 2.7V, I(PGx) = 1mA 0.15 0.4 V Leakage current V(PGx) = 6V 1 μA EN1/EN2 Terminal High-levelENx inputvoltage 2 V Low-levelENx inputvoltage 0.7 V Inputcurrent(ENx) –1 1 μA MR Terminal High-levelinputvoltage 2 V Low-levelinputvoltage 0.7 V Pull-upcurrentsource 6 μA VOUT1 Terminal IO = 500mA, VIN1 = 3.2V TJ = +25°C 170 Dropoutvoltage(4) mV IO = 500mA, VIN1 = 3.2V 275 Peak outputcurrent 2ms pulsewidth 750 mA Dischargetransistorcurrent VOUT1 = 1.5V 7.5 mA VOUT2 Terminal Peak outputcurrent 2ms pulsewidth 375 mA Dischargetransistorcurrent VOUT2 = 1.5V 7.5 mA FB Terminal Inputcurrent:TPS70202 FB = 1.8V 1 μA The 3.3Vregulatorinputissetto3.2Vtoperformthistest.

6 SubmitDocumentationFeedback Copyright© 2000–2009,Texas InstrumentsIncorporated

/c45 /c45 Thermal Shutdown 2.5□V +/c45 Current Sense Reference Vref Vref ENA_1 FB1 ENA_1 120□ms Delay 0.95□x□Vref VSENSE1 0.95□x□Vref VSENSE2 Rising□Edge Deglitch ENA_1 ENA_2 Current Sense +/c45 ENA_2 ENA_2 FB2Vref V (2□Pins)IN1 GND EN1 EN2 VIN2 (2□Pins) PG1 MR RESET VIN1 PG1 Comp Rising□Edge Deglitch PG2PG2 Comp VOUT2 (2□Pins) /c45 10□k/c87 VSENSE1 (see□Note□A) V (2□Pins)OUT1 VSENSE2 (see□Note□A) 10□k/c87 TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 www.ti.com SLVS286E –JUNE 2000–REVISED DECEMBER 2009 DEVICE INFORMATION FixedVoltageVersion A. For most applications,VSENSE1 and VSENSE2 shouldbe externallyconnectedto VOUT1 and VOUT2 , respectively,as closeas possibleto the device.For otherimplementations,referto SENSE terminalconnectiondiscussioninthe ApplicationInformationsection. Copyright© 2000–2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7

/c45 /c45 Thermal Shutdown 2.5□V +/c45 Current Sense Reference Vref Vref ENA_1 ENA_1 120□ms Delay 0.95□x□Vref FB1 0.95□x□Vref FB2 Rising□Edge Deglitch ENA_1 ENA_2 Current Sense +/c45 ENA_2 ENA_2 FB2Vref V (2□Pins)IN1 GND EN1 EN2 VIN2 (2□Pins) FB1 (see□Note□A) PG1 MR RESET FB2 (see□Note□A) VIN1 PG1 Comp Rising□Edge Deglitch PG2PG2 Comp VOUT1 (2□Pins) VOUT2 (2□Pins) /c45 TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 SLVS286E –JUNE 2000–REVISED DECEMBER 2009 www.ti.com AdjustableVoltageVersion A. For most applications,FB1 and FB2 shouldbe externallyconnectedtoresistordividersas closeas possibletothe device.For otherimplementations,referto FB terminalsconnectiondiscussionin the ApplicationInformation section.

8 SubmitDocumentationFeedback Copyright© 2000–2009,Texas InstrumentsIncorporated

t t t MR Input RESET Output 120□ms Delay 120□ms Delay NOTE□A: V .□The□symbol□VRES RESRESETis□the□minimum□input□voltage□for□a□valid is□not□currently□listed□within□EIA□or□JEDEC□standards□for semiconductor□symbology. VRES (see□Note□A) Output Undefined Output Undefined VRES (see□Note□A) VPG t t t PG1 Output VIT+ (see□Note□B) VIN1 VOUT1 VPG1 (see□Note□A) V (see□Note□B) VUVLO VUVLO PG1 NOTES: A. V is□the□minimum□input□voltage□for□a□valid□PG1.□The□symbol□V is□not□currently□listed□within□EIA□or□JEDECPG1 PG1 standards for□semiconductor□symbology. B. V trip□voltage□is□typically□5%□lower□than□the□output□voltage□(95%V ). to□V iO IT+ s□the□hysteresis□voltage.IT/c45 VIT/c45 Threshold Voltage Output Undefined Output Undefined IT/c45 TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 www.ti.com SLVS286E –JUNE 2000–REVISED DECEMBER 2009 RESET Timing Diagram PG1 Timing Diagram Copyright© 2000–2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9

NOTE A: V trip V toIT IT/c45 /c45voltage□is□typically□5%□lower□than□the□output□voltage□(95%V ).O IT+ V is□the□hysteresis□voltage. t t t PG2 Output VIT+ (see□Note□A) VIN2 VOUT2 V (see□Note□A) Threshold Voltage IT/c45 TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 SLVS286E –JUNE 2000–REVISED DECEMBER 2009 www.ti.com PG2 Timing Diagram (assuming VIN1 alreadypowered up) TERMINAL FUNCTIONS TERMINAL I/O DESCRIPTION NAME NO. EN1 5 I ActivelowenableforVOUT1 EN2 6 I ActivelowenableforVOUT2 GND 8 — Ground MR 4 I Manual resetinput,activelow,pulledup internally NC 1,11,20 — No connection PG1 16 O Open drainoutput,lowwhen VOUT1 voltageislessthan95% ofthenominalregulatedvoltage PG2 15 O Open drainoutput,lowwhen VOUT2 voltageislessthan95% ofthenominalregulatedvoltage RESET 7 I Open drainoutput,SVS (power-onreset)signal,activelow VIN1 2,3 I Inputvoltageofregulator1 VIN2 9,10 I Inputvoltageofregulator2 VOUT1 18,19 O Outputvoltageofregulator1 VOUT2 12,13 O Outputvoltageofregulator2 VSENSE2 /FB2 14 I Regulator2 outputvoltagesense/regulator2 feedbackforadjustable VSENSE1 /FB1 17 I Regulator1 outputvoltagesense/regulator1 feedbackforadjustable

10 SubmitDocumentationFeedback Copyright© 2000–2009,Texas InstrumentsIncorporated

TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 www.ti.com SLVS286E –JUNE 2000–REVISED DECEMBER 2009 DetailedDescription The TPS702xx low dropoutregulatorfamilyprovidesdualregulatedoutputvoltageswithindependentenable functions.These devicesprovidefasttransientresponseand highaccuracywithsmalloutputcapacitors,while drawinglow quiescentcurrent.Other featuresare integratedSVS (power-onreset,RESET) and power good (PG1, PG2) thatmonitoroutputvoltagesand providelogicoutputto the system.These differentiatedfeatures providea completepower solution. The TPS702xx, unlikemany otherLDOs, featuresverylow quiescentcurrentthatremainsvirtuallyconstanteven withvaryingloads.ConventionalLDO regulatorsuse a pnp pass element,thebase currentofwhich isdirectly proportionaltotheloadcurrentthroughtheregulator(IB = IC /β).The TPS702xx uses a PMOS transistortopass current;thegateofthePMOS isvoltage-driven,so operatingcurrentislowand stableoverthefullloadrange. Pin Functions Enable (EN1, EN2) The EN terminalsareinputsthatenableorshutdown each respectiveregulator.IfEN isata voltagehighsignal, therespectiveregulatorisinshutdownmode. When EN goes tovoltagelow,therespectiveregulatorisenabled. Power-Good (PG1,PG2) The PG terminalsare open drain,activehigh outputterminalsthatindicatethe statusof each respective regulator.When VOUT1 reaches95% ofitsregulatedvoltage,PG1 goes toa highimpedance state.When VOUT2 reaches95% ofitsregulatedvoltage,PG2 goes toa highimpedance state.Each PG goes toa low impedance statewhen itsrespectiveoutputvoltageispulledbelow 95% (thatis,goes to an overloadcondition)of its regulatedvoltage.The open drainoutputsofthePG terminalsrequirea pull-upresistor. Manual Reset Pin MR isan activelow inputterminalused to triggera resetcondition.When MR ispulledto logiclow,a POR (RESET) occurs.The terminalhas a 6μA pull-upcurrenttoVIN1. Sense (VSENSE1 ,VSENSE2 ) The sense terminalsof fixed-outputoptionsmust be connectedto the regulatoroutputs,and the connection should be as shortas possible.Internally,the sense terminalconnectsto high-impedance,wide-bandwidth amplifiersthrougha resistor-dividernetworkand noisepickupfeedsthroughtotheregulatoroutput.Itisessential toroutethesense connectioninsuch a way as tominimizeoravoidnoisepickup.AddingRC networksbetween sense terminalsand VOUT terminalstofilternoiseisnotrecommended because thesenetworkscan cause the regulatorstooscillate. Copyright© 2000–2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11

TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 SLVS286E –JUNE 2000–REVISED DECEMBER 2009 www.ti.com FB1 and FB2 FB1 and FB2 are inputterminalsused foradjustable-outputdevicesand must be connectedto the external feedbackresistordivider.FB1 and FB2 connectionsshouldbe as shortas possible.Itisessentialtoroutethem in such a way as to minimizeor avoidnoisepickup.Adding RC networksbetween FB terminalsand VOUT terminalstofilternoiseisnotrecommended because thesenetworkscan cause theregulatorstooscillate. RESET Indicator The TPS702xx featuresa RESET (SVS, POR, orpower on reset).RESET can be used todrivepower on reset circuitryor a low-batteryindicator.RESET isan activelow,open drainoutputthatindicatesthe statusof the manual resetpin(MR). When MR isina highimpedance state,RESET goes toa highimpedance stateaftera 120 ms delay.To monitorVOUT1 ,thePG1 outputpincan be connectedtoMR. To monitorVOUT2 ,thePG2 output pincan be connectedtoMR. The open drainoutputoftheRESET terminalrequiresa pull-upresistor.IfRESET isnotused,itcan be leftfloating. VIN1 and VIN2 VIN1 and VIN2 areinputstoeach regulator.Internalbiasvoltagesarepowered by VIN1. VOUT1 and VOUT2 VOUT1 and VOUT2 areoutputterminalsofeach regulator.

12 SubmitDocumentationFeedback Copyright© 2000–2009,Texas InstrumentsIncorporated

OI Output□Current (A)/c45 /c45 3.299 3.298 3.296 3.295 0 0.1 0.2 0.3 3.301 3.302 3.303 0.4 0.5 3.300 3.297 V Output□Voltage (V) /c45 /c45 O VIN1 =□4.3□V TJ =□+25/c176 C VOUT1 I Output□Current (A)/c45 /c45 V Output□Voltage (V)O /c45 /c45 1.799 1.797 1.796 1.795 0 0.05 0.1 0.15 1.800 1.801 1.802 0.2 0.25 1.798 VIN2 =□2.8□V VOUT2 O TJ =□+25/c176 C TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 www.ti.com SLVS286E –JUNE 2000–REVISED DECEMBER 2009 TYPICAL CHARACTERISTICS TableofGraphs FIGURE vs Outputcurrent Figure1 toFigure3 VO Outputvoltage vs Junctiontemperature Figure4 toFigure5 Ground current vs Junctiontemperature Figure6 PSRR Power-supplyrejectionratio vs Frequency Figure7 toFigure10 Outputspectralnoisedensity vs Frequency Figure11 toFigure14 ZO Outputimpedance vs Frequency Figure15 toFigure18 vs Temperature Figure19 and Figure20 Dropoutvoltage vs Inputvoltage Figure21 and Figure22 Load transientresponse Figure23 and Figure24 Linetransientresponse(VOUT1 ) Figure25 Linetransientresponse(VOUT2 ) Figure26 VO Outputvoltage vs Time (start-up) Figure27 and Figure28 Equivalentseriesresistance(ESR) vs Outputcurrent Figure30 toFigure33 TPS70251 TPS70251 OUTPUT VOLTAGE OUTPUT VOLTAGE vs vs OUTPUT CURRENT OUTPUT CURRENT Figure1. Figure2. Copyright© 2000–2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13

1.198 1.197 1.196 1.195 0 0.05 0.1 0.15 1.199 1.200 1.201 0.2 0.25 VIN2 =□2.7□V TJ =□+25/c176 C VOUT2 OI Output□Current (A)/c45 /c45 V Output□Voltage (V) /c45 /c45 O TJ Junction□T/c45 emperature /c45 /c176 CTJ /c176 C 3.23 3.25 3.27 3.29 3.31 3.33 3.35 /c45 40 /c45 25 /c45 10 5 20 35 50 65 80 95 110 125 VIN1 =□4.3□V VOUT1 IO =□500□mA IO =□1□mA V Output□Voltage (V) /c45 /c45 O 1.73 1.75 1.77 1.79 1.81 1.83 /c45 40 /c45 25 /c45 10 5 20 35 50 65 80 95 110 125 VIN2 =□2.8□V VOUT2 1.85 IO =□1□mA IO =□250□mA TJ Junction□T/c45 emperature C/c45 /c176 V Output□Voltage (V) /c45 /c45 O TJ Junction□T/c45 emperature C/c45 /c176 150 160 170 180 /c45 40 /c45 25 /c45 10 5 20 35 50 65 80 95 110 125 190 200 210 IOUT1 =□1□mA IOUT2 =□1□mA Regulator□1□and□Regulator□2 IOUT1 =□500□mA IOUT2 =□250□mA /c176 Ground□Current A /c45 /c109 TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 SLVS286E –JUNE 2000–REVISED DECEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) TPS70245 TPS70251 OUTPUT VOLTAGE OUTPUT VOLTAGE vs vs OUTPUT CURRENT JUNCTION TEMPERATURE Figure3. Figure4. TPS70251 OUTPUT VOLTAGE GROUND CURRENT vs vs JUNCTION TEMPERATURE JUNCTION TEMPERATURE Figure5. Figure6.

14 SubmitDocumentationFeedback Copyright© 2000–2009,Texas InstrumentsIncorporated

IO =□10□mA CO =□22 /c109 F VOUT1 /c45 60 /c45 80 /c45 90 10 100 1□k 10□k /c45 40 /c45 20 /c45 10 100□k 1 M /c45 30 /c45 50 /c45 70 PSRR /c45 Power□Supply□Rejection□Ratio /c45 dB f /c45 Frequency /c45 Hz /c45 40 /c45 60 /c45 70 /c45 90 10 100 1□k 10□k /c45 20 100□k 1 M /c45 10 /c45 30 /c45 50 /c45 80 IO =□500□mA CO =□22 /c109 F VOUT1 PSRR Power□Supply□Rejection□Ratio /c45 /c45 dB f Frequency/c45 /c45 Hz /c45 60 /c45 80 /c45 90 10 100 1□k 10□k /c45 40 /c45 20 /c45 10 100□k 1 M /c45 30 /c45 50 /c45 70 IO =□10□mA CO =□22 /c109 F VOUT2 PSRR Power□Supply□Rejection□Ratio /c45 /c45 dB f Frequency/c45 /c45 Hz /c45 40 /c45 60 /c45 70 10 100 1□k 10□k /c45 20 100□k 1 M /c45 10 /c45 30 /c45 50 IO =□250□mA CO =□22 /c109 F VOUT2 PSRR /c45 Power□Supply□Rejection□Ratio /c45 dB f /c45 Frequency - Hz TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 www.ti.com SLVS286E –JUNE 2000–REVISED DECEMBER 2009 TYPICAL CHARACTERISTICS (continued) TPS70251 TPS70251 POWER-SUPPLY REJECTION RATIO POWER-SUPPLY REJECTION RATIO vs vs FREQUENCY FREQUENCY Figure7. Figure8. TPS70251 TPS70251 POWER-SUPPLY REJECTION RATIO POWER-SUPPLY REJECTION RATIO vs vs FREQUENCY FREQUENCY Figure9. Figure10. Copyright© 2000–2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15

0.01 0.1 100 1□k 10□k 100□k f /c45 Frequency /c45 Hz VIN1 =□4.3□V VOUT1 =□3.3□V IO =□10□mA Output□Spectral□Noise□Density V/ /c45 /c109 /c214 Hz 0.01 0.1 100 1□k 10□k 100□k VIN1 =□4.3□V VOUT1 =□3.3□V IO =□500□mA f /c45 Frequency /c45 Hz Output□Spectral□Noise□Density V/ /c45 /c109 /c214 Hz 0.01 0.1 100 1□k 10□k 100□k VIN2 =□2.8□V VOUT2 =□1.8□V IO =□250□mA f /c45 Frequency /c45 Hz Output□Spectral□Noise□Density V/ /c45 /c109 /c214 Hz 0.01 0.1 100 1□k 10□k 100□k VIN2 =□2.8□V VOUT2 =□1.8□V IO =□10□mA f /c45 Frequency /c45 Hz Output□Spectral□Noise□Density V/ /c45 /c109 /c214 Hz TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 SLVS286E –JUNE 2000–REVISED DECEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) OUTPUT SPECTRAL NOISE DENSITY OUTPUT SPECTRAL NOISE DENSITY vs vs FREQUENCY FREQUENCY Figure11. Figure12. OUTPUT SPECTRAL NOISE DENSITY OUTPUT SPECTRAL NOISE DENSITY vs vs FREQUENCY FREQUENCY Figure13. Figure14.

16 SubmitDocumentationFeedback Copyright© 2000–2009,Texas InstrumentsIncorporated

CO =□33 /c109 F IO =□500□mA VOUT1 =□3.3□V TJ =□+25/c176 C 10 100 1□k 10□k 100 100□k 1 M 10□M 0.1 0.01 f /c45 Frequency /c45 Hz Z /c45 O Output□Impednace /c45 /c87 CO =□33 /c109 F IO =□10□mA VOUT1 =□3.3□V 10 100 1□k 10□k 100 100□k 1 M 10□M 0.1 0.01 TJ =□+25/c176 C f /c45 Frequency /c45 Hz Z /c45 O Output□Impednace /c45 /c87 CO =□33 /c109 F IO =□250□mA VOUT2 =□1.8□V 10 100 1□k 10□k 100 100□k 1 M 10□M 0.1 0.01 TJ =□+25/c176 C f /c45 Frequency /c45 Hz Z /c45 O Output□Impednace /c45 /c87 CO =□33 /c109 F IO =□10□mA VOUT2 =□1.8□V 10 100 1□k 10□k 100 100□k 1 M 10□M 0.1 0.01 TJ =□+25/c176 C f /c45 Frequency /c45 Hz Z /c45 O Output□Impednace /c45 /c87 TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 www.ti.com SLVS286E –JUNE 2000–REVISED DECEMBER 2009 TYPICAL CHARACTERISTICS (continued) OUTPUT IMPEDANCE OUTPUT IMPEDANCE vs vs FREQUENCY FREQUENCY Figure15. Figure16. OUTPUT IMPEDANCE OUTPUT IMPEDANCE vs vs FREQUENCY FREQUENCY Figure17. Figure18. Copyright© 2000–2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 17

CO =□33 /c109 F VIN1 =□3.2□V 95 110 125 IO =□500□mA T T emperature/c45 /c45 /c176 C Dropout□Voltage mV /c45 /c45 40 /c45 25 /c45 10 5 20 35 50 65 80 95 110 125 CO =□33 /c109 F VIN1 =□3.2□V IO =□10□mA IO =□0□mA T T emperature/c45 /c45 /c176 C Dropout□Voltage mV /c45 100 150 200 250 2.5 3 3.5 4 4.5 5 5.5 IO =□500□mA VOUT1 300 TJ =□+125/c176 C TJ =□+25/c176 C TJ= /c45 40/c176 C V Input□VoltageI /c45 /c45 V Dropout□Voltage mV /c45 100 200 300 400 500 2.5 3 3.5 4 4.5 5 5.5 IO =□250□mA VOUT2 TJ =□+125/c176 C TJ =□+25/c176 C TJ = /c45 40/c176 C V Input□VoltageI /c45 /c45 V Dropout□Voltage mV /c45 TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 SLVS286E –JUNE 2000–REVISED DECEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) DROPOUT VOLTAGE DROPOUT VOLTAGE vs vs TEMPERATURE TEMPERATURE Figure19. Figure20. TPS70202 TPS70202 DROPOUT VOLTAGE DROPOUT VOLTAGE vs vs INPUT VOLTAGE INPUT VOLTAGE Figure21. Figure22.

18 SubmitDocumentationFeedback Copyright© 2000–2009,Texas InstrumentsIncorporated

CO =□33 /c109 F TJ =□+25/c176 C VOUT1 =□3.3□V /c45 20 500 t Time/c45 /c45 ms I Output□CurrentO /c45 /c45 mA /c68VO Output□Voltage mV /c45 /c45 Change□in 250 /c45 20 CO =□33 /c109 F TJ =□+25/c176 C VOUT2 =□1.8□V t Time/c45 /c45 ms I Output□CurrentO /c45 /c45 mA /c68VO Output□Voltage mV /c45 /c45 Change□in 0 20 40 60 80 100 120 5.3 4.3 140 160 180 200 TJ =□+25/c176 C IO =□500□mA CO =□33 /c109 F VOUT1 /c45 50 t Time/c45 /c45 /c109 s V Input□VoltageI/c45 /c45 V /c68VO Output□Voltage mV /c45 /c45 Change□in 0 20 40 60 80 100 120 2.8 140 160 180 200 TJ =□+25/c176 C IO =□250□mA CO =□33 /c109 F VOUT2 3.8 t Time/c45 /c45 /c109 s V Input□VoltageI/c45 /c45 V /c68VO Output□Voltage mV /c45 /c45 Change□in TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 www.ti.com SLVS286E –JUNE 2000–REVISED DECEMBER 2009 TYPICAL CHARACTERISTICS (continued) LOAD TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE Figure23. Figure24. LINE TRANSIENT RESPONSE LINE TRANSIENT RESPONSE Figure25. Figure26. Copyright© 2000–2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 19

VO =□3.3□V CO =□33 /c109 F IO =□500□mA VOUT2 =□Standby 0 2.0 t Time/c45 /c45 /c109 s V Output□VoltageOUT1 /c45 Enable□Voltage□(EN1) V /c45 VO =□1.5□V CO =□33 /c109 F IO =□250□mA VOUT1 =□Standby 0 2.0 t Time/c45 /c45 /c109 s V Output□VoltageOUT2 /c45 Enable□Voltage□(EN2) V /c45 IN EN OUT GND ESR VIN COUT T o□Load RL TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 SLVS286E –JUNE 2000–REVISED DECEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS (continued) OUTPUT VOLTAGE AND ENABLE VOLTAGE OUTPUT VOLTAGE AND ENABLE VOLTAGE vs vs TIME (START-UP) TIME (START-UP) Figure27. Figure28. Figure29.TestCircuitforTypicalRegions ofStability

20 SubmitDocumentationFeedback Copyright© 2000–2009,Texas InstrumentsIncorporated

REGION□OF□INSTABILITY 0.1 250□m/c87 VO =□3.3□V CO =□6.8 /c109 F TJ =□25/c176 C REGION□OF□INSTABILITY I Output□CurrentO /c45 /c45 mA ESR Equivalent□Series□Resistance /c45 /c45 /c87 0.1 0.01 0 50 100 150 200 250 VO =□3.3□V CO =□10 /c109 F TJ =□25/c176 C REGION□OF□INSTABILITY REGION□OF□INSTABILITY 50□m/c87 I Output□CurrentO /c45 /c45 mA ESR Equivalent□Series□Resistance /c45 /c45 /c87 0.1 0.01 0 25 50 75 100 125 REGION□OF□INSTABILITY 50□m/c87 REGION□OF□INSTABILITY VO =□1.8□V CO =□10 /c109 F TJ =□25/c176 C I Output□CurrentO /c45 /c45 mA ESR Equivalent□Series□Resistance /c45 /c45 /c87 0 25 50 75 100 125 REGION□OF□INSTABILITY 0.1 VO =□1.8□V CO =□6.8 /c109 F TJ =□25/c176 C REGION□OF□INSTABILITY 250□m/c87 I Output□CurrentO /c45 /c45 mA ESR Equivalent□Series□Resistance /c45 /c45 /c87 TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 www.ti.com SLVS286E –JUNE 2000–REVISED DECEMBER 2009 TYPICAL CHARACTERISTICS (continued) TYPICAL REGION OF STABILITY TYPICAL REGION OF STABILITY EQUIVALENT SERIES RESISTANCE (1) EQUIVALENT SERIES RESISTANCE (1) vs vs OUTPUT CURRENT OUTPUT CURRENT Figure30. Figure31. TYPICAL REGION OF STABILITY TYPICAL REGION OF STABILITY EQUIVALENT SERIES RESISTANCE (1) EQUIVALENT SERIES RESISTANCE (1) vs vs OUTPUT CURRENT OUTPUT CURRENT Figure32. Figure33. (1)Equivalentseriesresistance(ESR) referstothetotalseriesresistance,includingtheESR ofthecapacitor,any seriesresistanceadded externally,and PWB traceresistancetoC O . Copyright© 2000–2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 21

(Fixed□Output□Option) VIN VOUT1 PG2

0.1 F/c109

10 F/c109

2□V <0.7□V EN2 250□k/c87 250□k/c87 >2□V <0.7□V 95% 95% EN2 VOUT2 VOUT1 PG2 PG1 EN1 MR (PG1□tied□to )MR 120□ms RESET NOTES:□A.□t :□Time□at□which□V is□greater□than□V and is□logic□high. B.□The□timing□diagram□is□not□drawn□to□scale.

1 IN UVLO MR

TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 SLVS286E –JUNE 2000–REVISED DECEMBER 2009 www.ti.com

APPLICATION INFORMATION

Sequencing Timing Diagrams This sectionprovidesa number of timingdiagrams showing how this device functionsin different configurations. same fixedinputvoltagegreaterthan VUVLO . PG2 is tiedtoMR. EN1 and EN2 are initiallyhigh; therefore,both regulatorsareoff,and PG1 and PG2 (tiedtoMR) are atlogiclow.SinceMR isatlogiclow,RESET isalso at logiclow.When EN1 istakento logiclow,VOUT1 turnson.Later,when EN2 istakentologiclow,VOUT2 turnson. When VOUT1 reaches95% of itsregulated outputvoltage,PG1 goes tologichigh.When VOUT2 reaches 95% of itsregulatedoutputvoltage,PG2 (tiedtoMR) goes tologichigh.When VIN1 isgreater than VUVLO and M R (tiedto PG2) isat logichigh, RESET ispulledto logichighaftera 120ms delay. When EN1 and EN2 are returnedtologichigh,both devicespower down and both PG1, PG2 (tiedto MR2), and RESET returntologiclow. Figure34. Timing When VOUT1 IsEnabled BeforeVOUT2

22 SubmitDocumentationFeedback Copyright© 2000–2009,Texas InstrumentsIncorporated

0.1 /c109F EN1 2□V 0.7□V TPS702xxPWP (Fixed□Output□Option) >2□V <0.7□V EN2 250□k/c87 250□k/c87 250□k/c87 >2□V <0.7□V 95% 95% EN2 VOUT2 VOUT1 PG2 PG1 EN1 MR RESET NOTES:□A.□t :□Time□at□which□V is□greater□than□V and is□logic□high. B.□The□timing□diagram□is□not□drawn□to□scale. 120□ms TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 www.ti.com SLVS286E –JUNE 2000–REVISED DECEMBER 2009 same fixedinputvoltagegreaterthan VUVLO . MR is initiallylogichighbutiseventuallytoggled. EN1 and EN2 are initiallyhigh; therefore,both regulatorsareoff,and PG1 and PG2 areatlogiclow. Since VIN1 isgreaterthan VUVLO and MR isat logic high,RESET isalsoatlogichigh.When EN2 istaken tologiclow,VOUT2 turnson.Later,when EN1 istaken to logiclow,VOUT1 turnson. When VOUT2 reaches 95% of itsregulatedoutputvoltage,PG2 goes to logichigh.When VOUT1 reaches95% ofitsregulated outputvoltage,PG1 goes tologichigh.When MR is taken to logiclow,RESET istaken low.When MR returnsto logichigh,RESET returnsto logichigh aftera 120ms delay. Figure35. Timing When MR isToggled Copyright© 2000–2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 23

0.1 F/c109 10 F/c109

(Fixed□Output□Option) >2□V <0.7□V EN2 250□k/c87 250□k/c87 >2□V <0.7□V EN2 VOUT2 VOUT1 PG2 PG1 RESET EN1 95% 95% MR (PG1□tied□to )MR FAULT□ON□VOUT1 120□ms NOTES:□A.□t :□Time□at□which□V is□greater□than□V and is□logic□high. B.□The□timing□diagram□is□not□drawn□to□scale. TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 SLVS286E –JUNE 2000–REVISED DECEMBER 2009 www.ti.com same fixedinputvoltagegreaterthan VUVLO . PG1 is tiedtoMR. EN1 and EN2 are initiallyhigh; therefore,both regulatorsareoff,and PG1 (tiedtoMR) and PG2 are atlogiclow.SinceMR isatlogiclow,RESET isalso at logiclow.When EN2 istakento logiclow,VOUT2 turnson.Later,when EN1 istakentologiclow,VOUT1 turnson. When VOUT2 reaches95% of itsregulated outputvoltage,PG2 goes tologichigh.When VOUT1 reaches 95% of itsregulatedoutputvoltage,PG1 goes to logichigh.When VIN1 isgreaterthan VUVLO and MR (tiedto PG2) is at logichigh,RESET is pulledtologichighaftera 120ms delay.When a fault on VOUT1 causes ittofallbelow 95% ofitsregulated outputvoltage,PG1 (tiedto MR) goes to logiclow. Since MR is logiclow,RESET goes to logiclow. VOUT2 isunaffected. Figure36. Timing When VOUT1 FaultsOut

24 SubmitDocumentationFeedback Copyright© 2000–2009,Texas InstrumentsIncorporated

TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 www.ti.com SLVS286E –JUNE 2000–REVISED DECEMBER 2009 For a typicalapplication,an inputbypass capacitor(0.1μF to 1μF) isrecommended. Thiscapacitorfiltersany high-frequencynoisegeneratedintheline.For fasttransientconditionswhere droopattheinputoftheLDO may occurbecause ofhighinrushcurrent,itisrecommended toplacea largercapacitorattheinputas well.The size of thiscapacitordepends on the outputcurrentand responsetimeof the main power supply,as wellas the distancetotheVI pinsoftheLDO. Output Capacitor As withmost LDO regulators,theTPS702xx requiresan outputcapacitorconnectedbetween OUT and GND to stabilizetheinternalcontrolloop.The minimum recommended capacitancevaluesare10μF ceramiccapacitors withan ESR (equivalentseriesresistance)between 50m Ω and 2.5Ω or 6.8μF tantalumcapacitorswithESR between 250m Ω and 4Ω.Solidtantalumelectrolytic,aluminum electrolytic,and multilayerceramiccapacitorswith capacitancevaluesgreaterthan 10μF are allsuitable,providedtheymeet the requirementsdescribedabove. Largercapacitorsprovidea widerrange ofstabilityand betterloadtransientresponse.Table1 givesa partial listingofsurface-mountcapacitorssuitableforuse withtheTPS702xx forfasttransientresponseapplications. Thisinformation,alongwiththeESR graphs,isincludedtoassistinselectionofsuitablecapacitanceforuser applications.When necessarytoachievelow heightrequirementsalongwithhighoutputcurrentand/orhighload capacitance,severalhigherESR capacitorscan be used inparalleltomeet theguidelinesabove. Table1.PartialListingofTPS702xx-Compatible Surface-MountCapacitors VALUE MANUFACTURER MAXIMUM ESR MFR PART NO. 22μF Kemet 345m Ω 7495C226K0010AS 33μF Sanyo 100m Ω 10TPA33M 47μF Sanyo 100m Ω 6TPA47M 68μF Sanyo 45m Ω 10TPC68M ESR and TransientResponse LDOs typicallyrequirean externaloutputcapacitorforstability.Infasttransientresponseapplications,capacitors areused tosupporttheloadcurrentwhiletheLDO amplifierisresponding.Inmost applications,one capacitoris used tosupportbothfunctions. Besidesitscapacitance,everycapacitoralsocontainsparasiticimpedances.These parasiticimpedances are resistiveas wellas inductive.The resistiveimpedance iscalledequivalentseriesresistance(ESR), and the inductiveimpedance iscalledequivalentseriesinductance(ESL).The equivalentschematicdiagram of any capacitorcan thereforebe drawn as shown inFigure37. Figure37. ESR and ESL In most cases one can neglectthe effectof inductiveimpedance ESL. Therefore,the followingapplication focusesmainlyon theparasiticresistanceESR. Copyright© 2000–2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 25

TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 SLVS286E –JUNE 2000–REVISED DECEMBER 2009 www.ti.com Figure38 shows theoutputcapacitorand itsparasiticimpedancesina typicalLDO outputstage. Figure38. LDO Output Stage withParasiticResistancesESR Insteadystate(dcstatecondition),theloadcurrentissuppliedby theLDO (solidarrow)and thevoltageacross thecapacitoristhesame as theoutputvoltage(V(CO) = VOUT ).Thisconditionmeans no currentisflowingintothe C OUT branch.IfIOUT suddenlyincreases(atransientcondition),thefollowingresultsoccur:

• The LDO isnot able to supplythe sudden currentneed because of itsresponse time (t1 in Figure39). Therefore,capacitorC OUT providesthecurrentforthenew loadcondition(dashedarrow).C OUT now actslike a batterywithan internalresistance,ESR. Depending on thecurrentdemand attheoutput,a voltagedrop occursatR ESR .Thisvoltageisshown as VESR inFigure38.
• When C OUT isconductingcurrenttotheload,initialvoltageattheloadwillbe VOUT = V(CO) – VESR .As a result ofthedischargeofC OUT ,theoutputvoltageVOUT dropscontinuouslyuntiltheresponsetimet1 oftheLDO is reachedand theLDO resumes supplyingtheload.From thispoint,theoutputvoltagestartsrisingagainuntil itreachestheregulatedvoltage.Thisperiodisshown as t2 inFigure39.

26 SubmitDocumentationFeedback Copyright© 2000–2009,Texas InstrumentsIncorporated

ESR□1 ESR□2 ESR□3 IOUT VOUT t1 t2 R1□= V V OUT REF /c45 1 /c180 R2( ( TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 www.ti.com SLVS286E –JUNE 2000–REVISED DECEMBER 2009 Figure39. CorrelationofDifferentESRs and TheirInfluenceon theRegulationofVO ata Load Step from Low-to-HighOutput Current Figure39 alsoshows theimpactofdifferentESRs on theoutputvoltage.The leftbracketsshow differentlevels ofESRs where number 1 displaysthelowestand number 3 displaysthehighestESR. From above,thefollowingconclusionscan be drawn:

• The highertheESR, thelargerthedroopatthebeginningoftheloadtransient.
• The smallertheoutputcapacitor,thefasterthedischargetimeand thegreaterthevoltagedroop duringthe LDO responseperiod. Conclusion To minimizethetransientoutputdroop,capacitorsmust have a low ESR and be largeenough tosupportthe minimum outputvoltagerequirement. Programming theTPS70202 AdjustableLDO Regulator The outputvoltageof the TPS70202 adjustableregulatorsisprogrammed usingexternalresistordividersas shown inFigure40. ResistorsR1 and R2 shouldbe chosen forapproximatelya 50μA dividercurrent.Lower valueresistorscan be used,but offerno inherentadvantageand waste more power.Highervaluesshouldbe avoidedas leakage currentsat the sense terminalincreasethe outputvoltageerror.The recommended designprocedureisto choose R2 = 30.1kΩ tosetthedividercurrentatapproximately50μA,and thencalculateR1 usingEquation1: (1) where:
• VREF = 1.224Vtyp(theinternalreferencevoltage) Copyright© 2000–2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 27

OUTPUT□VOLTAGE PROGRAMMING□GUIDE VO VI OUT FB GND EN IN <0.7□V >2.0 V TPS70202 0.1 /c109F OUTPUT VOLTAGE R1 R2 2.5□V 3.3□V 3.6□V UNIT 31.6 51.1 59.0 30.1 30.1 30.1 k/c87 k/c87 k/c87 P D(max) /C0043TJ max /C0042TA R /C0113JA P D /C0043/C0466V I/C0042V O /C0467/C0032IO TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 SLVS286E –JUNE 2000–REVISED DECEMBER 2009 www.ti.com Figure40. TPS70202 AdjustableLDO RegulatorProgramming RegulatorProtection Both TPS702xx PMOS-pass transistorshave built-inback diodesthatconductreversecurrentswhen theinput voltagedropsbelow theoutputvoltage(forexample,duringpower-down).Currentisconductedfromtheoutput totheinputand isnotinternallylimited.When extendedreversevoltageisanticipated,externallimitingmay be appropriate. The TPS702xx also featuresinternalcurrentlimitingand thermalprotection.During normal operation,the TPS702xx regulator1 limitsoutputcurrentto approximately1.6A (typ)and regulator2 limitsoutputcurrentto approximately750mA (typ).When currentlimitingengages, the outputvoltagescalesback linearlyuntilthe overcurrentconditionends.While currentlimitingisdesignedto preventgrossdevicefailure,care shouldbe taken not to exceed the power dissipationratingsof the package.Ifthe temperatureof the deviceexceeds +150°C (typ),thermal-protectioncircuitryshuts itdown. Once the devicehas cooled below +130°C (typ), regulatoroperationresumes. Power Dissipationand JunctionTemperature Specifiedregulatoroperationisassuredtoa junctiontemperatureof+125°C; themaximum junctiontemperature shouldbe restrictedto+125°C undernormaloperatingconditions.Thisrestrictionlimitsthepower dissipationthe regulatorcan handleinany givenapplication.To ensure the junctiontemperatureiswithinacceptablelimits, calculatethemaximum allowabledissipation,PD(max),and theactualdissipation,PD ,whichmust be lessthanor equaltoPD(max). The maximum-power-dissipationlimitisdeterminedusingEquation2: (2) where:

• TJmax isthemaximum allowablejunctiontemperature
• R θJA isthethermalresistancejunction-to-ambientforthepackage;thatis,32.6°C/W forthe20-terminalPWP withno airflow
• TA istheambienttemperature The regulatordissipationiscalculatedusingEquation3: (3) Power dissipationresultingfromquiescentcurrentisnegligible.Excessivepower dissipationtriggersthethermal protectioncircuit.

28 SubmitDocumentationFeedback Copyright© 2000–2009,Texas InstrumentsIncorporated

TPS70245,TPS70248 TPS70251,TPS70258 TPS70202 www.ti.com SLVS286E –JUNE 2000–REVISED DECEMBER 2009

REVISION HISTORY

NOTE: Page numbers forpreviousrevisionsmay differfrompage numbers inthecurrentversion. Changes from RevisionD (December, 2007)toRevisionE Page Copyright© 2000–2009,Texas InstrumentsIncorporated SubmitDocumentationFeedback 29

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) TPS70202PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS70202PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS70202PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS70202PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS70245PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS70245PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS70245PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS70245PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS70248PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS70248PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS70248PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS70248PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS70251PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS70251PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS70251PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS70251PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS70258PWP ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS70258PWPG4 ACTIVE HTSSOP PWP 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS70258PWPR ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS70258PWPRG4 ACTIVE HTSSOP PWP 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. PACKAGE OPTION ADDENDUM www.ti.com 3-Dec-2009 Addendum-Page 1

TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 3-Dec-2009 Addendum-Page 2

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS70202PWPR HTSSOP PWP 20 2000 367.0 367.0 38.0 TPS70245PWPR HTSSOP PWP 20 2000 367.0 367.0 38.0 TPS70248PWPR HTSSOP PWP 20 2000 367.0 367.0 38.0 TPS70251PWPR HTSSOP PWP 20 2000 367.0 367.0 38.0 TPS70258PWPR HTSSOP PWP 20 2000 367.0 367.0 38.0 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 Pack Materials-Page 2

Texas InstrumentsIncorporatedand itssubsidiaries(TI)reservetherighttomake corrections,enhancements,improvementsand other changes toitssemiconductorproductsand servicesperJESD46C and todiscontinueany productorserviceperJESD48B. Buyersshould obtainthelatestrelevantinformationbeforeplacingordersand shouldverifythatsuch informationiscurrentand complete.All semiconductorproducts(alsoreferredtohereinas “components”)aresoldsubjecttoTI’s termsand conditionsofsalesuppliedatthetime oforderacknowledgment. TIwarrantsperformanceofitscomponents tothespecificationsapplicableatthetimeofsale,inaccordancewiththewarrantyinTI’s terms and conditionsofsaleofsemiconductorproducts.Testingand otherqualitycontroltechniquesareused totheextentTIdeems necessary tosupportthiswarranty.Exceptwhere mandated by applicablelaw,testingofallparametersofeach component isnotnecessarily performed. TIassumes no liabilityforapplicationsassistanceorthedesignofBuyers’products.Buyersareresponsiblefortheirproductsand applicationsusingTIcomponents.To minimizetherisksassociatedwithBuyers’productsand applications,Buyersshouldprovide adequatedesignand operatingsafeguards. TIdoes notwarrantorrepresentthatany license,eitherexpressorimplied,isgrantedunderany patentright,copyright,mask work right,or otherintellectualpropertyrightrelatingtoany combination,machine,orprocessinwhichTIcomponents orservicesareused.Information publishedby TIregardingthird-partyproductsorservicesdoes notconstitutea licensetouse such productsorservicesora warrantyor endorsementthereof.Use ofsuch informationmay requirea licensefroma thirdpartyunderthepatentsorotherintellectualpropertyofthe thirdparty,ora licensefromTIunderthepatentsorotherintellectualpropertyofTI. ReproductionofsignificantportionsofTIinformationinTIdatabooks ordatasheetsispermissibleonlyifreproductioniswithoutalteration and isaccompaniedby allassociatedwarranties,conditions,limitations,and notices.TIisnotresponsibleorliableforsuch altered documentation.Informationofthirdpartiesmay be subjecttoadditionalrestrictions. ResaleofTIcomponents orserviceswithstatementsdifferentfromorbeyond theparametersstatedby TIforthatcomponent orservice voidsallexpressand any impliedwarrantiesfortheassociatedTIcomponent orserviceand isan unfairand deceptivebusinesspractice. TIisnotresponsibleorliableforany such statements. Buyeracknowledgesand agreesthatitissolelyresponsibleforcompliancewithalllegal,regulatoryand safety-relatedrequirements concerningitsproducts,and any use ofTIcomponents initsapplications,notwithstandingany applications-relatedinformationorsupport thatmay be providedby TI.Buyerrepresentsand agreesthatithas allthenecessaryexpertisetocreateand implementsafeguardswhich anticipatedangerousconsequencesoffailures,monitorfailuresand theirconsequences,lessenthelikelihoodoffailuresthatmightcause harm and takeappropriateremedialactions.BuyerwillfullyindemnifyTIand itsrepresentativesagainstany damages arisingoutoftheuse ofany TIcomponents insafety-criticalapplications. Insome cases,TIcomponents may be promotedspecificallytofacilitatesafety-relatedapplications.Withsuch components,TI’s goalisto helpenablecustomerstodesignand createtheirown end-productsolutionsthatmeet applicablefunctionalsafetystandardsand requirements.Nonetheless,such components aresubjecttotheseterms. No TIcomponents areauthorizedforuse inFDA ClassIII(orsimilarlife-criticalmedicalequipment)unlessauthorizedofficersoftheparties have executeda specialagreementspecificallygoverningsuch use. OnlythoseTIcomponents whichTIhas specificallydesignatedas militarygradeor“enhanced plastic”aredesignedand intendedforuse in military/aerospaceapplicationsorenvironments.Buyeracknowledgesand agreesthatany militaryoraerospaceuse ofTIcomponents whichhave not been so designatedissolelyattheBuyer's risk,and thatBuyerissolelyresponsibleforcompliancewithalllegaland regulatoryrequirementsinconnectionwithsuch use. TIhas specificallydesignatedcertaincomponents whichmeet ISO/TS16949 requirements,mainlyforautomotiveuse.Components which have notbeen so designatedareneitherdesignednorintendedforautomotiveuse;and TIwillnotbe responsibleforany failureofsuch components tomeet such requirements. Products Applications Audio www.ti.com/audio Automotiveand Transportationwww.ti.com/automotive Amplifiers amplifier.ti.com Communicationsand Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP ® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energyand Lighting www.ti.com/energy Clocksand Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space,Avionicsand Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Videoand Imaging www.ti.com/video RFID www.ti-rfid.com OMAP MobileProcessors www.ti.com/omap TIE2E Community e2e.ti.com WirelessConnectivity www.ti.com/wirelessconnectivity MailingAddress:Texas Instruments,PostOfficeBox 655303,Dallas,Texas 75265 Copyright© 2012,Texas InstrumentsIncorporated