TPS60100 TI | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 22

Technical content

REGULATED 3.3 V 200-mA LOW-NOISE CHARGE PUMP DC/DC CONVERTER SLVS213B – MAY 1999 – REVISED SEPTEMBER 1999 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

features

/C0068Up to 200-mA Output Current /C0068Less Than 5-mVpp Output Voltage Ripple /C0068No Inductors Required/Low EMI /C0068Regulated 3.3-V ±4% Output /C0068Only Four External Components Required /C0068Up to 90% Efficiency /C00681.8-V to 3.6-V Input Voltage Range /C006850-mA Quiescent Supply Current /C00680.05-mA Shutdown Current /C0068Load Isolated in Shutdown /C0068Space-Saving Thermally-Enhanced TSSOP PowerPAD  Package /C0068Evaluation Module Available (TPS60100EVM–131)

applications

Replaces DC/DC Converters With Inductors in – Battery-Powered Applications – Two Battery Cells to 3.3-V Conversion – Portable Instruments – Battery-Powered Microprocessor and DSP Systems – Miniature Equipment – Backup-Battery Boost Converters – PDAs – Laptops – Handheld Instrumentation – Medical Instruments – Cordless Phones

description

The TPS60100 step-up, regulated charge pump generates a 3.3-V ±4% output voltage from a 1.8-V to 3.6-V input voltage (two alkaline, NiCd, or NiMH batteries). Output current is 200 mA from a 2-V input. Only four external capacitors are needed to build a complete low-noise dc/dc converter. The push-pull operating mode of two single-ended charge pumps assures the low output voltage ripple as current is continuously transferred to the output. From a 2-V input, the TPS60100 can start into full load with loads as low as 16 W . The TPS60100 features either constant frequen- cy mode to minimize noise and output voltage ripple or the power-saving pulse-skip mode to extend battery life at light loads. The TPS60100 switching frequency is 300 kHz. The logic shutdown function reduces the supply current to 1-mA (max) and disconnects the load from the input. Special current-control circuitry prevents excessive current from being drawn from the battery during start-up. This dc/dc converter requires no inductors and has low EMI. It is available in the small 20-pin TSSOP PowerPAD package (PWP). Copyright  1999, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments Incorporated. output voltage ripple typical operating circuit Figure 1 3.45 3.25 3.3 3.35 3.4 3.05 3.1 3.15 3.2 501234 6789 t – Time – ms – Output Voltage – VVO SKIP =COM = 3V8 = 0 V VIN = 2.4 V IO = 200 mA C O = 22 mF X5R Ceramic IN IN C1+ C1– ENABLE OUT OUT FB C2+ C2– SYNC SKIP COM 3V8 PGND GND INPUT

1.8 V to

3.6 V C IN 10 mF OUTPUT 3.3 V 200 mA C O 22 mF C 2F 2.2 mF C 1F 2.2 mF OFF/ON TPS60100

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Figure 2. Bottom View of PWP Package, option, add an R suffix to the part number (e.g., TPS60100PWPR). regulator operates in preregulated 3.8-V mode. connected to IN the regulator operates in single-ended mode requiring only one flying capacitor. 0.05 mA when ENABLE is a logic low. Connect ENABLE to IN for normal operation. is on chip to match internal reference voltage of 1.22 V. GND 1, 20 GROUND. Analog ground for internal reference and control circuitry. Connect to PGND through a short trace. Connect both INs through a short trace. capacitor CO . VO = 3.3 V when 3V8 = low and VO = 3.8 V when 3V8 = high. PGND 9–12 PGND power ground. Charge-pump current flows through this pin. Connect all PGNDs together. and noise are minimized in this mode. When SKIP is connect to IN, the device operates in pulse skip mode. Quiescent current is lowest in this mode. in the regulated 3.3-V mode.

REGULATED 3.3 V 200-mA LOW-NOISE CHARGE PUMP DC/DC CONVERTER SLVS213B – MAY 1999 – REVISED SEPTEMBER 1999

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics at CIN = 10 mF, C1F = C2F = 2.2 mF†, CO = 22 mF, TC = –40°C to 85°C, VIN = 2 V, VFB = VO , VENABLE = VIN, VSKIP = VIN or 0 V and VCOM = V3V8 = VSYNC = 0 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIN Input voltage 1.8 3.6 V VIN(UV) Input undervoltage lockout threshold 1.6 1.8 V IO(MAX) Maximum output current 200 mA V Ot t l t

1.8 V < VIN < 2 V, 0 < I O < 100 mA,

VO(Start-Up) = 3.3 V, TC = 25°C 3.17 3.3 3.43 VVO Output voltage 2 V < VIN < 3.3 V, 0 < I O < 200 mA 3.17 3.3 3.43 V VO(RIP) Output voltage ripple IO = 200 mA, V SKIP = 0 V 5‡ mV PP IO(LEAK) Output leakage current VIN = 2.4 V, V ENABLE = 0 V 1 mA IQ Quiescent current VSKIP = VIN = 2.4 V 50 90 mA IQ (no-load input current) SKIP IN VSKIP = 0 V, V IN = 2.4 V 1.5 mA IDD(SDN) Shutdown supply current VIN = 2.4 V, V ENABLE = 0 V 0.05 1 mA fOSC(int) Internal switching frequency VIN = 2.4 V 200 300 400 kHz fOSC(ext) External clock frequency VSYNC = VIN,V IN = 1.8V to 3.6 V 400 600 800 kHz External clock duty cycle VSYNC = VIN,V IN = 1.8V to 3.6 V 20% 80% Efficiency IO = 100 mA 80% VINL Input voltage low, ENABLE, SKIP, COM, 3V8, SYNC VIN = 1.8 V 0.3 × VIN V VINH Input voltage high, ENABLE, SKIP, COM, 3V8, SYNC VIN = 3.6 V 0.7 × VIN V II(LEAK) Input leakage current, ENABLE, SKIP, COM, 3V8, SYNC VENABLE = VSKIP = VCOM = V3V8 = VSYNC = VGND or VIN 0.01 0.1 mA Output load regulation VO = 3.3 V, 1 mA < I O < 200 mA TC = 25°C 0.004 %/mA Output line regulation 2 V < VIN < 3.3 V, V O = 3.3 V, IO = 100 mA, T C = 25°C 0.6 %/V Short circuit current VIN = 2.4 V V O = 0 V, TC = 25°C 125 mA † Use only ceramic capacitors with X5R or X7R dielectric as flying capacitors. ‡ Achieved with CO = 22 mF X5R dielectric ceramic capacitor

REGULATED 3.3 V 200-mA LOW-NOISE CHARGE PUMP DC/DC CONVERTER SLVS213B – MAY 1999 – REVISED SEPTEMBER 1999 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics for preregulated 3.8-V Mode (V(3V8) = V IN), CIN = 10 mF, C 1F = C2F = 2.2 mF†, CO = 22 mF, TC = –40°C to 85°C, VIN = 2.4 V, VFB = VO , VENABLE = VIN, VSKIP = VIN or 0 V and VCOM = VSYNC = 0 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIN Input voltage 2.2 3.6 V IO(MAX) Maximum output current 200 mA VO Output voltage 2.2 V < VIN < 3.6 V, 0 < IO < 200 mA 3.6 3.8 4 V IO(LEAK) Output leakage current VENABLE = 0 V 1 mA IQ Quiescent current VSKIP = VIN 60 mA IQ (no-load input current) VSKIP = 0 V 2 mA IDD(SDN) Shutdown supply current VENABLE = 0 V 0.05 1 mA fOSC Internal switching frequency 200 300 400 kHz Short circuit current VO = 0 V, T C = 25°C 125 mA † Use only ceramic capacitors with X5R or X7R dielectric as flying capacitors.

REGULATED 3.3 V 200-mA LOW-NOISE CHARGE PUMP DC/DC CONVERTER SLVS213B – MAY 1999 – REVISED SEPTEMBER 1999

6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS † Figure 5 0.1 1 10 Efficiency – % EFFICIENCY vs OUTPUT CURRENT (V O = 3.3 V) 100 100 1000 IO – Output Current – mA V(SKIP) = VIN, V(3V8) = 0 V VIN = 1.8 V VIN = 2 V VIN = 2.4 V VIN = 2.7 V Figure 6 11 0 Efficiency – % EFFICIENCY vs OUTPUT CURRENT (V O = 3.3 V) 100 100 1000 IO – Output Current – mA V(SKIP) = 0 V V(3V8) = 0 V VIN = 1.8 V VIN = 2 V VIN = 2.4 V VIN = 2.7 V Figure 7 0.1 1 10 Efficiency – % EFFICIENCY vs OUTPUT CURRENT (V O = 3.8 V) 100 100 1000 IO – Output Current – mA V(SKIP) = VIN V(3V8) = VIN VIN = 3 V VIN = 2.3 V VIN = 2.7 V Figure 8 11 0 Efficiency – % EFFICIENCY vs OUTPUT CURRENT (V O = 3.8 V) 100 100 1000 IO – Output Current – mA V(SKIP) = 0 V V(3V8) = VIN VIN = 3 V VIN = 2.3 V VIN = 2.7 V †T C = 25°C, VCOM = VSYNC = 0 V, CIN = 10 mF, C1F = C2F = 2.2 mF, CO = 22 mF, unless otherwise noted

REGULATED 3.3 V 200-mA LOW-NOISE CHARGE PUMP DC/DC CONVERTER SLVS213B – MAY 1999 – REVISED SEPTEMBER 1999

8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS † Figure 13 3.35 3.2 3.1 1.5 2 2.5 3 – Output Voltage – V 3.4 3.45 OUTPUT VOLTAGE vs INPUT VOLTAGE 3.5 3.5 4 3.3 3.25 3.15 3.05 VIN – Input Voltage – V VO V(SKIP) = VIN or 0 V V(3V8) = 0 V IO = 1 mA to 200 mA Figure 14 3.7 3.4 3.2 1.5 2 2.5 3 – Output Voltage – V 3.8 3.9 OUTPUT VOLTAGE vs INPUT VOLTAGE 3.10 3.5 4 3.6 3.5 3.3 3.1 VIN – Input Voltage – V VO V(SKIP) = VIN or 0 V V(3V8) = VIN IO = 10 mA IO = 100 mA IO = 200 mA Figure 15 3.33 3.32 3.31 3.30 01234 5 3.34 3.35 OUTPUT VOLTAGE vs TIME 3.36 67 8 t – Time – ms V(SKIP) = 0 V V(3V8) = 0 V VIN = 2.4 V IO = 100 mA C O = 22 mF (X5R ceramic) Constant Frequency Mode Less than 5 mVpp – Output Voltage – VVO Figure 16 3.34 3.32 3.3 02 4 6 81 0 1 2 3.36 OUTPUT VOLTAGE vs TIME 3.38 14 16 18 20 t – Time – ms V(SKIP) = VIN V(3V8) = 0 V VIN = 2.4 V IO = 200 mA Pulse-Skip Mode – Output Voltage – VVO †T C = 25°C, VCOM = VSYNC = 0 V, CIN = 10 mF, C1F = C2F = 2.2 mF, CO = 22 mF, unless otherwise noted

REGULATED 3.3 V 200-mA LOW-NOISE CHARGE PUMP DC/DC CONVERTER SLVS213B – MAY 1999 – REVISED SEPTEMBER 1999

10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS † Figure 21 0 2.5 5 Output – dB f – Frequency – MHz FREQUENCY SPECTRUM CONSTANT FREQUENCY MODE ‡ 7.5 10 Vm V(SKIP) = 0 V V(3V8) = 0 V VIN = 2.4 V IO = 100 mA RBW = 300 Hz Figure 22 0 2.5 5 Output – dB 100 f – Frequency – MHz FREQUENCY SPECTRUM PULSE-SKIP MODE ‡ 7.5 10 Vm V(SKIP) = VIN V(3V8) = 0 V VIN = 2.4 V IO = 100 mA RBW = 300 Hz Figure 23 0 2.5 5 f – Frequency – MHz FREQUENCY SPECTRUM CONSTANT FREQUENCY MODE ‡ 7.5 10 Output – dB Vm V(SKIP) = 0 V V(3V8) = 0 V VIN = 2.4 V IO = 10 mA RBW = 300 Hz Figure 24 0 2.5 5 Output – dB f – Frequency – MHz FREQUENCY SPECTRUM PULSE-SKIP MODE ‡ 7.5 10 Vm V(SKIP) = VIN V(3V8) = 0 V VIN = 2.4 V IO = 10 mA RBW = 300 Hz †T C = 25°C, VCOM = VSYNC = 0 V, CIN = 10 mF, C1F = C2F = 2.2 mF, CO = 22 mF, unless otherwise noted ‡Test circuit: TPS60100EVM–131

12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Figure 29. Functional Block Diagram TPS60100 transfer phase. This operation guarantees an almost constant output current which ensures a low output ripple. mode are externally selected via the SKIP input pin.

start-up time and eliminates the need for a Schottky diode between IN and OUT. below 3.3 V. Then the error amplifier reactivates the oscillator and switching of the power stages starts again. deactivates all functions except bandgap reference and error amplifier when the output is higher than 3.3 V.

3.3 V 200 mA

Figure 30. Typical Operating Circuit TPS60100 in Constant Frequency Mode Table 1. Tradeoffs Between Operating Modes NOTE: Even in pulse-skip mode the output ripple amplitude is small if the push-pull operating mode is selected via COM.

14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

In push-pull operating mode (COM = low), the two single-ended charge pumps operate with 180° phase shift. of the TPS60100 in push-pull mode is shown in Figure 1 and Figure 30. Figure 31. Typical Operating Circuit TPS60100 in Single-Ended Operating Mode Table 2. Tradeoffs Between Operating Modes V) regulated mode is shown in Figure 1 and Figure 30. voltage for a low-dropout regulator.

that the output noise contains only well-defined frequency components. Figure 32. Typical Operating Circuit TPS60100 With External Synchronization when the input voltage falls below 1.6 V.

REGULATED 3.3 V 200-mA LOW-NOISE CHARGE PUMP DC/DC CONVERTER SLVS213B – MAY 1999 – REVISED SEPTEMBER 1999

16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

APPLICATION INFORMATION

The TPS60100 requires only four external capacitors as shown in the basic application circuit. Their values are closely linked to the output current capacity, output noise requirements, and mode of operation. Generally, the transfer capacitors (C xF) will be the smallest. The input capacitor improves system efficiency by reducing the input impedance and stabilizes the input current. C IN is recommended to be about two to four times as large as CxF. The output capacitor (CO ) can be selected from 5-times to 50-times larger than CxF, depending on the mode of operation and ripple tolerance†. Tables 3 and 4 show capacitor values recommended for low quiescent-current operation (pulse-skip mode) and for low output voltage ripple operation (constant-frequency mode). A recommendation is given for smallest size. Table 3. Recommended Capacitor Values for Low Quiescent-Current Operation † All measurements are done with additional 1-mF X7R ceramic capacitors at input and output. Table 4. Recommended Capacitor Values for Low Output Voltage Ripple Operation† † All measurements are done with additional 1-mF X7R ceramic capacitors at input and output.

REGULATED 3.3 V 200-mA LOW-NOISE CHARGE PUMP DC/DC CONVERTER SLVS213B – MAY 1999 – REVISED SEPTEMBER 1999 17POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 For the TPS60100, the smallest board space size can be achieved using Sprague’s 595D-series tantalum capacitors for input and output. However, with the trend towards high capacitance ceramic capacitors in smaller size packages, these type of capacitors might become competitive in size soon. Table 5. Recommended Capacitors to their typically lower ESR. Table 6. Recommended Capacitor Manufacturers power-dissipation limits and deratings.

REGULATED 3.3 V 200-mA LOW-NOISE CHARGE PUMP DC/DC CONVERTER SLVS213B – MAY 1999 – REVISED SEPTEMBER 1999

18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

All capacitors should be soldered in close proximity to the IC. A PCB layout proposal for a two-layer board is given in Figure 33. Care has been taken to connect both single-ended charge pumps symmetrically to the load to achive optimized output voltage ripple performance. The proposed layout also provides improved thermal performance as the exposed leadframe is soldered to the PCB. The bottom layer of the PCB is a ground plain only. All ground areas on the PCB should be connected. Connect ground areas on top layer to the bottom layer via through hole connections. GND GND GND ENABLE SYNC C1+ C1– GND GND OUT IN 3V8 COM SKIP C2+ C2– Figure 33. Recommended PCB Layout for TPS60100 (top view) product code TPS60100EVM–131.

REGULATED 3.3 V 200-mA LOW-NOISE CHARGE PUMP DC/DC CONVERTER SLVS213B – MAY 1999 – REVISED SEPTEMBER 1999 19POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 paralleling of two TPS60100 to deliver 400 mA The TPS60100 can be paralleled to yield higher load currents. The circuit of Figure 34 can deliver 400 mA at an output voltage of 3.3 V. It uses two TPS60100 devices in parallel. The devices can share the output capacitors, but each one requires its own transfer capacitors and input capacitor. For best performance, the paralleled devices should operate in the same mode (pulse-skip or constant frequency). IN IN C1+ C1– ENABLE OUT OUT FB C2+ C2– SYNC SKIP COM 3V8 PGND GND INPUT

3.6 V 10 mF

2.2 mF2.2 mF OFF/ON TPS60100 IN IN C1+ C1– ENABLE OUT OUT FB C2+ C2– SYNC SKIP COM 3V8 PGND GND 10 mF OUTPUT 3.3 V 200 mA 47 mF 2.2 mF2.2 mF TPS60100 + Figure 34. Paralleling of Two TPS60100 switching frequency to avoid loop stability issues in case the feedback is taken from the output of the LC filter. to achieve even higher ripple attenuation without affecting stability margin. Figure 35. TPS60100 With LC Filter for Ultra Low Output Ripple Applications

REGULATED 3.3 V 200-mA LOW-NOISE CHARGE PUMP DC/DC CONVERTER SLVS213B – MAY 1999 – REVISED SEPTEMBER 1999

20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

For more application information see: /C0068PowerPAD  Application Report (Literature Number: SLMA002) /C0068TPS6010x/TPS6011x Charge Pump Application Report (Literature Number: SLVA070) device family products Other devices in this family are: PART NUMBER LITERATURE NUMBER DESCRIPTION TPS60101 SLVS214 Regulated 3.3-V, 100-mA Low-Noise Charge Pump DC/DC Converter TPS60110 SLVS215 Regulated 5-V, 300-mA Low-Noise Charge Pump DC/DC Converter TPS60111 SLVS216 Regulated 5-V, 150-mA Low-Noise Charge Pump DC/DC Converter

REGULATED 3.3 V 200-mA LOW-NOISE CHARGE PUMP DC/DC CONVERTER SLVS213B – MAY 1999 – REVISED SEPTEMBER 1999 21POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA PWP (R-PDSO-G) PowerPAD  PLASTIC SMALL-OUTLINE PACKAGE 4073225/E 03/97 0,50 0,75 0,25 0,15 NOM Thermal Pad (See Note D) Gage Plane 2824 7,70 7,90 6,40 6,60 9,60 9,80 6,60 6,20 0,19 4,50 4,30 0,15 A 0,30 1,20 MAX 1614 5,10 4,90 PINS 4,90 5,10 DIM A MIN A MAX 0,05 Seating Plane 0,65 0,10 M0,10 0°–8° 20-PIN SHOWN NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusions. D. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. This pad is electrically and thermally connected to the backside of the die and possibly selected leads. E. Falls within JEDEC MO-153 PowerPAD is a trademark of Texas Instruments Incorporated.

Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright  1999, Texas Instruments Incorporated