TPS3103K33DBVTG4

TPS3103XXX TI | Alldatasheet

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(TOP□VIEW) RESET GND MR VDD PFI TPS3103 DBV□PACKAGE PFO (TOP□VIEW) RSTVDD GND MR VDD SENSE TPS3106 DBV□PACKAGE RSTSENSE (TOP□VIEW) RESET GND MR VDD SENSE TPS3110 DBV□PACKAGE WDI

5 Typical□Application□Circuit

3.3□V 1.6□V GND MR TPS3103xxx TPS3106xxx TPS3110xxx SLVS363D AUGUST 2001 REVISED NOVEMBER 2006 UltraLow Supply-Current/Supply-Voltage Supervisory Circuits Precision Supply Voltage Supervision Range: The TPS310x and TPS311x families of supervisory 0.9 1.2 1.5 1.6 and 3.3 V circuits provide circuit initialization and timing supervision, primarily for DSP and processor-based High Trip-Point Accuracy: 0.75% systems. Supply Current of 1.2 µ A (typical) During power-on, RESET is asserted when the RESET Defined With Input Voltages as Low as supply voltage DD becomes higher than 0.4 0.4 V Thereafter, the supervisory circuit monitors V DD and Power-On Reset Generator With a Delay Time keeps the RESET output active as long as V DD of 130 ms remains below the threshold voltage IT An internal timer delays the return of the output to the inactive Push/Pull or Open-Drain RESET Outputs state to ensure proper system reset. The delay time SOT23-6 Package starts after V DD has risen above V IT When V DD drops Package Temperature Range: C to +85 C below V IT the output becomes active again. All the devices of this family have a fixed-sense threshold voltage IT set by an internal voltage DSPs, divider. Microcontrollers, or Microprocessors The TPS3103 and TPS3106 have an active-low, Portable- and Battery-Powered Equipment open-drain RESET output. The TPS3110 has an Intelligent Instruments active-low push/pull RESET Wireless Communication Systems The product spectrum is designed for supply Industrial Equipment voltages of 0.9 V up to 3.3 The circuits are Notebook/Desktop Computers available in SOT23-6 packages. The TPS31xx family is characterized for operation over a temperature range of C to +85 Please be aware that an important notice concerning availability, standard warranty, and use in critical sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright 2001 2006, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

www.ti.com ABSOLUTE MAXIMUM RATINGS (1) TPS3103xxx TPS3106xxx TPS3110xxx SLVS363D AUGUST 2001 REVISED NOVEMBER 2006 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) PRODUCT NOMINAL SUPPLY VOLTAGE THRESHOLD VOLTAGE, V IT (2) TPS3103E12DBVR 1.2 V 1.142 V TPS3103E15DBVR 1.5 V 1.434 V TPS3103H20DBVR 2.0 V 1.84 V TPS3103K33DBVR 3.3 V 2.941 V TPS3106E09DBVR 0.9 V 0.86 V TPS3106E16DBVR 1.6 V 1.521 V TPS3106K33DBVR 3.3 V 2.941 V TPS3110E09DBVR 0.9 V 0.86 V TPS3110E12DBVR 1.2 V 1.142 V TPS3110E15DBVR 1.5 V 1.434 V TPS3110K33DBVR 3.3 V 2.941 V (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com (2) Custom threshold voltages are available. Minimum order quantities apply. Contact factory for details and availability. AVAILABLE OPTIONS DEVICE RESET OUTPUT RSTSENSE RSTVDD OUTPUT SENSE INPUT WDI INPUT PFO OUTPUT TPS3103 Open-drain Open-drain TPS3106 Open-drain ü TPS3110 Push-pull ü ü Over operating free-air temperature range, unless otherwise noted. VALUE UNIT Supply voltage, V DD (2) 0.3 to +3.6 V MR Pin, V MR 0.3 to V DD 0.3 V All other pins (2) 0.3 to +3.6 V Maximum low output current, I OL mA Maximum high output current, I OH mA Input clamp current, I IK I or V I V DD mA Output clamp current, I OK O or V O V DD mA Continuous total power dissipation See Dissipation Rating Table Operating temperature range, T A to +85 C Storage temperature range, T STG to +150 C Soldering temperature +260 C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to GND. For reliable operation, the device must not be operated at 3.6 V for more than t 1000h continuously. Submit Documentation Feedback

www.ti.com DISSIPATION RATINGS RECOMMENDED OPERATING CONDITIONS ELECTRICAL CHARACTERISTICS TPS3103xxx TPS3106xxx TPS3110xxx SLVS363D AUGUST 2001 REVISED NOVEMBER 2006 T A C DERATING FACTOR T A +70 C T A +85 C PACKAGE POWER RATING ABOVE T A +25 C POWER RATING POWER RATING DBV 437 mW 3.5 mW/ C 280 mW 227 mW Over operating free-air temperature range, unless otherwise noted. MIN MAX UNIT Supply voltage, V DD (1) 0.4 3.3 V Input voltage, V I V DD 0.3 V High-level input voltage, V IH at MR WDI 0.7 V DD V Low-level input voltage, V IL at MR WDI 0.3 V DD V Input transition rise and fall rate at Δ Δ V at MR WDI 100 ns/V Operating temperature range, T A +85 C (1) For proper operation of SENSE, PFI, and WDI functions: V DD 0.8 over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT V DD 3.3 I OH mA V DD 1.8 I OH mA 0.8 V DD V V OH High-level output voltage V DD 1.5 I OH mA V DD 0.9 I OH 0.4 mA V DD 0.5 I OH µ A 0.7 V DD V V DD 3.3 I OL mA V DD 1.5 I OL mA V OL Low-level output voltage 0.3 V V DD 1.2 I OL mA V DD 0.9 I OL 500 µ A V OL Low-level output voltage RESET only V DD 0.4 I OL µ A 0.1 V TPS31xxE09 0.854 0.860 0.866 TPS31xxE12 1.133 1.142 1.151 TPS31xxE15 1.423 1.434 1.445 Negative-going input V IT T A +25 C V threshold voltage (1) TPS31xxE16 1.512 1.523 1.534 TPS31xxH20 1.829 1.843 1.857 TPS31xxK33 2.919 2.941 2.963 Negative-going input V IT (S) SENSE, PFI V DD 0.8 T A +25 C 0.542 0.551 0.559 V threshold voltage (1) 0.8 V V IT 1.5 V V HYS Hysteresis at V DD input 1.6 V V IT 2.4 V mV 2.5 V V IT 3.3 V Temperature coefficient of V IT PFI, T (K) T A C to +85 C 0.012 0.019 %/K SENSE V HYS Hysteresis at SENSE, PFI input V DD 0.8 V mV MR MR V DD V DD 3.3 V I IH High-level input current nA SENSE, PFI, SENSE, PFI, WDI V DD WDI V DD 3.3 V (1) To ensure the best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 µ should be placed close to the supply terminals. Submit Documentation Feedback

www.ti.com SWITCHING CHARACTERISTICS TIMING REQUIREMENTS TPS3103xxx TPS3106xxx TPS3110xxx SLVS363D AUGUST 2001 REVISED NOVEMBER 2006 ELECTRICAL CHARACTERISTICS (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT MR MR V DD 3.3 V µ A I IL Low-level input current SENSE, PFI, SENSE, PFI, WDI nA WDI V DD 3.3 V High-level output current I OH Open-drain V DD V IT 0.2 V OH 3.3 V 200 nA at RESET (2) V DD V IT (average current), 1.2 V DD 1.8 V V DD V IT (average current), 4.5 I DD Supply current µ A V DD 1.8 V V DD V IT V DD 1.8 V V DD V IT V DD 1.8 V Internal pull-up resistor at MR 100 130 k Ω C I Input capacitance at MR SENSE, PFI, WDI V I V to V DD pF (2) Also refers to RSTVDD and RSTSENSE At R L M Ω C L pF, and T A C to +85 unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT t D Delay time V DD 1.1 V IT MR 0.7 V DD See Timing Diagrams 130 195 ms Propagation delay time, V DD to RESET or t PHL V IH 1.1 V IT V IL 0.9 V IT µ s high-to-low level output RSTVDD delay Propagation delay time, V DD to RESET or t PLH V IH 1.1 V IT V IL 0.9 V IT µ s low-to-high level output RSTVDD delay Propagation delay time, SENSE to RESET or t PHL V DD 0.8 V IH 1.1 V IT V IL 0.9 V IT µ s high-to-low level output RSTSENSE delay Propagation delay time, SENSE to RESET or t PLH V DD 0.8 V IH 1.1 V IT V IL 0.9 V IT µ s high-to-low level output RSTSENSE delay Propagation delay time, t PHL PFI to PFO delay V DD 0.8 V IH 1.1 V IT V IL 0.9 V IT µ s high-to-low level output Propagation delay time, t PLH PFI to PFO delay V DD 0.8 V IH 1.1 V IT V IL 0.9 V IT 300 µ s low-to-high level output MR to RESET Propagation delay time, t PHL RSTVDD V DD 1.1 V IT V IL 0.3 V DD V IH 0.7 V DD µ s low-to-high level output RSTSENSE delay MR to RESET Propagation delay time, t PLH RSTVDD V DD 1.1 V IT V IL 0.3 V DD V IH 0.7 V DD µ s low-to-high level output RSTSENSE delay At R L M Ω C L pF, and T A C to +85 unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT t T(OUT) Time-out period at WDI V DD 0.85 V 0.55 1.1 1.65 s at V DD V IH 1.1 V IT V IL 0.9 V IT V IT 0.86 V at MR V DD V IT 0.2 V IL 0.3 V DD V IH 0.7 V DD 0.1 t W Pulse width at SENSE V DD V IT V IH 1.1 V IT (S) V IL 0.9 V IT (S) µ s at PFI V DD 0.85 V IH 1.1 V IT (S) IL 0.9 V IT (S) at WDI V DD V IT V IL 0.3 V DD V IH 0.7 V DD 0.3 Submit Documentation Feedback

www.ti.com FUNCTIONAL BLOCK DIAGRAMS Reset□Logic and□Timer VIT/c45 0.551□V VDD MR PFI GND RESET PFO TPS3103 Reset□Logic and□Timer 0.551□V VDD MR SENSE GND RSTVDD Reset□Logic and□Timer RSTSENSE TPS3106 VIT/c45 TPS3103xxx TPS3106xxx TPS3110xxx SLVS363D AUGUST 2001 REVISED NOVEMBER 2006 Submit Documentation Feedback

www.ti.com + Reset□Logic and□Timer 0.551□V VDD MR SENSE GND RESET Watchdog Logic□and Control WDI TPS3110 VIT/c45 TPS3103xxx TPS3106xxx TPS3110xxx SLVS363D AUGUST 2001 REVISED NOVEMBER 2006 FUNCTIONAL BLOCK DIAGRAMS (continued) Table TPS3103 FUNCTION TABLE MR V (PFI) 0.551 V V DD V IT RESET PFO L X (1) L L L X L H H L L H H L H L H H H H (1) X Don t care. Table TPS3106 FUNCTION TABLE MR V (SENSE) 0.551 V V DD V IT RSTVDD RSTSENSE L X (1) X L L H L L H H L H L H H H H (1) X Don t care. Table TPS3110 FUNCTION TABLE (1) MR V (SENSE) 0.551 V V DD V IT RESET L X (2) X L H L H L H L H H (1) Function of watchdog-timer not shown. (2) X Don t care. Submit Documentation Feedback

www.ti.com PIN DESCRIPTIONS (TOP□VIEW) RSTVDD GND MR VDD SENSE TPS3106 DBV□PACKAGE RSTSENSE (TOP□VIEW) RESET GND MR VDD PFI TPS3103 DBV□PACKAGE PFO (TOP□VIEW) RESET GND MR VDD SENSE TPS3110 DBV□PACKAGE WDI TPS3103xxx TPS3106xxx TPS3110xxx SLVS363D AUGUST 2001 REVISED NOVEMBER 2006 TERMINAL FUNCTIONS TERMINAL NO. GND ALL GND Manual-reset input. Pull low to force a reset. RESET remains low as long as MR is low and for MR ALL the timeout period after MR goes high. Leave unconnected or connect to V DD when unused. PFI TPS3103 Power-fail input compares to 0.551 V with no additional delay. Connect to V DD if not used. PFO TPS3103 Power-fail output. Goes high when voltage at PFI rises above 0.551 TPS3103, RESET Active-low reset output. Either push-pull or open-drain output stage. TPS3110 Active-low reset output. Logic level at RSTSENSE only depends on the voltage at SENSE and RSTSENSE TPS3106 the status of MR Active-low reset output. Logic level at RSTVDD only depends on the voltage at V DD and the RSTVDD TPS3106 status of MR TPS3106, A reset will be asserted if the voltage at SENSE is lower than 0.551 Connect to V DD if SENSE TPS3110 unused. V DD ALL Supply voltage. Powers the device and monitors its own voltage. Watchdog timer input. If WDI remains high or low longer than the time-out period, then reset is WDI TPS3110 triggered. The timer clears when reset is asserted or when WDI sees a rising edge or a falling edge. Submit Documentation Feedback

www.ti.com TIMING DIAGRAMS Timing Diagrams for TPS3103 tD tD tD tD tD VDD VIT 0.4□V SENSE V =□0.551□VIT (S)/c45 RESET Output□Condition Undefined MR t t t t t Output□Condition Undefined PFI V =□0.551□VIT (S)/c45 Output□Condition Undefined PFO t t Output□Condition Undefined TPS3103xxx TPS3106xxx TPS3110xxx SLVS363D AUGUST 2001 REVISED NOVEMBER 2006 Submit Documentation Feedback

www.ti.com Timing Diagram for TPS3106 VDD VIT 0.4□V t t t t t Output□Condition Undefined Output□Condition Undefined Output□Condition Undefined Output□Condition Undefined tD tD tD tD RSTVDD SENSE V =□0.551□VIT (S)/c45 RSTSENSE MR TPS3103xxx TPS3106xxx TPS3110xxx SLVS363D AUGUST 2001 REVISED NOVEMBER 2006 TIMING DIAGRAMS (continued) Submit Documentation Feedback

www.ti.com Timing Diagram for TPS3110 VDD VIT 0.4□V t t Output□Condition Undefined Output□Condition Undefined t tD VIT (S)/c45 =□0.551□V SENSE RESET WDI MR tD tD tD tD tD t(TOUT) x□=□Don’t□Care TPS3103xxx TPS3106xxx TPS3110xxx SLVS363D AUGUST 2001 REVISED NOVEMBER 2006 TIMING DIAGRAMS (continued) Submit Documentation Feedback

www.ti.com TYPICAL CHARACTERISTICS T C /c176=□85A T C /c176=□25A T C /c176=□0A T = 40 C/c45 /c176A I Supply□Current /c45 /c45 /c109 A DD V Supply□Voltage/c45 V/c45DD SENSE□=□VDD MR =□Open RESET =□Open WDI:□Triggered 0.05 0.10 0.15 0.20 0.25 0.30 T =□25 C/c176A T =□0 C/c176A T 40 C/c45 /c176A = T =□85 CA /c176 V Low-Level□Output□Voltage V OL /c45 /c45 I Low-Level□Output□CurrentOL /c45 /c45 mA V =□0.9□VDD SENSE□=□GND MR =□GND WDI□=□GND 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 2 4 6 8 10 12 14 16 18 20 T =□25 C/c176A T =□0 C/c176A T = 40 C/c45 /c176A T =□85 CA /c176 V =□3.3□VDD SENSE□=□GND MR =□GND WDI□=□GND V Low-Level□Output□Voltage V OL /c45 /c45 I Low-Level□Output□CurrentOL /c45 /c45 mA 0.60 0.65 0.70 0.75 0.80 0.85 0.90 T =□25A /c176 C T =□0A /c176 C T 40 C/c45 /c176A = T =□85A /c176 C V =□0.9□VDD SENSE□=□VDD MR =□VDD WDI□:□Triggered I High-Level□Output□Current/c45 /c45OH mA V High-Level□Output□Voltage V OH /c45 /c45 TPS3103xxx TPS3106xxx TPS3110xxx SLVS363D AUGUST 2001 REVISED NOVEMBER 2006 TPS3110E09 TPS3110E09 SUPPLY CURRENT LOW-LEVEL OUTPUT VOLTAGE vs vs SUPPLY VOLTAGE LOW-LEVEL OUTPUT CURRENT Figure Figure TPS3110E09 TPS3110E09 LOW-LEVEL OUTPUT VOLTAGE HIGH-LEVEL OUTPUT VOLTAGE vs vs LOW-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT CURRENT Figure Figure Submit Documentation Feedback

www.ti.com 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 /c45 25/c45 20/c45 15/c45 10/c45 50 T 40 CA /c45 /c176= T =□0 C/c176A T =□25 C/c176A T =□85 C/c176A V =□3.3□VDD SENSE□=□VDD MR =□VDD WDI□:□Triggered V High-Level□output□Voltage V OH /c45 /c45 I Low-Level□Output□CurrentOH /c45 /c45 mA V Threshold□Overdrive□Voltage/c45 /c45 VDD t V Minimum□Pulse□Duration□at /c45 /c45 /c109s W DD V =□3.3□VDD V =□0.9□VDD MR :□Open SENSE□=□VDD 0.992 0.994 0.996 0.998 1.000 1.002 1.004 1.006 1.008 /c45 50 0 50 100 V Normalized□Threshold□Voltage IT /c45 /c45 V T Free-Air□T emperatureA /c45 /c45 /c176 C TPS3103xxx TPS3106xxx TPS3110xxx SLVS363D AUGUST 2001 REVISED NOVEMBER 2006 TYPICAL CHARACTERISTICS (continued) TPS3110K33 HIGH-LEVEL OUTPUT VOLTAGE MINIMUM PULSE DURATION AT V DD vs vs HIGH-LEVEL OUTPUT CURRENT THRESHOLD OVERDRIVE VOLTAGE Figure Figure NORMALIZED THRESHOLD VOLTAGE vs FREE-AIR TEMPERATURE Figure Submit Documentation Feedback

www.ti.com APPLICATION INFORMATION R1 /C0043R2 /C0032/C0466V TRIP V IT(S) /C00421/C0467 (1) TPS3106E09DBV SENSE GND VDD RSTVDD RSTSENSE 2□Cell NiMH Reset□Output MR TPS3103xxx TPS3106xxx TPS3110xxx SLVS363D AUGUST 2001 REVISED NOVEMBER 2006 The TPS31xx family has a quiescent current in the µ A to µ A range. When RESET is active, triggered by the voltage monitored at V DD the quiescent current increases to about µ A (see the Electrical Characteristics In some period. This is especially true when the voltage of a battery is supervised and the RESET is used to shut down the system or for an early warning. In this case the reset condition will last for a longer period of time. The current drawn from the battery should almost be zero, especially when the battery is discharged. For this kind of application, either the TPS3103 or TPS3106 is a good fit. To minimize current consumption, select a version where the threshold voltage is lower than the voltage monitored at V DD The TPS3106 has two reset outputs. One output RSTVDD is triggered from the voltage monitored at V DD The other output RSTSENSE is triggered from the voltage monitored at SENSE. In the application shown in Figure the TPS3106E09 is used to monitor the input voltage of two NiCd or NiMH cells. The threshold voltage (TH) 0.86 was chosen as low as possible to ensure that the supply voltage is always higher than the threshold voltage at V DD The voltage of the battery is monitored using the SENSE input. The voltage divider was calculated to assert a reset using the RSTSENSE output at 0.8 V 1.6 where: V TRIP is the voltage of the battery at which a reset is asserted and V IT(S) is the threshold voltage at SENSE 0.551 was chosen for a resistor current in the µ A range. With V TRIP 1.6 1.9 820 k Ω 430 k Ω Figure Battery Monitoring with µ A Supply Current for Device and Resistor Divider Submit Documentation Feedback

www.ti.com WATCHDOG MANUAL RESET MR PFI, PFO SENSE TPS3103xxx TPS3106xxx TPS3110xxx SLVS363D AUGUST 2001 REVISED NOVEMBER 2006 APPLICATION INFORMATION (continued) The TPS3110 device integrates a watchdog timer that must be periodically triggered by a positive or negative transition of WDI. When the supervising system fails to retrigger the watchdog circuit within the time-out interval, RESET becomes active for the time period D This event also reinitializes the watchdog timer. Many µ C-based products require manual-reset capability, allowing an operator or logic circuitry to initiate a reset. Logic low at MR asserts reset. Reset remains asserted while MR is low and for a time period D after MR returns high. The input has an internal 100-k Ω pull-up resistor, so it can be left open if it is unused. Connect a normally open momentary switch from MR to GND to create a manual reset function. External debounce is not required. If MR is driven from long cables or if the device is used in noisy environments, connecting a 0.1- µ F capacitor from MR to GND provides additional noise immunity. If there is a possibility of transient or DC conditions causing MR to rise above V DD a diode should be used to limit MR to a diode drop above V DD The TPS3103 has an integrated power-fail (PFI) comparator with a separate open-drain PFO output. The PFI and PFO can be used for low-battery detection, power-fail warning, or for monitoring a power supply other than the main supply, and has no effect on RESET An additional comparator is provided to monitor voltages other than the nominal supply voltage. The power-fail input (PFI) will be compared with an internal voltage reference of 0.551 If the input voltage falls below the power-fail threshold IT (S) the power-fail output PFO goes low. If it goes above 0.551 V plus approximately 15-mV hysteresis, the output returns to high. By connecting two external resistors, it is possible to supervise any voltage above 0.551 The sum of both resistors should be approximately M Ω to minimize power consumption and to assure that the current into the PFI pin can be neglected, compared with the current through the resistor network. The tolerance of the external resistors should be not more than to ensure minimal variation of sensed voltage. If the power-fail comparator is unused, connect PFI to GND and leave PFO unconnected. For proper operation of the PFI-comparator, the supply voltage DD must be higher than 0.8 The voltage at the SENSE input is compared with a reference voltage of 0.551 If the voltage at SENSE falls below the sense-threshold IT (S) reset is asserted. On the TPS3106, a dedicated RSTSENSE output is available. On the TPS3110, the logic signal from SENSE is OR-wired with the logic signal from V DD or MR An internal timer delays the return of the output to the inactive state, once the voltage at SENSE goes above 0.551 V plus about mV of hysteresis. For proper operation of the SENSE-comparator, the supply voltage must be higher than 0.8 Submit Documentation Feedback

www.ti.com TPS3103H20 PFI GND MSP430 RESET GND Analog Circuit Px.x Py.x (1)□Resistor□may□be□integrated□in /c109 C. RESET PFO VDD VDD Low-Power /c109 C 2□V /c45 2□V MR (1) (1) V =□0.551□V(NEG_TH) /c45 R2 (V 0.551□V)DD /c45 TPS3110K33 GND SENSE GND DSP RESET GND WDI Px.y V =(CORE_TH) 0.551 V□x R1□+ R2 VDD RESET VCORE VIO 3.3□V 1.5□V MR TPS3103xxx TPS3106xxx TPS3110xxx SLVS363D AUGUST 2001 REVISED NOVEMBER 2006 APPLICATION INFORMATION (continued) Figure TPS3103 Monitoring a Negative Voltage Figure 10. TPS3110 in a DSP-System Monitoring Both Supply Voltages Submit Documentation Feedback

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) SN0402002DBVR ACTIVE SOT-23 DBV 6 TBD Call TI Call TI TPS3103E12DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103E12DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103E12DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103E12DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103E15DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103E15DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103E15DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103E15DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103H20DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103H20DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103H20DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103H20DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103K33DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103K33DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103K33DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3103K33DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106E09DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106E09DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106E09DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106E09DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106E16DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106E16DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106E16DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106E16DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM PACKAGE OPTION ADDENDUM www.ti.com 16-Feb-2007 Addendum-Page 1

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) TPS3106K33DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106K33DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106K33DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3106K33DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E09DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E09DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E09DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E09DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E12DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E12DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E12DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E12DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E15DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E15DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E15DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110E15DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110K33DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110K33DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110K33DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS3110K33DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered PACKAGE OPTION ADDENDUM www.ti.com 16-Feb-2007 Addendum-Page 2

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 16-Feb-2007 Addendum-Page 3

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