TPS2000C TI | Alldatasheet

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0.1 /c109F 150 /c109F Fault Signal Pad* VOUT * DGN only EN or EN Copyright © 2016, Texas Instruments Incorporated Product Folder Sample & Buy T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 SLVSAU6H –JUNE 2011–REVISED APRIL 2016 TPS20xxCandTPS20xxC-2CurrentLimited,Power-DistributionSwitches

1 Features

1• Single Power Switch Family

  • Pin-for-Pin With Existing TI Switch Portfolio
  • Rated Currents of 0.5 A, 1 A, 1.5 A, 2 A
  • ±20% Accurate, Fixed, Constant Current Limit
  • Fast Overcurrent Response: 2 µs
  • Deglitched Fault Reporting
  • Selected Parts With (TPS20xxC) and Without (TPS20xxC-2) Output Discharge
  • Reverse Current Blocking
  • Built-In Soft Start
  • Ambient Temperature Range: –40°C to 85°C
  • UL Listed and CB-File No. E169910

2 Applications

  • USB Ports and Hubs, Laptops, and Desktops
  • High-Definition Digital TVs
  • Set-Top Boxes
  • Short-Circuit Protection

3 Description

The TPS20xxC and TPS20xxC-2 power-distribution switch family is intended for applications, such as USB, where heavy capacitive loads and short circuits are likely to be encountered. This family offers multiple devices with fixed current-limit thresholds for applications from 0.5 A to 2 A. The TPS20xxC and TPS20xxC-2 family limits the output current to a safe level by operating in a constant-current mode when the output load exceeds the current limit threshold. This provides a predictable fault current under all conditions. The fast overload response time eases the burden on the main 5-V supply to provide regulated power when the output is shorted. The power-switch rise and fall times are controlled to minimize current surges during turnon and turnoff. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TPS20xxC, TPS20xxC-2 SOT-23 (5) 2.90 mm × 1.60 mm VSSOP (8) 3.00 mm × 3.00 mm MSOP-PowerPAD (8) 3.00 mm × 3.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Typical Application Diagram

TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 SLVSAU6H –JUNE 2011–REVISED APRIL 2016 www.ti.com Product Folder Links: TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 Submit Documentation Feedback Copyright © 2011–2016, Texas Instruments Incorporated Table of Contents

13 Mechanical, Packaging, and Orderable

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision G (July 2013) to Revision H Page

  • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Changes from Revision F (August 2012) to Revision G Page Changes from Revision E (April 2012) to Revision F Page
  • Changed Feature From: Ouput Discharge When TPS20XXC is Disabled To: Selected parts with (TPS20xxC) and
  • Added devices TPS2041C, TPS2061C, TPS2065C-2, TPS2068C, and TPS2069C-2 to and removed Product Preview.... 4
  • Added TPS2041C, TPS2061C, TPS2068C, TPS2065C-2 and TPS2069C-2 devices to IOUT in the RECOMMENDED

TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 www.ti.com SLVSAU6H –JUNE 2011–REVISED APRIL 2016 Product Folder Links: TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 Submit Documentation FeedbackCopyright © 2011–2016, Texas Instruments Incorporated Changes from Revision D (February 2012) to Revision E Page

  • Changed the POWER DISSIPATION AND JUNCTION TEMPERATURE section. Replaced paragraph " While it is Changes from Revision C (October 2011) to Revision D Page Changes from Revision B (September 2011) to Revision C Page
  • Changed From: PXF1 To: PXFI and From: PSG1 To: PXGI in the DEVICE INFORMATION table MOSP-8 (DGK) Changes from Revision A (July 2011) to Revision B Page Changes from Original (June 2011) to Revision A Page

TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 SLVSAU6H –JUNE 2011–REVISED APRIL 2016 www.ti.com Product Folder Links: TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 Submit Documentation Feedback Copyright © 2011–2016, Texas Instruments Incorporated (1) For the most current packaging and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. (2) "–" indicates the device is not available in this package.

5 Device Comparison Table

DISCHARGE ENABLE BASE PART NUMBER PACKAGED DEVICE AND MARKING(1) MSOP-8 (DGN) PowerPAD™ SOT23-5 (DBV) VSSOP-8 (DGK)

0.5 Y Low TPS2041C — (2) PYJI —

0.5 Y High TPS2051C — VBYQ —

1 Y Low TPS2061C PXMI PXLI —

1 Y High TPS2065C VCAQ VCAQ —

1 N High TPS2065C-2 PYRI PYQI —

1.5 Y Low TPS2068C PXNI — —

1.5 Y High TPS2069C VBUQ PYKI —

1.5 N High TPS2069C-2 PYSI — —

2 Y Low TPS2000C BCMS — PXFI

2 Y High TPS2001C VBWQ – PXGI

6 Pin Configuration and Functions

NAME NO. EN/EN 4 I Enable input, logic high turns on power switch FLT 5 O Active-low open-drain output, asserted during overcurrent, or overtemperature conditions GND 1 — Ground connection IN 2, 3 PWR Input voltage and power-switch drain; connect a 0.1-µF or greater ceramic capacitor from IN to GND close to the IC OUT 6, 7, 8 PWR Power-switch output, connect to load PowerPAD (DGN Only) PowerPAD — Internally connected to GND. Connect PAD to GND plane as a heatsink for the best thermal performance. PAD may be left floating if desired. See Power Dissipation and Junction Temperature for guidance.

TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 www.ti.com SLVSAU6H –JUNE 2011–REVISED APRIL 2016 Product Folder Links: TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 Submit Documentation FeedbackCopyright © 2011–2016, Texas Instruments Incorporated 5-Pin SOT-23 Top View Pin Functions - 5 Pins PIN I/O DESCRIPTION NAME NO. EN/EN 4 I Enable input, logic high turns on power switch FLT 3 O Active-low open-drain output, asserted during overcurrent, or overtemperature conditions GND 2 — Ground connection IN 5 PWR Input voltage and power-switch drain; connect a 0.1-µF or greater ceramic capacitor from IN to GND close to the IC OUT 1 PWR Power-switch output, connect to load. (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Absolute maximum ratings apply over recommended junction temperature range. (3) Voltages are with respect to GND unless otherwise noted. (4) See Input and Output Capacitance.

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)(3) MIN MAX UNIT Voltage on IN, OUT, EN or EN, FLT (4) –0.3 6 V Voltage from IN to OUT –6 6 V Maximum junction temperature, TJ Internally Limited Storage temperature, Tstg –60 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. (3) VOUT was surged on a PCB with input and output bypassing per the Typical Application Diagram on the first page (except input capacitor was 22 µF) with no device failures.

7.2 ESD Ratings

V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500 IEC 61000-4-2 contact discharge ±8000 IEC 61000-4-2 air-gap discharge(3) ±15000

TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 SLVSAU6H –JUNE 2011–REVISED APRIL 2016 www.ti.com Product Folder Links: TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 Submit Documentation Feedback Copyright © 2011–2016, Texas Instruments Incorporated (1) Some package and current rating may request an ambient temperature derating of 85°C.

7.3 Recommended Operating Conditions

VIN Input voltage, IN 4.5 5.5 V VEN Input voltage, EN or EN 0 5.5 V VIH High-level input voltage, EN or EN 2 V VIL Low-level input voltage, EN or EN 0.7 V IOUT Continuous output current, OUT(1) TPS2041C and TPS2051C 0.5 A TPS2061C, TPS2065C and TPS2065C-2 1 TPS2068C, TPS2069C and TPS2069C-2 1.5 TPS2000C and TPS2001C 2 TJ Operating junction temperature –40 125 °C IFLT Sink current into FLT 0 5 mA (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. (2) Rated at 0.5 A or 1 A. (3) Rated at 1.5 A or 2 A.

7.4 Thermal Information: SOT-23

THERMAL METRIC(1) TPS20xxC, TPS20xxC-2 UNITDBV (SOT-23)(2) DBV (SOT-23)(3)

5 PINS 5 PINS

RθJA Junction-to-ambient thermal resistance 224.9 220.4 °C/W RθJCtop Junction-to-case (top) thermal resistance 95.2 89.7 °C/W RθJB Junction-to-board thermal resistance 51.4 46.9 °C/W ψJT Junction-to-top characterization parameter 6.6 5.2 °C/W ψJB Junction-to-board characterization parameter 50.3 46.2 °C/W RθJCbot Junction-to-case (bottom) thermal resistance — — °C/W RθJACustom See Power DIssipation and Junction Temperature 139.3 134.9 °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. (2) Rated at 0.5 A or 1 A. (3) Rated at 1.5 A or 2 A. (4) Rated at 2 A.

7.5 Thermal Information: MSOP-PowerPAD

THERMAL METRIC(1) TPS20xxC, TPS20xxC-2 UNIT DGN (MSOP- PowerPAD)(2) DGN (MSOP- PowerPAD)(3) DGK (VSSOP)(4)

8 PINS 8 PINS 8 PINS

RθJA Junction-to-ambient thermal resistance 72.1 67.1 205.5 °C/W RθJC(top) Junction-to-case (top) thermal resistance 87.3 80.8 94.3 °C/W RθJB Junction-to-board thermal resistance 42.2 37.2 126.9 °C/W ψJT Junction-to-top characterization parameter 7.3 5.6 24.7 °C/W ψJB Junction-to-board characterization parameter 42 36.9 125.2 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance 39.2 32.1 — °C/W RθJACustom See Power DIssipation and Junction Temperature 66.5 61.3 110.3 °C/W

TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 www.ti.com SLVSAU6H –JUNE 2011–REVISED APRIL 2016 Product Folder Links: TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 Submit Documentation FeedbackCopyright © 2011–2016, Texas Instruments Incorporated (1) Pulsed testing techniques maintain junction temperature approximately equal to ambient temperature (2) See Current Limit section for explanation of this parameter. (3) These parameters are provided for reference only, and do not constitute part of TI's published device specifications for purposes of TI's product warranty.

7.6 Electrical Characteristics: TJ = TA = 25°C

Unless otherwise noted: VIN = 5 V, VEN = VIN or VEN = GND, IOUT = 0 A. See Device Comparison Table for the rated current of each part number. Parametrics over a wider operational range are shown in Electrical Characteristics: –40°C ≤ TJ ≤ 125°C(1). PARAMETER TEST CONDITIONS(1) MIN TYP MAX UNIT POWER SWITCH RDS(on) Input – output resistance 0.5-A rated output, 25°C DBV 97 110 mΩ 0.5-A rated output, –40°C ≤ (TJ , TA) ≤ 85°C DBV 96 130 mΩ 1-A rated output, 25°C DBV 96 110 mΩ DGN 86 100 1-A rated output, –40°C ≤ (TJ , TA) ≤ 85°C DBV 96 130 mΩ DGN 86 120 1.5-A rated output, 25°C DBV 76 91 mΩ DGN 69 84 mΩ 1.5-A rated output, –40°C ≤ (TJ , TA) ≤ 85°C DBV 76 106 mΩ DGN 69 98 mΩ 2-A rated output, 25°C DGN, DGK 72 84 mΩ 2-A rated output, –40°C ≤ (TJ , TA) ≤ 85°C DGN, DGK 72 98 mΩ CURRENT LIMIT IOS (2) Current limit, See Figure 6 0.5-A rated output TPS20xxC 0.67 0.85 1.01 A 1-A rated output TPS20xxC 1.3 1.55 1.8 TPS20xxC-2 1.18 1.53 1.88 1.5-A rated output TPS20xxC 1.7 2.15 2.5 TPS20xxC-2 1.71 2.23 2.75 2-A rated output TPS20xxC 2.35 2.9 3.4 SUPPLY CURRENT ISD Supply current, switch disabled IOUT = 0 A 0.01 1 µA –40°C ≤ (TJ , TA) ≤ 85°C, VIN = 5.5 V, IOUT = 0 A 2 ISE Supply current, switch enabled IOUT = 0 A 60 70 µA –40°C ≤ (TJ , TA) ≤ 85°C, VIN = 5.5 V, IOUT = 0 A 85 Ilkg Leakage current VOUT = 0 V, VIN = 5 V, disabled, measure IVIN TPS20xxC-2 0.05 1 µA –40°C ≤ (TJ , TA) ≤ 85°C, VOUT = 0 V, VIN = 5 V, disabled, measure IVIN IREV Reverse leakage current VOUT = 5 V, VIN = 0 V, measure IVOUT 0.1 1 µA–40°C ≤ (TJ , TA) ≤ 85°C, VOUT = 5 V, VIN = 0 V, measure IVOUT OUTPUT DISCHARGE RPD Output pulldown resistance(3) VIN = VOUT = 5 V, disabled TPS20xxC 400 470 600 Ω

TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 SLVSAU6H –JUNE 2011–REVISED APRIL 2016 www.ti.com Product Folder Links: TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 Submit Documentation Feedback Copyright © 2011–2016, Texas Instruments Incorporated (1) Pulsed testing techniques maintain junction temperature approximately equal to ambient temperature (2) See Current Limit for explanation of this parameter. (3) These parameters are provided for reference only, and do not constitute part of TI's published device specifications for purposes of TI's product warranty.

7.7 Electrical Characteristics: –40°C ≤ TJ ≤ 125°C

Unless otherwise noted:4.5 V ≤ VIN ≤ 5.5 V, VEN = VIN or VEN = GND, IOUT = 0 A, typical values are at 5 V and 25°C. See Device Comparison Table for the rated current of each part number. PARAMETER TEST CONDITIONS(1) MIN TYP MAX UNIT POWER SWITCH RDS(ON) Input – output resistance 0.5-A rated output DBV 97 154 mΩ 1-A rated output DBV 96 154 mΩ DGN 86 140 1.5-A rated output DBV 76 121 mΩ DGN 69 112 mΩ 2-A rated output DGN, DGK 72 112 mΩ ENABLE INPUT (EN or EN) Threshold Input rising 1 1.45 2 V Hysteresis 0.07 0.13 0.2 V Leakage current (VEN or VEN) = 0 V or 5.5 V –1 0 1 µA CURRENT LIMIT IOS (2) Current limit, See Figure 23 0.5-A rated output TPS20xxC 0.65 0.85 1.05 A 1-A rated output TPS20xxC 1.2 1.55 1.9 TPS20xxC-2 1.1 1.53 1.96 1.5-A rated output TPS20xxC 1.6 2.15 2.7 TPS20xxC-2 1.6 2.23 2.86 2-A rated output TPS20xxC 2.3 2.9 3.6 tIOS Short-circuit response time(3) VIN = 5 V (see Figure 6), One-half full load → RSHORT = 50 mΩ, Measure from application to when current falls below 120% of final value 2 µs SUPPLY CURRENT ISD Supply current, switch disabled IOUT = 0 A 0.01 10 µA ISE Supply current, switch enabled IOUT = 0 A 65 90 µA Ilkg Leakage current VOUT = 0 V, VIN = 5 V, disabled, measure IVIN TPS20XXC-2 0.05 µA IREV Reverse leakage current VOUT = 5.5 V, VIN = 0 V, measure IVOUT 0.2 20 µA UNDERVOLTAGE LOCKOUT VUVLO Rising threshold VIN↑ 3.5 3.75 4 V Hysteresis(3) VIN↓ 0.14 V FLT Output low voltage, FLT IFLT = 1 mA 0.2 V OFF-state leakage VFLT = 5.5 V 1 µA tFLT FLT deglitch FLT assertion or deassertion deglitch 6 9 12 ms OUTPUT DISCHARGE RPD Output pulldown resistance VIN = 4 V, VOUT = 5 V, disabled TPS20XXC 350 560 1200 Ω VIN = 5 V, VOUT = 5 V, disabled TPS20XXC 300 470 800 THERMAL SHUTDOWN Rising threshold (TJ) In current limit 135 °CNot in current limit 155 Hysteresis (3) 20

7.8 Timing Requirements: TJ = TA = 25°C

Figure 1. Output Rise and Fall Test Load Figure 2. Power-On and Power-Off Timing Figure 3. Enable Timing, Active High Enable Figure 4. Enable Timing, Active Low Enable Figure 5. Output Short-Circuit Parameters

Figure 6. Output Characteristic Showing Current Limit

7.9 Typical Characteristics

Figure 7. Deglitch Period (TFLT) vs Temperature Figure 8. Output Discharge Current vs Output Voltage Figure 9. Short Circuit Current (IOS) vs Temperature Figure 10. Reverse Leakage Current (IREV) vs Temperature Figure 11. Disabled Supply Current (ISD) vs Temperature Figure 12. Disabled Supply Current (ISD) vs Input Voltage

Figure 19. Recovery vs Current Peak

8 Detailed Description

8.1 Overview

discharge pulldown, overcurrent protection, overtemperature protection, and deglitched fault reporting.

8.2 Functional Block Diagram

Figure 20. TPS20xxC Block Diagram Figure 21. TPS20xxC-2 Block Diagram

8.3 Feature Description

8.3.1 Undervoltage Lockout

current surges. FLT is high impedance when the TPS20xxC and TPS20xxC-2 are in UVLO.

TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 www.ti.com SLVSAU6H –JUNE 2011–REVISED APRIL 2016 Product Folder Links: TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 Submit Documentation FeedbackCopyright © 2011–2016, Texas Instruments Incorporated Feature Description (continued)

8.3.2 Enable

The logic enable input (EN, or EN), controls the power switch, bias for the charge pump, driver, and other circuits. The supply current is reduced to less than 1 µA when the TPS20xxC and TPS20xxC-2 are disabled. Disabling the TPS20xxC and TPS20xxC-2 immediately clears an active FLT indication. The enable input is compatible with both TTL and CMOS logic levels. The turnon and turnoff times (tON, tOFF) are composed of a delay and a rise or fall time (tR, tF). The delay times are internally controlled. The rise time is controlled by both the TPS20xxC and TPS20xxC-2 and the external loading (especially capacitance). TPS20xxC fall time is controlled by the loading (R and C), and the output discharge (RPD). TPS20xxC-2 does not have the output discharge (RPD), fall time is controlled by the loading (R and C). An output load consisting of only a resistor experiences a fall time set by the TPS20xxC and TPS20xxC- 2. An output load with parallel R and C elements experiences a fall time determined by the (R × C) time constant if it is longer than the tF TPS20xxC and TPS20xxC-2. The enable must not be left open, and may be tied to VIN or GND depending on the device.

8.3.3 Internal Charge Pump

The device incorporates an internal charge pump and gate drive circuitry necessary to drive the N-channel MOSFET. The charge pump supplies power to the gate driver circuit and provides the necessary voltage to pull the gate of the MOSFET above the source. The driver incorporates circuitry that controls the rise and fall times of the output voltage to limit large current and voltage surges on the input supply, and provides built-in soft-start functionality. The MOSFET power switch blocks current from OUT to IN when turned off by the UVLO or disabled.

8.3.4 Current Limit

The TPS20xxC and TPS20xxC-2 responds to overloads by limiting output current to the static IOS levels shown in Electrical Characteristics: TJ = TA = 25°C. When an overload condition is present, the device maintains a constant output current, with the output voltage determined by (IOS × RLOAD). Two possible overload conditions can occur. The first overload condition occurs when either: 1. input voltage is first applied, enable is true, and a short circuit is present (load which draws IOUT > IOS) 2. input voltage is present and the TPS20xxC and TPS20xxC-2 are enabled into a short circuit. The output voltage is held near zero potential with respect to ground and the TPS20xxC and TPS20xxC-2 ramps the output current to IOS. The TPS20xxC and TPS20xxC-2 limits the current to IOS until the overload condition is removed or the device begins to thermal cycle. This is demonstrated in Figure 26 where the device was enabled into a short, and subsequently cycles current OFF and ON as the thermal protection engages. The second condition is when an overload occurs while the device is enabled and fully turned on. The device responds to the overload condition within tIOS (Figure 5 and Figure 6) when the specified overload (see Electrical Characteristics: –40°C ≤ TJ ≤ 125°C) is applied. The response speed and shape varies with the overload level, input circuit, and rate of application. The current limit response will vary between simply settling to IOS, or turnoff and controlled return to IOS. Similar to the previous case, the TPS20xxC and TPS20xxC-2 limits the current to IOS until the overload condition is removed or the device begins to thermal cycle. This is demonstrated by Figure 27, Figure 28, and Figure 29. The TPS20xxC and TPS20xxC-2 thermal cycles if an overload condition is present long enough to activate thermal limiting in any of the above cases. This is due to the relatively large power dissipation [(VIN – VOUT) × IOS] driving the junction temperature up. The device turns off when the junction temperature exceeds 135°C (minimum) while in current limit. The device remains off until the junction temperature cools 20°C and then restarts. There are two kinds of current limit profiles typically available in TI switch products that are similar to the TPS20xxC and TPS20xxC-2. Many older designs have an output I vs V characteristic similar to the plot labeled Current Limit with Peaking in Figure 22. This type of limiting can be characterized by two parameters, the current limit corner (IOC), and the short circuit current (IOS). IOC is often specified as a maximum value. The TPS20xxC and TPS20xxC-2 family of parts does not present noticeable peaking in the current limit, corresponding to the characteristic labeled Flat Current Limit in Figure 22. This is why the IOC parameter is not present in Electrical Characteristics: –40°C ≤ TJ ≤ 125°C.

Figure 22. Current Limit Profiles

8.3.5 FLT

as the ripple drives the TPS20xxC and TPS20xxC-2 in and out of current limit. 2 are disabled or in undervoltage lockout (UVLO).

8.3.6 Output Discharge

an external loadings when the device is in ULVO or disabled.

8.4 Device Functional Modes

There are no other functional modes.

9 Application and Implementation

validate and test their design implementation to confirm system functionality.

9.1 Application Information

9.2 Typical Application

Figure 23. Typical Application Schematic

9.2.1 Design Requirements

  1. The TPS2065CDGN operates from a 5-V to ±0.5-V input rail.
  2. What is the normal operation current, for example, the maximum allowable current drawn by portable

device, target 1-A continuous output current application.

  1. What is the maximum allowable current provided by up-stream power, the maximum current limit of power

encountered at the output of power switch. For the TPS2065C device, the maximum IOS is 1.8 A.

9.2.2 Detailed Design Procedure

  1. Normal input operation voltage
  2. Output continuous current
  3. Maximum up-stream power supply output current

9.2.2.1 Input and Output Capacitance

capacitor between IN and GND, as close to the device as possible for local noise decoupling.

bus. Momentary input transients to 6.5 V are permitted.

9.2.3 Application Curves

Figure 24. TPS2065C Output Rise / Fall 5 Ω Figure 25. TPS2065C Output Rise / Fall 100 Ω

Figure 38. TPS2051C Pulsed Output Short Figure 39. TPS2069C Turnon into 3.3 Ω Figure 40. TPS2069C Enable into Short Figure 41. TPS2069C Pulsed Output Short

10 Power Supply Recommendations

of the power supply should exceed the maximum current limit of the power switch.

11 Layout

11.1 Layout Guidelines

  1. Place the 100-nF bypass capacitor near the IN and GND pins, and make the connections using a low
  2. Place at least 10-µF low ESR ceramic capacitor near the OUT and GND pins, and make the connections

using a low inductance trace.

  1. The PowerPAD must be directly connected to PCB ground plane using wide and short copper trace.

11.2 Layout Example

Figure 42. Recommended Layout

11.3 Power Dissipation and Junction Temperature

the effects of adjacent heat sources, and enhanced or restricted air flow. construction (2 signal and 2 plane) with 4, 1-oz. copper weight, layers. values may be used in Equation 1 to determine the maximum junction temperature.

TPS2000C,TPS2001C,TPS2041C,TPS2051C,TPS2061C TPS2065C,TPS2065C-2,TPS2068C,TPS2069C,TPS2069C-2 SLVSAU6H –JUNE 2011–REVISED APRIL 2016 www.ti.com Product Folder Links: TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 Submit Documentation Feedback Copyright © 2011–2016, Texas Instruments Incorporated Power Dissipation and Junction Temperature (continued) TJ = TA + ((IOUT 2 × RDS(ON)) × θJA) where

  • IOUT = rated OUT pin current (A)
  • RDS(ON) = Power switch ON-resistance at an assumed TJ (Ω)
  • TA = Maximum ambient temperature (°C)
  • TJ = Maximum junction temperature (°C)
  • θJA = Thermal resistance (°C/W) (1) If the calculated TJ is substantially different from the original assumption, estimate a new value of RDS(ON) using the typical characteristic plot and recalculate. If the resulting TJ is not less than 125°C, try a PCB construction or a package with lower θJA.

12 Device and Documentation Support

12.1 Related Links

resources, tools and software, and quick access to sample or buy. Table 1. Related Links

12.2 Community Resources

solve problems with fellow engineers. contact information for technical support.

12.3 Trademarks

PowerPAD, E2E are trademarks of Texas Instruments. All other trademarks are the property of their respective owners.

12.4 Electrostatic Discharge Caution

during storage or handling to prevent electrostatic damage to the MOS gates.

12.5 Glossary

This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 15-Nov-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) 905X0205100 Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 VBYQ TPS2000CDGK Active Production VSSOP (DGK) | 8 80 | TUBE Yes NIPDAUAG | SN Level-2-260C-1 YEAR -40 to 125 PXFI TPS2000CDGK.B Active Production VSSOP (DGK) | 8 80 | TUBE Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PXFI TPS2000CDGKR Active Production VSSOP (DGK) | 8 2500 | LARGE T&R Yes NIPDAU | SN | NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PXFI TPS2000CDGKR.B Active Production VSSOP (DGK) | 8 2500 | LARGE T&R Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PXFI TPS2000CDGN Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAU | NIPDAUAG Level-2-260C-1 YEAR -40 to 125 BCMS TPS2000CDGN.A Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 BCMS TPS2000CDGN.B Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 BCMS TPS2000CDGNR Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAU | NIPDAUAG Level-2-260C-1 YEAR -40 to 125 BCMS TPS2000CDGNR.A Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 BCMS TPS2000CDGNR.B Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 BCMS TPS2001CDGK Active Production VSSOP (DGK) | 8 80 | TUBE Yes NIPDAUAG | SN Level-2-260C-1 YEAR -40 to 125 PXGI TPS2001CDGK.B Active Production VSSOP (DGK) | 8 80 | TUBE Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PXGI TPS2001CDGKR Active Production VSSOP (DGK) | 8 2500 | LARGE T&R Yes NIPDAU | SN | NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PXGI TPS2001CDGKR.B Active Production VSSOP (DGK) | 8 2500 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PXGI TPS2001CDGN Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAU | NIPDAUAG Level-2-260C-1 YEAR -40 to 125 VBWQ TPS2001CDGN.A Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VBWQ TPS2001CDGN.B Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VBWQ TPS2001CDGNR Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAU | NIPDAUAG Level-2-260C-1 YEAR -40 to 125 VBWQ TPS2001CDGNR.A Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VBWQ TPS2001CDGNR.B Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VBWQ TPS2041CDBVR Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 PYJI TPS2041CDBVR.A Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PYJI TPS2041CDBVR.B Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PYJI TPS2041CDBVRG4 Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PYJI TPS2041CDBVRG4.A Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PYJI TPS2041CDBVRG4.B Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PYJI TPS2041CDBVT Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 PYJI Addendum-Page 1

www.ti.com 15-Nov-2025 Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TPS2041CDBVT.A Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PYJI TPS2041CDBVT.B Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PYJI TPS2051CDBVR Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 VBYQ TPS2051CDBVR.A Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VBYQ TPS2051CDBVR.B Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VBYQ TPS2051CDBVRG4 Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VBYQ TPS2051CDBVRG4.A Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VBYQ TPS2051CDBVRG4.B Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VBYQ TPS2051CDBVT Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 VBYQ TPS2051CDBVT.A Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes SN Level-2-260C-1 YEAR -40 to 125 VBYQ TPS2051CDBVT.B Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes SN Level-2-260C-1 YEAR -40 to 125 VBYQ TPS2061CDBVR Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PXLI TPS2061CDBVR.A Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PXLI TPS2061CDBVR.B Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PXLI TPS2061CDBVRG4 Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PXLI TPS2061CDBVRG4.A Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PXLI TPS2061CDBVRG4.B Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PXLI TPS2061CDBVT Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 PXLI TPS2061CDBVT.A Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PXLI TPS2061CDBVT.B Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PXLI TPS2061CDGN Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PXMI TPS2061CDGN.A Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PXMI TPS2061CDGN.B Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PXMI TPS2061CDGNR Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PXMI TPS2061CDGNR.A Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PXMI TPS2061CDGNR.B Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PXMI TPS2065CDBVR Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VCAQ TPS2065CDBVR-2 Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PYQI TPS2065CDBVR-2.A Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PYQI TPS2065CDBVR.A Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VCAQ TPS2065CDBVR.B Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VCAQ Addendum-Page 2

www.ti.com 15-Nov-2025 Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TPS2065CDBVRG4 Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VCAQ TPS2065CDBVRG4.A Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VCAQ TPS2065CDBVRG4.B Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VCAQ TPS2065CDBVT Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VCAQ TPS2065CDBVT-2 Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 PYQI TPS2065CDBVT-2.A Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PYQI TPS2065CDBVT.A Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VCAQ TPS2065CDBVT.B Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VCAQ TPS2065CDGN Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAU | NIPDAUAG Level-2-260C-1 YEAR -40 to 125 VCAQ TPS2065CDGN-2 Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PYRI TPS2065CDGN-2.A Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PYRI TPS2065CDGN.A Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VCAQ TPS2065CDGN.B Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VCAQ TPS2065CDGNR Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAU | NIPDAUAG Level-2-260C-1 YEAR -40 to 125 VCAQ TPS2065CDGNR-2 Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PYRI TPS2065CDGNR-2.A Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PYRI TPS2065CDGNR.A Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VCAQ TPS2065CDGNR.B Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VCAQ TPS2068CDGN Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PXNI TPS2068CDGN.A Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PXNI TPS2068CDGN.B Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PXNI TPS2068CDGNR Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PXNI TPS2068CDGNR.A Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PXNI TPS2068CDGNR.B Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PXNI TPS2069CDBVR Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 PYKI TPS2069CDBVR.A Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PYKI TPS2069CDBVR.B Active Production SOT-23 (DBV) | 5 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PYKI TPS2069CDBVT Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes NIPDAU | SN Level-2-260C-1 YEAR -40 to 125 PYKI TPS2069CDBVT.A Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PYKI TPS2069CDBVT.B Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PYKI TPS2069CDBVTG4 Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PYKI Addendum-Page 3

www.ti.com 15-Nov-2025 Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TPS2069CDBVTG4.A Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PYKI TPS2069CDBVTG4.B Active Production SOT-23 (DBV) | 5 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 PYKI TPS2069CDGN Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAU | NIPDAUAG Level-2-260C-1 YEAR -40 to 125 VBUQ TPS2069CDGN-2 Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PYSI TPS2069CDGN-2.A Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PYSI TPS2069CDGN.A Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VBUQ TPS2069CDGN.B Active Production HVSSOP (DGN) | 8 80 | TUBE Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VBUQ TPS2069CDGNR Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAU | NIPDAUAG Level-2-260C-1 YEAR -40 to 125 VBUQ TPS2069CDGNR-2 Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PYSI TPS2069CDGNR-2.A Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAUAG Level-2-260C-1 YEAR -40 to 125 PYSI TPS2069CDGNR.A Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VBUQ TPS2069CDGNR.B Active Production HVSSOP (DGN) | 8 2500 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 VBUQ (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Addendum-Page 4

www.ti.com 15-Nov-2025 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 5

PACKAGE MATERIALS INFORMATION www.ti.com 25-Jul-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 25-Jul-2025 Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 25-Jul-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS2000CDGKR VSSOP DGK 8 2500 353.0 353.0 32.0 TPS2000CDGNR HVSSOP DGN 8 2500 360.0 162.0 98.0 TPS2001CDGKR VSSOP DGK 8 2500 353.0 353.0 32.0 TPS2001CDGNR HVSSOP DGN 8 2500 360.0 162.0 98.0 TPS2001CDGNR HVSSOP DGN 8 2500 370.0 355.0 55.0 TPS2041CDBVR SOT-23 DBV 5 3000 210.0 185.0 35.0 TPS2041CDBVR SOT-23 DBV 5 3000 210.0 185.0 35.0 TPS2041CDBVRG4 SOT-23 DBV 5 3000 210.0 185.0 35.0 TPS2041CDBVT SOT-23 DBV 5 250 210.0 185.0 35.0 TPS2051CDBVR SOT-23 DBV 5 3000 210.0 185.0 35.0 TPS2051CDBVR SOT-23 DBV 5 3000 210.0 185.0 35.0 TPS2051CDBVRG4 SOT-23 DBV 5 3000 210.0 185.0 35.0 TPS2051CDBVRG4 SOT-23 DBV 5 3000 210.0 185.0 35.0 TPS2051CDBVT SOT-23 DBV 5 250 210.0 185.0 35.0 TPS2061CDBVR SOT-23 DBV 5 3000 210.0 185.0 35.0 TPS2061CDBVR SOT-23 DBV 5 3000 210.0 185.0 35.0 TPS2061CDBVRG4 SOT-23 DBV 5 3000 210.0 185.0 35.0 TPS2061CDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 Pack Materials-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 25-Jul-2025 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS2061CDBVT SOT-23 DBV 5 250 210.0 185.0 35.0 TPS2061CDGNR HVSSOP DGN 8 2500 366.0 364.0 50.0 TPS2065CDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS2065CDBVR-2 SOT-23 DBV 5 3000 210.0 185.0 35.0 TPS2065CDBVR-2 SOT-23 DBV 5 3000 210.0 185.0 35.0 TPS2065CDBVRG4 SOT-23 DBV 5 3000 180.0 180.0 18.0 TPS2065CDBVT SOT-23 DBV 5 250 180.0 180.0 18.0 TPS2065CDBVT-2 SOT-23 DBV 5 250 210.0 185.0 35.0 TPS2065CDBVT-2 SOT-23 DBV 5 250 180.0 180.0 18.0 TPS2065CDGNR HVSSOP DGN 8 2500 360.0 162.0 98.0 TPS2065CDGNR-2 HVSSOP DGN 8 2500 366.0 364.0 50.0 TPS2068CDGNR HVSSOP DGN 8 2500 366.0 364.0 50.0 TPS2069CDBVR SOT-23 DBV 5 3000 210.0 185.0 35.0 TPS2069CDBVT SOT-23 DBV 5 250 210.0 185.0 35.0 TPS2069CDBVTG4 SOT-23 DBV 5 250 210.0 185.0 35.0 TPS2069CDGNR HVSSOP DGN 8 2500 370.0 355.0 55.0 TPS2069CDGNR HVSSOP DGN 8 2500 366.0 364.0 50.0 TPS2069CDGNR-2 HVSSOP DGN 8 2500 366.0 364.0 50.0 Pack Materials-Page 4

PACKAGE MATERIALS INFORMATION www.ti.com 25-Jul-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) TPS2000CDGK DGK VSSOP 8 80 330 6.55 500 2.88 TPS2000CDGK.B DGK VSSOP 8 80 330 6.55 500 2.88 TPS2000CDGN DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2000CDGN DGN HVSSOP 8 80 322 6.55 1000 3.01 TPS2000CDGN.A DGN HVSSOP 8 80 322 6.55 1000 3.01 TPS2000CDGN.A DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2000CDGN.B DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2000CDGN.B DGN HVSSOP 8 80 322 6.55 1000 3.01 TPS2001CDGK DGK VSSOP 8 80 330 6.55 500 2.88 TPS2001CDGK.B DGK VSSOP 8 80 330 6.55 500 2.88 TPS2001CDGN DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2001CDGN DGN HVSSOP 8 80 322 6.55 1000 3.01 TPS2001CDGN.A DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2001CDGN.A DGN HVSSOP 8 80 322 6.55 1000 3.01 TPS2001CDGN.B DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2001CDGN.B DGN HVSSOP 8 80 322 6.55 1000 3.01 TPS2061CDGN DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2061CDGN.A DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2061CDGN.B DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2065CDGN DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2065CDGN DGN HVSSOP 8 80 322 6.55 1000 3.01 TPS2065CDGN-2 DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2065CDGN-2.A DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2065CDGN.A DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2065CDGN.A DGN HVSSOP 8 80 322 6.55 1000 3.01 TPS2065CDGN.B DGN HVSSOP 8 80 322 6.55 1000 3.01 TPS2065CDGN.B DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2068CDGN DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2068CDGN.A DGN HVSSOP 8 80 330 6.55 500 2.88 Pack Materials-Page 5

PACKAGE MATERIALS INFORMATION www.ti.com 25-Jul-2025 Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) TPS2068CDGN.B DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2069CDGN DGN HVSSOP 8 80 322 6.55 1000 3.01 TPS2069CDGN DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2069CDGN-2 DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2069CDGN-2.A DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2069CDGN.A DGN HVSSOP 8 80 330 6.55 500 2.88 TPS2069CDGN.A DGN HVSSOP 8 80 322 6.55 1000 3.01 TPS2069CDGN.B DGN HVSSOP 8 80 322 6.55 1000 3.01 TPS2069CDGN.B DGN HVSSOP 8 80 330 6.55 500 2.88 Pack Materials-Page 6

www.ti.com GENERIC PACKAGE VIEW This image is a representation of the package family, actual package may vary. Refer to the product data sheet for package details. PowerPAD HVSSOP - 1.1 mm max heightDGN 8 SMALL OUTLINE PACKAGE3 x 3, 0.65 mm pitch 4225482/B TM

www.ti.com PACKAGE OUTLINE C 6X 0.65 1.95 8X 0.37 0.26 5.05

4.75 TYP

0.15 0.05 0.25 GAGE PLANE 0 -8

1.1 MAX

0.23 0.13 1.60 1.34 1.92 1.66 B 3.1 2.9 NOTE 4 A 3.1 2.9 NOTE 3 0.7 0.4 HVSSOP - 1.1 mm max heightDGN0008C SMALL OUTLINE PACKAGE 4218838/A 11/2017

0.1 C A B

0.1 C NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-187. A 20 DETAIL A TYPICAL SCALE 4.000 EXPOSED THERMAL PAD

www.ti.com EXAMPLE BOARD LAYOUT

0.05 MAX

0.05 MIN

8X (1.4) 8X (0.45) 6X (0.65) (4.4) (R0.05) TYP (2) NOTE 9 (3) NOTE 9 (1.1) (0.55) ( 0.2) TYP VIA (1.6) (1.92) HVSSOP - 1.1 mm max heightDGN0008C SMALL OUTLINE PACKAGE 4218838/A 11/2017 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. 9. Size of metal pad may vary due to creepage requirement. LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 15X SYMM SYMM 4 5 SOLDER MASK DEFINED PAD METAL COVERED BY SOLDER MASK SEE DETAILS 15.000 METALSOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METALEXPOSED METAL SOLDER MASK DETAILS NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN 8X (1.4) 8X (0.45) 6X (0.65) (4.4) (R0.05) TYP (1.6) BASED ON

0.125 THICK

(1.92) BASED ON HVSSOP - 1.1 mm max heightDGN0008C SMALL OUTLINE PACKAGE 4218838/A 11/2017 1.35 X 1.620.175 1.46 X 1.750.15 1.60 X 1.92 (SHOWN)0.125 1.79 X 2.150.1 SOLDER STENCIL OPENING STENCIL THICKNESS NOTES: (continued) 10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 11. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE EXPOSED PAD 9: 100% PRINTED SOLDER COVERAGE BY AREA SCALE: 15X SYMM SYMM 4 5 METAL COVERED BY SOLDER MASK SEE TABLE FOR DIFFERENT OPENINGS FOR OTHER STENCIL THICKNESSES

www.ti.com PACKAGE OUTLINE C 6X 0.65 1.95 8X 0.38 0.25 5.05 0.15 0.05 0.25 GAGE PLANE 0 -8 0.23 0.13 1.846 1.646 2.15 1.95 B 3.1 2.9 NOTE 4 A 3.1 2.9 NOTE 3 0.7 0.4 PowerPAD HVSSOP - 1.1 mm max heightDGN0008G SMALL OUTLINE PACKAGE 4225480/C 11/2024

0.13 C A B

0.1 C NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-187. PowerPAD is a trademark of Texas Instruments. TM A 20 DETAIL A TYPICAL SCALE 4.000 EXPOSED THERMAL PAD

www.ti.com EXAMPLE BOARD LAYOUT 8X (1.4) 8X (0.45) 6X (0.65) (4.4) (R0.05) TYP (2) NOTE 9 (3) NOTE 9 (1.22) (0.55) ( 0.2) TYP VIA (1.57) (1.89) PowerPAD HVSSOP - 1.1 mm max heightDGN0008G SMALL OUTLINE PACKAGE 4225480/C 11/2024 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. 9. Size of metal pad may vary due to creepage requirement. TM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 15X SYMM SYMM SOLDER MASK DEFINED PAD METAL COVERED BY SOLDER MASK SEE DETAILS 15.000 METALSOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METALEXPOSED METAL SOLDER MASK DETAILS NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN 8X (1.4) 8X (0.45) 6X (0.65) (4.4) (R0.05) TYP (1.57) BASED ON (1.89) BASED ON PowerPAD HVSSOP - 1.1 mm max heightDGN0008G SMALL OUTLINE PACKAGE 4225480/C 11/2024 1.33 X 1.600.175 1.43 X 1.730.15 1.57 X 1.89 (SHOWN)0.125 1.76 X 2.110.1 SOLDER STENCIL OPENING STENCIL THICKNESS NOTES: (continued) 10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 11. Board assembly site may have different recommendations for stencil design. TM SOLDER PASTE EXAMPLE EXPOSED PAD 9: 100% PRINTED SOLDER COVERAGE BY AREA SCALE: 15X SYMM SYMM 4 5 METAL COVERED BY SOLDER MASK SEE TABLE FOR DIFFERENT OPENINGS FOR OTHER STENCIL THICKNESSES

www.ti.com PACKAGE OUTLINE C 0.22

0.08 TYP

0.25 3.0 2.6 2X 0.95 1.9 1.45 0.90 0.15

0.00 TYP

5X 0.5 0.3 0.6

0.3 TYP

0 TYP

1.9 (0.1) (0.15) 4X 0 -15 4X 4 -15 A 3.05 2.75 B1.75 1.45 (1.1) SOT-23 - 1.45 mm max heightDBV0005A SMALL OUTLINE TRANSISTOR 4214839/K 08/2024 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.25 mm per side. 5. Support pin may differ or may not be present.

0.2 C A B

0.1 C SCALE 4.000

www.ti.com EXAMPLE BOARD LAYOUT

0.07 MAX

0.07 MIN

5X (1.1) 5X (0.6) (2.6) (1.9) 2X (0.95) (R0.05) TYP 4214839/K 08/2024 SOT-23 - 1.45 mm max heightDBV0005A SMALL OUTLINE TRANSISTOR NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X PKG 3 4 SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL METALSOLDER MASK OPENING NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DETAILS EXPOSED METAL

www.ti.com EXAMPLE STENCIL DESIGN (2.6) (1.9) 2X(0.95) 5X (1.1) 5X (0.6) (R0.05) TYP SOT-23 - 1.45 mm max heightDBV0005A SMALL OUTLINE TRANSISTOR 4214839/K 08/2024 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X SYMM PKG 3 4

www.ti.com PACKAGE OUTLINE C 6X 0.65 1.95 8X 0.38 0.25 5.05 0.15 0.05 0.25 GAGE PLANE 0 -8 0.23 0.13 B 3.1 2.9 NOTE 4 A 3.1 2.9 NOTE 3 0.7 0.4 VSSOP - 1.1 mm max heightDGK0008A SMALL OUTLINE PACKAGE 4214862/A 04/2023 0.1 C NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-187. PowerPAD is a trademark of Texas Instruments. A 20 DETAIL A TYPICAL SCALE 4.000

www.ti.com EXAMPLE BOARD LAYOUT 8X (1.4) 8X (0.45) 6X (0.65) (4.4) (R0.05) TYP VSSOP - 1.1 mm max heightDGK0008A SMALL OUTLINE PACKAGE 4214862/A 04/2023 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. 9. Size of metal pad may vary due to creepage requirement. TM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 15X SYMM SYMM SEE DETAILS 15.000 METALSOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METALEXPOSED METAL SOLDER MASK DETAILS NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN 8X (1.4) 8X (0.45) 6X (0.65) (4.4) (R0.05) TYP VSSOP - 1.1 mm max heightDGK0008A SMALL OUTLINE PACKAGE 4214862/A 04/2023 NOTES: (continued) 11. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 12. Board assembly site may have different recommendations for stencil design. TM SOLDER PASTE EXAMPLE SCALE: 15X SYMM SYMM

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