TPL9201PWP

TPL9201 TI | Alldatasheet

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N□OR□PWP□PACKAGE (TOP□VIEW) DESCRIPTION/ORDERING INFORMATION TPL9201 MICROCONTROLLER POWER SUPPLY AND MULTIPLE LOW-SIDE DRIVER SLIS123A JUNE 2006 REVISED JUNE 2006 Electrical Appliances Eight Low-Side Drivers With Internal Clamp for Inductive Loads and Current Limiting for Air Conditioning Units Self Protection Ranges Seven Outputs Rated at 150 mA and Dishwashers Controlled Through Serial Interface Refrigerators One Output Rated at 150 mA and Microwaves Controlled Through Serial Interface and Washing Machines Dedicated Enable Pin General-Purpose Interface Circuits, Allowing 5-V Regulated Power Supply With Microcontroller Interface to Relays, Electric Motors, LEDs, and Buzzers 200-mA Load Capability at V IN Max of V Internal Voltage Supervisory for Regulated Output Serial Communications for Control of Eight Low-Side Drivers Enable/Disable Input for OUT1 5-V or 3.3-V I/O Tolerant for Interface to Microcontroller Programmable Power-On Reset Delay Before RST Asserted High, Once V Is Within Specified Range ms Typ) Programmable Deglitch Timer Before RST Is Asserted Low (40 µ s Typ) Zero-Voltage Detection Signal With Built-In Filter of µ s Thermal Shutdown for Self Protection The power supply provides regulated 5-V output to power the system microcontroller and drive eight low-side switches. The AC zero-detect circuitry is monitoring the crossover voltage of the mains AC supply. The resultant signal is a low-frequency clock output on the ZVS terminal, based on the AC-line cycle. This information allows the microcontroller to reduce in-rush current by powering loads on the AC-line peak voltage. A serial communications interface controls the eight low-side outputs; each output has an internal snubber circuit to absorb the energy in the inductor at turn OFF. Alternatively, the system can use a fly-back diode to V IN to help recirculate the energy in an inductive load at turn OFF. ORDERING INFORMATION T A PACKAGE ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP N Tube of TPL9201N TPL9201 C to 125 C Reel of 2000 TPL9201PWPR PowerPAD PWP IC9201 Tube of TPL9201PWP Please be aware that an important notice concerning availability, standard warranty, and use in critical sheet. PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright 2006, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

www.ti.com TPL9201 MICROCONTROLLER POWER SUPPLY AND MULTIPLE LOW-SIDE DRIVER SLIS123A JUNE 2006 REVISED JUNE 2006 PINOUT CONFIGURATION NO. NAME I/O

DESCRIPTION

O Zero-voltage synchronization OUT1 O Low-side output OUT2 O Low-side output OUT3 O Low-side output OUT4 O Low-side output OUT5 O Low-side output OUT6 O Low-side output OUT7 O Low-side output OUT8 O Low-side output (1) GND I Ground (1) GND I Ground EN1 I Enable/disable for OUT1 R DELAY O Power-up reset delay (2) RST I/O Power-on reset output (open drain, active low) MOSI I Serial data input NCS I Chip select SCLK I Serial clock for data synchronization OUT O Regulated output V IN I Unregulated input voltage source SYN I AC zero detect input (1) Terminals and are fused internally in the lead frame for the 20-pin PDIP package. (2) Terminal can be used as an input or an output. Submit Documentation Feedback

www.ti.com OUT1□at 150□mA OUT2□at□150□mA OUT3□at□150□mA OUT4□at□150□mA OUT5□at□150□mA OUT6□at□150□mA OUT7□at□150□mA OUT8□at□150□mA Gate□Drive and□Control Voltage Supervisor Comp Bandgap Ref Vref Vref Gate□Control for□Outputs 1□Through□8 500□kΩ 100□kΩ 25□kΩ S R Q 20- s□Filterμ EN1 NCS SCLK MOSI 7–18□V SYN RDELAY ZVS 5VOUT 5□V 5□kΩ RST RDELAY ZVS OUT8 OUT8 OUT7 OUT7 OUT6 OUT6 OUT5 OUT5 OUT4 OUT4 OUT3 OUT3 OUT2 OUT2 OUT1 OUT1 Enable NCS SCLK MOSI VIN SYN 10□kΩ Serial Register Parallel Register Enables OUT1 GND GND 10□V Iconst PMOS Optional,□dependent on□heat-management implementation (see□Note A) RST (2□W) /c87 100□k/c87 100□k/c87 100□k/c87 100□k/c87 6□V 6□V TPL9201 MICROCONTROLLER POWER SUPPLY AND MULTIPLE LOW-SIDE DRIVER SLIS123A JUNE 2006 REVISED JUNE 2006 FUNCTIONAL BLOCK DIAGRAM The resistor and Zener diode are required if there is insufficient thermal-management allocation. Submit Documentation Feedback

www.ti.com DETAILED V IN and the regulated output is within V over the operating conditions. The open-drain power-on reset RST pin remains low until the regulator exceeds the set threshold, and the timer value set by the capacitor on the reset delay DELAY pin expires. If both of these conditions are satisfied, RST is asserted high. This signifies to the microcontroller that serial communications can be initiated to the TPL9201. The serial communications is an 8-bit format, with data transfer synchronized using a serial clock from the microcontroller. A single register controls all the outputs (one bit per output). The default value is zero (OFF). If an output requires pulse width modulation (PWM) function, the register must be updated at a rate faster than the desired PWM frequency. OUT1 can be controlled by serial input from the microcontroller or with the dedicated enable (EN1) pin. If EN1 is pulled low or left open, the serial input through the shift register controls OUT1. If EN1 is pulled high, OUT1 always is turned on, and the serial input for OUT1 is ignored. The SYN input translates the image of the mains voltage through the secondary of the transformer. The SYN input has a resistor to protect from high currents into the IC. The zero-voltage synchronization output translates the AC-line cycle frequency into a low-frequency clock, which can be used for a timing reference and to help power loads on the AC-line peak voltage (to reduce in-rush currents). If RST is asserted, all outputs are turned OFF internally, and the input register is reset to all zeroes. The microcontroller must write to the register to turn the outputs ON again. Submit Documentation Feedback

www.ti.com Absolute Maximum Ratings (1) Dissipation Ratings Recommended Operating Conditions TPL9201 MICROCONTROLLER POWER SUPPLY AND MULTIPLE LOW-SIDE DRIVER SLIS123A JUNE 2006 REVISED JUNE 2006 MIN MAX UNIT V IN V I(unreg) Unregulated input voltage (2) (3) V SYN EN1, MOSI, SCLK, and NCS V I(logic) Logic input voltage (2) (3) V RST and R DELAY V O Low-side output voltage OUT1 OUT8 16.5 V OUTn ON and shorted to V IN I LIMIT Output current limit (4) 350 mA with low impedance N package θ JA Thermal impedance, junction to ambient (5) C/W PWP package N package θ JC Thermal impedance, junction to case (5) C/W PWP package θ JP Thermal impedance, junction to thermal pad (5) PWP package 1.4 C/W N package 1.8 P D Continuous power dissipation (6) W PWP package 3.7 ESD Electrostatic discharge (7) kV T A Operating ambient temperature range 125 C T stg Storage temperature range 125 C T lead Lead temperature Soldering, s 260 C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to GND. (3) Absolute negative voltage on these pins must not go below 0.5 (4) Not more than one output should be shorted at a time, and duration of the short circuit should not exceed ms. (5) The thermal data is based on using 1-oz copper trace with JEDEC 51-5 test board for PWP and JEDEC 51-7 test board for (6) The data is based on ambient temperature of C max. (7) The Human-Body Model is a 100-pF capacitor discharged through a 1.5-k Ω resistor into each pin. T A C DERATING FACTOR T A 125 C PACKAGE POWER RATING ABOVE T A C POWER RATING N 1812 mW 14.5 mW/ C 362 mW PWP 3787 mW 30.3 mW/ C 757 mW MIN MAX UNIT V IN V I(unreg) Unregulated input voltage V SYN V I(logic) Logic input voltage EN1, MOSI, SCLK, NCS, RST and R DELAY 5.25 V T A Operating ambient temperature 125 C Submit Documentation Feedback

www.ti.com Electrical Characteristics TPL9201 MICROCONTROLLER POWER SUPPLY AND MULTIPLE LOW-SIDE DRIVER SLIS123A JUNE 2006 REVISED JUNE 2006 T A C to 125 V IN V to V (unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT Supply Voltage and Current V IN (2) Input voltage V Enable ON, OUT1 OUT8 OFF I VIN Input supply current mA Enable ON, OUT1 OUT8 ON Logic Inputs (MOSI, NCS, SCLK, and EN1) V IL Logic input low level I IL 100 µ A 0.8 V V IH Logic input high level I IL 100 µ A 2.4 Reset RST V OL Logic level output I OL 1.6 mA 0.4 V V OH (3) Logic level output 5-k Ω pullup to V CC V CC 0.8 V V H Disabling reset threshold 5-V regulator ramps up 4.25 4.5 V V L Enabling reset threshold 5-V regulator ramps down 3.3 3.75 V V HYS Threshold hysteresis 0.12 0.5 V Reset Delay DELAY I OUT Output current µ A T DW Reset delay timer C nF ms T UP Reset capacitor to low level C nF µ s Output (OUT1 OUT8) V OL Output ON I OUTn 150 mA 0.4 0.7 V I OH Output leakage V OH Max of 16.5 V µ A Regulator Output (5V OUT I 5VOUT mA to 200 mA, V IN V to OUT Output supply 4.75 5.25 V C 5VOUT µ F I 5VOUT limit Output short-circuit current OUT V 200 mA Thermal Shutdown T SD Thermal shutdown 150 C T HYS Hysteresis C Zero Voltage Synchronization (ZVS) V SYNTH Transition threshold 0.4 0.75 1.1 V I SYN Input activating current R ZV k Ω V SYN V mA t D Transition filtering time Rising and falling µ s (1) All typical values are at T A (2) There are external high-frequency noise-suppression capacitors and filter capacitors on V IN (3) V CC is the pullup resistor voltage. Submit Documentation Feedback

www.ti.com Output Control Register ENABLE TRUTH TABLE TPL9201 MICROCONTROLLER POWER SUPPLY AND MULTIPLE LOW-SIDE DRIVER SLIS123A JUNE 2006 REVISED JUNE 2006 MSB LSB IN8 IN7 IN6 IN5 IN4 IN3 IN2 IN1 INn Output OFF INn Output ON To operate the output in PWM mode, the output control register must be updated at a rate twice the desired PWM frequency of the output. Maximum PWM frequency is kHz. The register is updated every 100 µ SERIAL INPUT EN1 OUT1 FOR OUT1 Open H On Open L Off L H On L L Off H H On H L On Submit Documentation Feedback

www.ti.com Serial Communications Interface IN1 LSB IN7 IN6 IN5 IN4 IN3 IN2IN8 MSB XXX T1 T5 NCS SCLK MOSI 1 2 3 4 5 6 7 8 TPL9201 MICROCONTROLLER POWER SUPPLY AND MULTIPLE LOW-SIDE DRIVER SLIS123A JUNE 2006 REVISED JUNE 2006 The serial communications is an 8-bit format, with data transfer synchronized using a serial clock from the microcontroller (see Figure A single register controls all the outputs. The signal gives the instruction to control the output of TPL9201. The NCS signal enables the SCLK and MOSI data when it is low. After NCS is set low for T synchronization clock and data begin to transmit and, after the 8-bit data has been transmitted, NCS is set high again to disable SCLK and MOSI and transfer the serial data to the control register. SCLK must be held low when NCS is in the high state. Figure Serial Communications Submit Documentation Feedback

www.ti.com Timing Requirements Reset Delay DELAY TPL9201 MICROCONTROLLER POWER SUPPLY AND MULTIPLE LOW-SIDE DRIVER SLIS123A JUNE 2006 REVISED JUNE 2006 T A C to 125 V IN V to V (unless otherwise stated) PARAMETER MIN TYP MAX UNIT f SPI SPI frequency kHz Delay time, NCS falling edge to SCLK rising edge ns Delay time, NCS falling edge to SCLK falling edge ns Pulse duration, SCLK high ns Pulse duration, SCLK low ns Delay time, last SCLK falling edge to NCS rising edge ns Setup time, MOSI valid before SCLK edge ns Hold time, MOSI valid after SCLK edge ns Time between two words for transmitting 170 ns The R DELAY output provides a constant current source to charge an external capacitor to approximately 6.5 The external capacitor is selected to provide a delay time, based on the current equation for a capacitor, I Δ Δ and a 28- µ A typical output current. Therefore, the user should select a 47-nF capacitor to provide a 6-ms delay at 3.55 I Δ Δ µ A C (3.55 V/6 ms) C nF Submit Documentation Feedback

www.ti.com APPLICATION INFORMATION TPL9201 MCU/DSP MOSI SCLK NCS ZVS RST 5V ±5% at 200 mAOUT EN1 Reset Delay Buzzer Driver Relay Driver Relay Driver Relay Driver Relay Driver Fan Driver Fan Driver Fan Driver

8 Outputs

SYN (AC Zero-Cross Detect Input) DC Input 7 V to 18 V GND ( 2)× FiltersAC Water Supply Valve Water Outlet Softener Supply Driver SYN ZVS 5VOUT RST Power Switch M Zero-Cross Detection Cover Switch T emperature Sensor (Optional) Optical Sensor Water-Level Sensor V olume Sensor Keypad Display (LED/LCD/VFD) Controller Regulator POR/SYS TPL9201 ~ ~ LED LED VIN TPL9201 MICROCONTROLLER POWER SUPPLY AND MULTIPLE LOW-SIDE DRIVER SLIS123A JUNE 2006 REVISED JUNE 2006 Figure Typical Application Figure Washing-Machine Application Submit Documentation Feedback

www.ti.com PCB Layout Application Using a Multilayer PCB Package□Thermal□Pad Solder□Pad□(Land□Pattern) Thermal□Vias Package□Outline Power□Pad Package□Solder□Pad Package□Solder□Pad (Bottom□Trace) Thermal□Via Component□Traces Thermal□Isolation Power□Plane□Only 1.5748□mm 0.0 0.071-mm□Board□Base– and□Bottom□Pad 0.5246 0.5606-mm– Power□Plane (1-oz□Cu) 1.0142 1.0502-mm– Ground□Plane (1-oz□Cu) 1.5038 1.5748-mm– Component□Trace (2-oz□Cu) 2□Plane 4□Plane TPL9201 MICROCONTROLLER POWER SUPPLY AND MULTIPLE LOW-SIDE DRIVER SLIS123A JUNE 2006 REVISED JUNE 2006 APPLICATION INFORMATION (continued) To maximize the efficiency of this package for application on a single-layer or multi-layer PCB, certain guidelines must be followed when laying out this part on the PCB. The following information is to be used as a guideline only. For further information, see the PowerPAD concept implementation document. In a multilayer board application, the thermal vias are the primary method of heat transfer from the package thermal pad to the internal ground plane (see Figure and Figure The efficiency of this method depends on several factors: die area, number of thermal vias, thickness of copper, etc. (see the PowerPAD Thermally Enhanced Package Technical Brief literature number SLMA002 Figure Package and PCB Land Configuration for a Multilayer PCB Figure Multilayer Board (Side View) Submit Documentation Feedback

www.ti.com Application Using a Single-Layer PCB Use□as□Much□Copper Area as□Possible□for□Heat□Spread Package□Thermal□Pad Package□Outline TPL9201 MICROCONTROLLER POWER SUPPLY AND MULTIPLE LOW-SIDE DRIVER SLIS123A JUNE 2006 REVISED JUNE 2006 APPLICATION INFORMATION (continued) In a single-layer board application, the thermal pad is attached to a heat spreader (copper area) by using the low thermal-impedance attachment method (solder paste or thermal-conductive epoxy). With either method, it is advisable to use as much copper trace area as possible to dissipate the heat. CAUTION: If the attachment method is not implemented correctly, the functionality of the product cannot be assured. Power-dissipation capability is adversely affected if the device is incorrectly mounted onto the circuit board. Figure Layout Recommendations for a Single-Layer PCB Submit Documentation Feedback

www.ti.com Recommended Board Layout SMOC□=□Solder□Mask□Over□Copper SMO□=□Solder□Mask□Opening 3,7□SMO 0,65 0,27□( 20)/c180 1,2□( 20) /c180 0,33□( 8) /c180 5,85 6,5□SMOC 6,92 4,52 3,4□SMOC2,4□SMO TPL9201 MICROCONTROLLER POWER SUPPLY AND MULTIPLE LOW-SIDE DRIVER SLIS123A JUNE 2006 REVISED JUNE 2006 APPLICATION INFORMATION (continued) Figure Recommended Board Layout for PWP Submit Documentation Feedback

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