TPIC0107B TI | Alldatasheet
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PWM CONTROL INTELLIGENT H-BRIDGE SLIS067 – NOVEMBER 1998 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068Dedicated PWM Input Port /C0068Optimized for Reversible Operation of Motors /C0068Two Input Control Lines for Reduced Microcontroller Overhead /C0068Internal Current Shutdown of 5 A /C006840 V Load Dump Rating /C0068Integrated Fault Protection and Diagnostics /C0068CMOS Compatible Schmitt Trigger Inputs for High Noise Immunity
description
The TPIC0107B is a PWM control intelligent H-bridge designed specifically for dc motor applications. The device provides forward, reverse, and brake modes of operation. A logic supply voltage of 5 V is internally derived from V CC . The TPIC0107B has an extremely low rDS(on), 280 mΩ typical, to minimize system power dissipation. The direction control (DIR) and PWM control (PWM) inputs greatly simplify the microcontroller overhead requirement. The PWM input can be driven from a dedicated PWM port while the DIR input is driven as a simple low speed toggle. The TPIC0107B provides protection against over-voltage, over-current, over-temperature, and cross conduction faults. Fault diagnostics can be obtained by monitoring the STATUS1 and STATUS2 terminals and the two input control lines. STATUS1 is an open-drain output suitable for wired-or connection. STATUS2 is a push-pull output that provides a latched status output. Under-voltage protection ensures that the outputs, OUT1 and OUT2, will be disabled when V CC is less than the under-voltage detection voltage V(UVCC) . The TPIC0107B is designed using TI’s LinBiCMOS process. LinBiCMOS allows the integration of low power CMOS structures, precision bipolar cells, and low impedance DMOS transistors. The TPIC0107B is offered in a 20-pin thermally enhanced small-outline package (DWP) and is characterized for operation over the operating case temperature of –40°C to 125°C. FUNCTION TABLE DIR PWM OUT1 OUT2 MODE 0 0 HS HS Brake, both HSDs turned on hard 0 1 HS LS Motor turns counter clockwise 1 0 HS HS Brake, both HSDs turned on hard 1 1 LS HS Motor turns clockwise Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. LinBiCMOS is a trademark of Texas Instruments Incorporated. Copyright 1998, Texas Instruments Incorporated GNDS VCC DIR VCC OUT1 OUT1 GND PWM GND GNDS GNDS VCC STATUS2 V CC OUT2 OUT2 GND STATUS1 GND GNDS DWP PACKAGE (TOP VIEW) PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
PWM CONTROL INTELLIGENT H-BRIDGE SLIS067 – NOVEMBER 1998
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Reg. Charge Pump (2 MHz) Over- Current Protection HSD DMOS Driver Open- Circuit Detect Under- Voltage Detection Over- Temperature Detection DMOS Driver Over- Current Protection LSD Over- Voltage Detection DMOS Driver DMOS Driver OUT2 OUT1 DMOS Driver Load-Dump Protection GND PWM DIR STATUS1 STATUS2 VCC Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION DIR 3 I Direction control input GND 7, 9, 12, 14 I Power ground GNDS 1, 10, 11, 20 I Substrate ground OUT1 5, 6 O Half-H output. DMOS output OUT2 15, 16 O Half-H output. DMOS output PWM 8 I PWM control input STATUS1 13 O Status output STATUS2 18 O Latched status output VCC 2, 4, 17, 19 I Supply voltage NOTE: It is mandatory that all four ground terminals plus at least one substrate terminal are connected to the system ground. Use all VCC and OUT terminals.
PWM CONTROL INTELLIGENT H-BRIDGE SLIS067 – NOVEMBER 1998 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 schematics of inputs and outputs STATUS2 STATUS1 DIR/PWM absolute maximum ratings over operating case temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE T A = 25°C TA = 70°C POWER RATING TA = 125°C POWER RATING 25 W –0.2 W/°C 16 W 5 W recommended operating conditions MIN MAX UNIT Supply voltage, VCC 6 18 V Operating case temperature, TC –40 125 °C Switching frequency, fPWM 2 kHz
PWM CONTROL INTELLIGENT H-BRIDGE SLIS067 – NOVEMBER 1998
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electrical characteristics over recommended operating case temperature range and VCC = 5 V to
6 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT LSD TJ = 25°C 550 m Ω rDS( ) Static drain-source on-resistance (per transistor) LSD TJ = 150°C 850 m Ω rDS(on) I(BR) = 1 A HSD TJ = 25°C 600 m ΩHSD TJ = 150°C 870 m Ω I(QCD) Open circuit detection current 10 40 100 mA V(UVCC(OFF)) Under voltage detection on VCC , switch off voltage See Note 1 5 V V(UVCC(ON)) Under voltage detection on VCC , switch on voltage See Note 1 5.2 V V(STL) STATUS low output voltage IO = 100 µA, See Note 1 0.8 V V(ST2H) STATUS2 high output voltage IO = 20 µA, See Note 1 3 5.4 V I(ST(OFF)) STATUS output leakage current V(ST) = 5 V, See Note 1 5 µA VIL Low level logic input voltage –0.3 0.5 V VIH High level logic input voltage 3.6 7 V ΔVI Hysteresis of input voltage 0.3 V IIH High level logic input current VIH = 3.5 V 2 10 50 µA NOTE 1: The device functions according to the function table for VCC between V(UVCC) and 5 V (no parameters specified). STATUS outputs are not defined for VCC less than V(UVCC) .
PWM CONTROL INTELLIGENT H-BRIDGE SLIS067 – NOVEMBER 1998 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating case temperature and supply voltage ranges (unless otherwise noted) (see Note 2) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TJ =2 5°C VCC = 6 V to 9 V 380 LSD TJ = 25°C VCC = 9 V to 18 V 280 340 m ΩLSD TJ = 150°C VCC = 6 V to 9 V 620 m Ω rDS( ) Static drain-source on-resistance TJ = 150°C VCC = 9 V to 18 V 400 560 rDS(on) (per transistor) IBR = 1 A TJ =2 5°C VCC = 6 V to 9 V 430 HSD TJ = 25°C VCC = 9 V to 18 V 280 340 m ΩHSD TJ = 150°C VCC = 6 V to 9 V 640 m Ω TJ = 150°C VCC = 9 V to 18 V 400 560 I(QCD) Open circuit detection current 10 40 100 mA TSDS Static thermal shutdown temperature See Notes 3 and 4 140 °C TSDD Dynamic thermal shutdown temperature See Notes 3 and 5 160 °C ICS Current shutdown limit VCC = 6 V to 9 V 4.8 7.5 AICS C urrent shutdow n limit VCC = 9 V to 18 V 5 7.5 A I(CON) Continuous bridge current TJ = 125°C, Operating lifetime 10,000 hours, (see Figure 1) 3 A V(OVCC) Over voltage detection on VCC 27 36 V V(STL) STATUS low output voltage IO = 100 µA 0.8 V V(ST2H) STATUS2 high output voltage IO = 20 µA 3.9 5.4 V I(ST(OFF)) STATUS output leakage current V(ST) = 5 V 5 µA VIL Low level logic input voltage –0.3 0.8 V VIH High level logic input voltage 3.6 7 V ΔVI Hysteresis of input voltage 0.3 V IIH High level logic input current VIH = 3.5 V 2 10 50 µ/C0065 NOTES: 2. The device functions according to the function table for VCC between 18 V and V(OVCC) , but only up to a maximum supply voltage of 33 V (no parameters specified). Exposure beyond 18 V for extended periods may affect device reliability. 3. Exposure beyond absolute-maximum-rated condition of junction temperature may affect device reliability. 4. No temperature gradient between DMOS transistor and temperature sensor. 5. With temperature gradient between DMOS transistor and temperature sensor in a typical application (DMOS transistor as heat source). switching characteristics over recommended operating case temperature and supply voltage ranges (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT t t( ) High-side driver turn-on time VDS( ) < 1Va t1A VCC =1 32V 100 µstout(on) Low-side driver turn-on time VDS(on)<1 V at 1 A, VCC = 13.2 V 100 µs SR Slew rate, low-to-high sinusoidal (δV/δt) VCC =1 32V IO = 1 A resistive load 1 6 V/µsSR Slew rate, high-to-low sinusoidal (δV/δt) VCC = 13.2 V, IO = 1 A resistive load 1 6 V/µs td(QCD) Under current spike duration to trigger open circuit detection VCC = 5 V to 18 V 1 10 ms td(CS) Delay time for over current shutdown 5 10 25 µs thermal resistance PARAMETER MIN MAX UNIT R θJA Junction-to-ambient thermal resistance 5 °C/W R θJC Junction-to-case thermal resistance 97 °C/W
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Figure 1. Electromigration Reliability Data
2 A 125°C >20,000 h
3 A 125°C >10,000 h
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Figure 4. Over Temperature Figure 5. No Fault
PWM CONTROL INTELLIGENT H-BRIDGE SLIS067 – NOVEMBER 1998 9POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PRINCIPLES OF OPERATION protective functions and diagnostics† over current/short circuit‡ The TPIC0107B detects shorts to VCC , ground, or across the load being driven, by comparing the VDS voltage drop across the DMOS outputs against the threshold voltage. The DMOS outputs of the TPIC0107B will be disabled and the fault flags will be generated 10 µs after an over-current or short-circuit fault is detected. This 10 µs delay is long enough to serve as a de-glitch filter for high current transients, yet short enough to prevent damage to the DMOS outputs. The DMOS outputs remain latched off until either DIR or PWM input is toggled. In cases where the outputs have a continuous short-to-ground with a current rise time faster than 0.5 A/µs, the over-current shutdown threshold will decrease to 3 A to reduce power dissipation. This reduction to 3 A is achieved since the DMOS outputs will not be fully enhanced when the over-current threshold is reached if the current rise time exceeds 0.5 A/µs. Over-current and/or short-circuit protection is provided up to V CC = 16.5 V and a junction temperature of 90°C. over temperature The TPIC0107B disables all DMOS outputs and the fault flags will be set when TJ ≥140°C (min.). The DMOS outputs remain latched off until either DIR or PWM input is toggled. under voltage The TPIC0107B disables all DMOS outputs when VCC ≤V(UVCC) . The outputs will be re-enabled when VCC ≥V(UVCC) . No fault flags are set when under-voltage lockout occurs. over voltage In order to protect the DMOS outputs from damage caused by excessive supply voltage, the TPIC0107B disables all outputs when VCC ≥V(OVCC) . Once VCC ≤V(OVCC) , either DIR or PWM input must be toggled to re-enable the DMOS outputs. cross conduction Monitoring circuitry for each transistor detects whether the particular transistor is active to prevent the HSD or LSD of the corresponding half H-bridge from conducting. open circuit During operation, the bridge current is controlled continuously. If the bridge current is >10 mA (min.) for a period >1 ms (min.), the fault flags are set. However, the output transistors will not be disabled. † All limits mentioned are typical values unless otherwise noted. ‡ If a short circuit occurs (i.e., the over-current detection circuitry is activated) at a supply voltage higher than 16.5 V and a junction temperature higher than 90°C, damage to the device may occur.
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DIAGNOSTICS TABLE (see Note 6) FLAG DIR PWM OUT1 OUT2 STATUS1 † STATUS2 Normal operation HS HS HS LS HS LS HS HS Open circuit between OUT1 and OUT2 HS HS HS LS HS LS HS HS Short circuit from OUT1 to OUT2 (see Notes 7 and 8) 0 X X X X Short circuit from OUT1 to GND (see Notes 7 and 8) X X X X X X Short circuit from OUT2 to GND (see Notes 7 and 8) X X X X X X Short circuit from OUT1 to VCC (see Notes 7 and 8) 1 1 X X 0 0 Short circuit from OUT2 to VCC (see Notes 7 and 8) 0 1 X X 0 0 Over temperature Z Z Z Z Z Z Z Z † When wired with a pull-up resistor SYMBOL VALUE
0 Logic low
1 Logic high
HS High-side MOSFET conducting LS Low-side MOSFET conducting Z No output transistors conducting X Voltage level undefined NOTES: 6. All input combinations not stated result in STATUS output = 1. 7. STATUS1 active for a minimum of 3 µs. 8. STATUS2 active until an input is toggled.
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APPLICATION INFORMATION
† Necessary for isolating supply voltage or interruption (e.g., 47 µF). VCC M CONTROL DIAGNOSTIC Microcontroller DIR PWM STATUS1 STATUS2 GND GNDS OUT1 OUT2 VCC TPIC0107B 100 kΩ 5 V 100 nF 47 µF† NOTE: If a STATUS output is not connected to the appropriate microcontroller input, it shall remain unconnected.
PWM CONTROL INTELLIGENT H-BRIDGE SLIS067 – NOVEMBER 1998 13POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA DWP (R-PDSO-G) PowerPAD PLASTIC SMALL-OUTLINE PACKAGE Gage Plane 0.419 (10,65) 0.400 (10,16) 0.010 (0,25) NOM Thermal Pad (See Note D) 0.010 (0,25) 0.016 (0,40) 0.050 (1,27) Seating Plane 4147575/A 02/98 A 20-PIN SHOWN 0.104 (2,65) MAX 0.293 (7,45) 0.299 (7,59) 0.020 (0,51) 0.014 (0,35) 0.004 (0,10) 0°–8° 0.710 0.510 0.610 0.700 (18,03) (17,78) 0.500 (15,49) (15,24) 0.600 0.410 16DIM PINS (10,41) (10,16) 0.400A MIN A MAX (12,95) (12,70) 0.006 (0,15) 0.002 (0,05) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). D. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. This pad is electrically and thermally connected to the backside of the die and possibly selected leads. PowerPAD is a trademark of Texas Instruments Incorporated.
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