TPI8011N STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

Features

■ Bidirectional triple crowbar protection ■ Peak pulse current: IPP = 30 A , 10/1000 µs ■ Breakdown voltage: – TPI80N: 80 V – TPI120N: 120 V ■ Available in SO-8 package ■ Low dynamic breakover voltage: – TPI8011N: 120 V – TPI12011N: 170 V Benefits ■ Low capacitance from lines to ground, allowing high speed transmission without signal attenuation ■ Good capacitance balance between lines to ensure longitudinal balance ■ Fixed breakdown voltage in both common and differential modes ■ The same surge current capability in both common and differential modes ■ A particular attention has been given to the internal wire bonding. The “4-point” configuration ensures a reliable protection, eliminating overvoltages introduced by the parasitic inductances of the wiring (Ld I/dt), especially for very fast transient overvoltages TM: Trisil is a trademark of STMicroelectronics Complies with following standards ■ CCITT K17-K20 – 10/700 µs, 1.5 kV – 5/310 µs, 38 A ■ VDE 0433 – 10/700 µs, 2 kV – 5/310 µs, 50 A ■ VDE 0878 – 1/20 µs, 40 A ■ IEC 61000-4-2 level 4 – 0.5/700 µs, 1.5 kV – 0.2/310 µs, 38 A

Description

Dedicated devices for ISDN interface and high speed data telecom line protection. Equivalent to a triple Trisil™ with low capacitance. Figure 1. Functional diagram

1 Characteristics

Table 1. Absolute ratings (T amb = 25 °C) Table 2. Thermal resistances Table 3. Electrical characteristics (T amb = 25 °C)

  1. See the reference test circuit 1 ( Figure 5.)
  2. Surge test according to CCITT 1.5 kV, 10/700 µs between Tip or Ring and ground
  3. See functional holding cu rrent test circuit 2 (Figure 6.)

Table 4. Capacitance characteristics Figure 3. Pulse waveform (10/1000 µs) Figure 4. Surge peak current versus overload

Figure 5. Reference test circuit 1 Figure 6. Functional holding current (I H) test circuit 2

220 V / 2 A

220 V / 800 V

1/ Adjust the current level at the IH value by short circuiting the AK of the D.U.T. 2/ Fire the D.U.T. with a surge current ➔ I 10 A, 10/1000 µs. 3/ The D.U.T. will come back off-state within 50 ms maximum.

2 Application information

Figure 7. Application circuit - U interface protection Figure 8. Application circui t - S interface protection negative surges in differential and common mode.

Figure 9. Connections

3 Ordering information scheme

Figure 10. Ordering information scheme

  1. Connect pins 2, 3, 6 and 7 to

4 Package information

  • Epoxy meets UL94, V0 In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.

Figure 11. SO-8 footprint, dimensions in mm (inches) Table 5. SO-8 dimensions

5 Ordering Information

6 Revision history

Table 6. Ordering information

100 Tube

Table 7. Document revision history 02-Aug-2004 4 V BO dyn. (page 2) and capacitances (page 3) values update. 07-Nov-2007 5 Reformatted to current standards. Updated Package information.