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ADVANCE□INFORMATION USB Type-C Connector SSRX1P SSRX1N SSTX1P SSTX1N SSRX2N SSRX2P SSTX2N SSTX2P DMB DPB SBU1 CC2 SBU2 CC1 DPT DMT TPD4E02B04-Q1 TPD4E05U06-Q1 TPD4E05U06-Q1 TPD4E02B04-Q1VBUS VBUS Copyright © 2017, Texas Instruments Incorporated Product Folder Order Now T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. ADVANCE INFORMATION for pre-production products; subject to change without notice. TPD4E02B04-Q1 SLVSDZ2 – JUNE 2017 TPD4E02B04-Q14-ChannelESDProtectionDiodeforUSBType-CandHDMI2.0

1 Features

1• AEC-Q101 Qualified

IEC 61000-4-2 Level 4 ESD Protection – ±12-kV Contact Discharge – ±15-kV Air Gap Discharge
ISO 10605 (330 pF, 330 Ω) ESD Protection – ±8 kV Contact Discharge – ±15-kV Air Gap Discharge
IEC 61000-4-4 EFT Protection – 80 A (5/50 ns)
IEC 61000-4-5 Surge Protection – 2 A (8/20 µs)
IO Capacitance: – 0.25 pF (Typical)
DC Breakdown Voltage: 5.5 V (Minimum)
Ultra Low Leakage Current: 10 nA (Maximum)
Low ESD Clamping Voltage: 8.8 V at 5-A TLP
Supports High Speed Interfaces up to 10 Gbps
Industrial Temperature Range: –40°C to +125°C
Easy Flow-Through Routing Package

2 Applications

End Equipment – Head Unit – Rear Seat Entertainment – Telematics – USB Hub – Cluster – Body Control Module – Media Interface
Interfaces – USB Type-C – USB 3.1 Gen 2 – HDMI 2.0/1.4 – USB 3.0 – DisplayPort 1.3 – Ethernet

3 Description

The TPD4E02B04-Q1 is an automotive-qualified bidirectional TVS ESD protection diode array for USB Type-C and HDMI 2.0 circuit protection. The TPD4E02B04-Q1 is rated to dissipate ESD strikes at the maximum level specified in the IEC 61000-4-2 international standard (Level 4). This device features a 0.25-pF IO capacitance per channel making it ideal for protecting high-speed interfaces up to 10 Gbps such as USB 3.1 Gen2. The low dynamic resistance and low clamping voltage ensure system level protection against transient events. The TPD4E02B04-Q1 is offered in the industry standard USON-10 (DQA) package. The package features flow-through routing and 0.5-mm pin pitch easing implementation and reducing design time. This device is also available without automotive qualification: TPD4E02B04. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TPD4E02B04-Q1 USON (10) 2.50 mm × 1.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Typical Application Schematic

11.2 Receiving Notification of Documentation Updates 17

12 Mechanical, Packaging, and Orderable

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. DATE REVISION NOTES June 2017 * Initial release.

ADVANCE□INFORMATION IO1 1 5 6 IO2 GND IO3 IO4 NC NC GND NC NC TPD4E02B04-Q1 www.ti.com SLVSDZ2 – JUNE 2017 Product Folder Links: TPD4E02B04-Q1 Submit Documentation FeedbackCopyright © 2017, Texas Instruments Incorporated

5 Pin Configuration and Functions

NAME NO. GND 3 Ground Ground. Connect to ground GND 8 IO1 1 I/O ESD protected channel IO2 2 IO3 4 IO4 5 NC 6 NC Not connected; Used for optional straight-through routing. Can be left floating or grounded NC 7 NC 9 NC 10

ADVANCE□INFORMATION TPD4E02B04-Q1 SLVSDZ2 – JUNE 2017 www.ti.com Product Folder Links: TPD4E02B04-Q1 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT Electrical fast transient IEC 61000-4-5 (5/50 ns) at 25°C 80 A Peak pulse IEC 61000-4-5 power (tp - 8/20 µs) at 25°C 17 W IEC 61000-4-5 Ccurrent (tp - 8/20 µs) at 25°C 2 A TA Operating free-air temperature –40 125 °C Tstg Storage temperature –65 155 °C (1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.2 ESD Ratings— AEC Specification

V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2500 V Charged-device model (CDM), per AEC Q100-011 ±1000

6.3 ESD Ratings— IEC Specification

V(ESD) Electrostatic discharge IEC 61000-4-2 contact discharge ±12000 V IEC 61000-4-2 air-gap discharge ±15000 (1) VOUT was tested on a PCB with input and output bypassing capacitors of 0.1 µF and 120 µF, respectively.

6.4 ESD Ratings— ISO Specification

V(ESD) Electrostatic discharge ISO 10605 330 pF, 330 Ω, IO Contact discharge(1) ±8000 V Air-gap discharge(1) ±15000

6.5 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VIO Input pin voltage –3.6 3.6 V TA Operating free-air temperature –40 125 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.6 Thermal Information

THERMAL METRIC(1) TPD4E02B04-Q1 UNITDQA (USON)

10 PINS

RθJA Junction-to-ambient thermal resistance 348.7 °C/W RθJC(top) Junction-to-case (top) thermal resistance 214.1 °C/W RθJB Junction-to-board thermal resistance 270.7 °C/W ψJT Junction-to-top characterization parameter 81.7 °C/W ψJB Junction-to-board characterization parameter 270.7 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A °C/W

ADVANCE□INFORMATION TPD4E02B04-Q1 www.ti.com SLVSDZ2 – JUNE 2017 Product Folder Links: TPD4E02B04-Q1 Submit Documentation FeedbackCopyright © 2017, Texas Instruments Incorporated (1) VBRF and VBRR are defined as the voltage when 1 mA is applied in the positive-going direction, before the device latches into the snapback state. (2) VHOLD is defined as the voltage when 1 mA is applied in the negative-going direction, after the device has successfully latched into the snapback state.

6.7 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VRWM Reverse stand-off voltage IIO < 10 nA –3.6 3.6 V VBRF Breakdown voltage, any IO pin to GND(1) IIO = 1 mA, TA = 25°C 5.5 6.4 7.5 V VBRR Breakdown voltage, GND to any IO pin(1) VHOLD Holding voltage(2) IIO = 1 mA 5.8 V VCLAMP Clamping voltage IPP = 1 A, TLP, from IO to GND 6.6 V IPP = 5 A, TLP, from IO to GND 8.8 IPP = 1 A, TLP, from GND to IO 6.6 IPP = 5 A, TLP, from GND to IO 8.8 ILEAK Leakage current, any IO to GND VIO = ±2.5 V 10 nA RDYN Dynamic resistance IO to GND 0.47 Ω GND to IO 0.47 CL Line capacitance VIO = 0 V, f = 1 MHz, IO to GND, TA = 25°C 0.25 pF ΔCL Variation of line capacitance Delta of capacitance between any two IO pins, VIO = 0 V, f = 1 MHz, TA = 25°C, GND = 0 V 0.01 0.07 pF CCROSS Channel to channel capacitance Capacitance from one IO to another, VIO = 0 V, f = 1 MHz, GND = 0 V 0.13 pF

6.8 Typical Characteristics

Figure 1. Positive TLP Curve Figure 2. Negative TLP Curve Figure 3. Surge Curve (tp = 8/20 µs), any IO pin to GND Figure 4. 8-kV IEC Waveform Figure 5. –8-kV IEC Waveform Figure 6. Capacitance vs Bias Voltage

Figure 19. Differential Insertion Loss

7 Detailed Description

7.1 Overview

The TPD4E02B04-Q1 is an automotive-qualified bidirectional ESD Protection Diode with ultra-low capacitance. This device can dissipate ESD strikes above the maximum level specified by the IEC 61000-4-2 (Level 4) International Standard. The ultra-low capacitance makes this device ideal for protecting any super high-speed signal pins.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 AEC-Q101 Qualified

This device is qualified to AEC-Q101 standards and is qualified to operate from –40°C to +125°C.

7.3.2 ISO 10605 ESD Protection

The I/O pins can withstand ESD events of at least ±8-kV contact and ±15-kV air gap according to the ISO 10605 (330 pF, 330 Ω) standard. The device diverts the current to ground.

7.3.3 IEC 61000-4-2 ESD Protection

The I/O pins can withstand ESD events up to ±12-kV contact and ±15-kV air gap. An ESD-surge clamp diverts the current to ground.

7.3.4 IEC 61000-4-4 EFT Protection

The I/O pins can withstand an electrical fast transient burst of up to 80 A (5/50 ns waveform, 4 kV with 50-Ω impedance). An ESD-surge clamp diverts the current to ground.

7.3.5 IEC 61000-4-5 Surge Protection

The I/O pins can withstand surge events up to 2 A and 17 W (8/20 µs waveform). An ESD-surge clamp diverts this current to ground.

7.3.6 IO Capacitance

The capacitance between each I/O pin to ground is 0.25 pF (typical). This device supports data rates up to 10 Gbps.

7.3.7 DC Breakdown Voltage

The DC breakdown voltage of each I/O pin is a minimum of ±5.5 V. This ensures that sensitive equipment is protected from surges above the reverse standoff voltage of ±3.6 V.

7.3.8 Ultra Low Leakage Current

The I/O pins feature an ultra-low leakage current of 10 nA (maximum) with a bias of ±2.5 V.

ADVANCE□INFORMATION TPD4E02B04-Q1 www.ti.com SLVSDZ2 – JUNE 2017 Product Folder Links: TPD4E02B04-Q1 Submit Documentation FeedbackCopyright © 2017, Texas Instruments Incorporated Feature Description (continued)

7.3.9 Low ESD Clamping Voltage

The I/O pins feature an ESD clamp that is capable of clamping the voltage to 8.8 V (IPP = 5 A).

7.3.10 Supports High Speed Interfaces

This device is capable of supporting high speed interfaces up to 10 Gbps, because of the extremely low IO capacitance.

7.3.11 Industrial Temperature Range

This device features an industrial operating range of –40°C to +125°C.

7.3.12 Easy Flow-Through Routing Package

The layout of this device makes it simple and easy to add protection to an existing layout. The packages offers flow-through routing, requiring minimal modification to an existing layout.

7.4 Device Functional Modes

The TPD4E02B04-Q1 is a passive integrated circuit that triggers when voltages are above VBRF or below VBRR. During ESD events, voltages as high as ±15 kV (air) can be directed to ground via the internal diode network. When the voltages on the protected line fall below the trigger levels of the TPD4E02B04-Q1 (usually within 10s of nano-seconds) the device reverts to passive.

8 Application and Implementation

validate and test their design implementation to confirm system functionality.

8.1 Application Information

protected IC. The low RDYN of the triggered TVS holds this voltage, VCLAMP, to a safe level for the protected IC.

8.2 Typical Application

Figure 20. USB 3.1 Gen 2 Type-C ESD Schematic

Figure 21. USB 3.1 Gen 2 SuperSpeed Layout

8.2.1 Design Requirements

3.1 Gen 2 Type-C application. This provides a complete ESD protection scheme. Given the USB 3.1 Gen 2 Type-C application, the parameters listed in Table 1 are known. Table 1. Design Parameters

8.2.2 Detailed Design Procedure

8.2.2.1 Signal Range

supports the CC, SBU, and DP/DM lines.

8.2.2.2 Operating Frequency

8.2.3 Application Curves

Figure 22. USB 3.1 Gen 2 10-Gbps Eye Diagram (Bare Figure 23. USB 3.1 Gen 2 10-Gbps Eye Diagram (With

9 Power Supply Recommendations

I/O specification (–3.6 V to 3.6 V) to ensure the device functions properly.

10 Layout

10.1 Layout Guidelines

The optimum placement is as close to the connector as possible. – EMI during an ESD event can couple from the trace being struck to other nearby unprotected traces, resulting in early system failures. – The PCB designer must minimize the possibility of EMI coupling by keeping any unprotected traces away from the protected traces which are between the TVS and the connector.
Route the protected traces as straight as possible.
Eliminate any sharp corners on the protected traces between the TVS and the connector by using rounded corners with the largest radii possible. – Electric fields tend to build up on corners, increasing EMI coupling.

10.2 Layout Examples

Figure 24. USB Type-C Mid-Mount, Hybrid Connector with One-Sided ESD Layout

Figure 25. HDMI2.0 Type-A Transmitter Port Layout

11 Device and Documentation Support

11.1 Documentation Support

11.1.1 Related Documentation

For related documentation see the following:

Reading and Understanding an ESD Protection Datasheet, SLLA305
ESD Layout Guide, SLVA680
Picking ESD Diodes for Ultra High-Speed Data Lines, SLVA785
TPD4E02B04EVM Users Guide, SLVUAH6

11.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

11.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

11.4 Trademarks

E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.

11.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

11.6 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 27-Jun-2017 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples PTPD4E02B04QDQARQ1 ACTIVE USON DQA 10 3000 TBD Call TI Call TI -40 to 125 TPD4E02B04QDQARQ1 PREVIEW USON DQA 10 3000 TBD Call TI Call TI -40 to 125 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

www.ti.com 27-Jun-2017 Addendum-Page 2 OTHER QUALIFIED VERSIONS OF TPD4E02B04-Q1 :

Catalog: TPD4E02B04 NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product

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Product Information

TPD4E02B04QDQARQ1 specifications and overview.

Summary

4-Channel ESD Protection Diode for USB Type-C and HDMI 2.0

Description

4-Channel ESD Protection Diode for USB Type-C and HDMI 2.0

Source title TPD4E02B04QDQARQ1 Datasheet(PDF) - Texas Instruments

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