TPCS8303

TPCS8303 TOSHIBA | Alldatasheet

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TOSHIBA Field Effect Transistor Silicon P Channel MOS Type (U-MOSIII) TPCS8303 Lithium Ion Battery Applications Notebook PC Applications Portable Machines and Tools

• Small footprint due to small and thin package
• Low drain-source ON resistance: RDS (ON) = 15 mΩ (typ.)
• High forward transfer admittance: |Yfs| = 18 S (typ.)
• Low leakage current: IDSS = −10 µA (max) (VDS = −20 V)
• Enhancement mode: Vth = −0.45~−1.2 V (VDS = −10 V, ID = −200 µA) Maximum Ratings (Ta = 25°C) Characteristics Symbol Rating Unit Drain-source voltage V DSS −20 V Drain-gate voltage (RGS = 20 kΩ) V DGR −20 V Gate-source voltage V GSS ±12 V DC (Note 1) I D −5 Drain current Pulse (Note 1) I DP −20 A Single-device operation (Note 3a) PD (1) 1.1 Drain power dissipation (t = 10 s) (Note 2a) Single-device value at dual operation (Note 3b) PD (2) 0.75 W Single-device operation (Note 3a) PD (1) 0.6 Drain power dissipation (t = 10 s) (Note 2b) Single-device value at dual operation (Note 3b) PD (2) 0.35 W Single pulse avalanche energy (Note 4) EAS 16.3 mJ Avalanche current I AR −5 A Repetitive avalanche energy Single-device value at dual operation (Note 2a, 3b, 5) EAR 0.075 mJ Channel temperature T ch 150 °C Storage temperature range T stg −55~150 °C Note 1, Note 2, Note 3, Note 4, Note 5: See the next page. This transistor is an electrostatic-sensitive device. Please handle with caution. Unit: mm JEDEC ― JEITA ― TOSHIBA 2-3R1E Weight: 0.035 g (typ.) Circuit Configuration 8 7 6 5 1 2 3 4

Characteristics Symbol Max Unit Single-device operation (Note 3a) Rth (ch-a) (1) 114 Thermal resistance, channel to ambient (t = 10 s) (Note 2a) Single-device value at dual operation (Note 3b) Rth (ch-a) (2) 167 °C/W Single-device operation (Note 3a) Rth (ch-a) (1) 208 Thermal resistance, channel to ambient (t = 10 s) (Note 2b) Single-device value at dual operation (Note 3b) Rth (ch-a) (2) 357 °C/W Marking (Note 6) Note 1: Ensure that the channel temperature does not exceed 150°C. Note 2: a) Device mounted on a glass-epoxy board (a) b) Device mounted on a glass-epoxy board (b) (a) (b) Note 3: a) The power dissipation and thermal resistance values are shown for a single device (During single-device operation, power is only applied to one device.) b) The power dissipation and thermal resistance values are shown for a single device (During dual operation, power is evenly applied to both devices.) Note 4: V DD = −16 V, Tch = 25°C, L = 500μH, IAR = −5A, RG = 25 Ω Note 5: Repetitive rating: pulse width limited by max channel temperature Note 6: ○ on lower right of the marking indicates Pin 1. FR-4 25.4 × 25.4 × 0.8 (unit: mm) FR-4 25.4 × 25.4 × 0.8 (unit: mm) ※ Weekly code: (Three digits) Week of manufacture (01 for the first week of a year, sequential number up to 52 or 53) Year of manufacture (The last digit of a year) S8303 Lot No. A line indicates lead (Pb)-free package or lead (Pb)-free finish. Part No. (or abbreviation code)

Electrical Characteristics (Ta = 25°C) Characteristics Symbol Test Condition Min Typ. Max Unit Gate leakage current I GSS V GS = ±10 V, VDS = 0 V ⎯ ⎯ ±10 µA Drain cut-OFF current I DSS V DS = −20 V, VGS = 0 V ⎯ ⎯ −10 µA V (BR) DSS ID = −10 mA, VGS = 0 V − 20 ⎯ ⎯ Drain-source breakdown voltage V (BR) DSX ID = −10 mA, VGS = 12 V −8 ⎯ ⎯ V Gate threshold voltage V th V DS = −10 V, ID = −200 µA −0.45 ⎯ −1.2 V VGS = −2.0 V, ID = −2.5 A ⎯ 31 80 VGS = −2.5 V, ID = −2.5 A ⎯ 22 30 Drain-source ON resistance R DS (ON) VGS = −4.5 V, ID = −2.5 A ⎯ 15 21 mΩ Forward transfer admittance |Y fs| V DS = −10 V, ID = −2.5 A 9 18 ⎯ S Input capacitance C iss ⎯ 2560 ⎯ Reverse transfer capacitance C rss ⎯ 330 ⎯ Output capacitance C oss VDS = −10 V, VGS = 0 V, f = 1 MHz ⎯ 380 ⎯ pF Rise time t r ⎯ 5 ⎯ Turn-ON time t on ⎯ 14 ⎯ Fall time t f ⎯ 42 ⎯ Switching time Turn-OFF time t off Duty <= 1%, tw = 10 µs ⎯ 142 ⎯ ns Total gate charge (gate-source plus gate-drain) Qg ⎯ 33 ⎯ Gate-source charge 1 Q gs ⎯ 10 ⎯ Gate-drain (“miller”) charge Q gd VDD ∼− −16 V,VGS = −5 V, ID = −5 A ⎯ 5.4 ⎯ nC Source-Drain Ratings and Characteristics (Ta = 25°C) Characteristics Symbol Test Condition Min Typ. Max Unit Drain reverse current Pulse (Note 1) I DRP ⎯ ⎯ ⎯ −20 A Forward voltage (diode) V DSF I DR = −5 A, VGS = 0 V ⎯ ⎯ 1.2 V RL = 4Ω VDD ∼− −10 V −5 V VGS 0 V 4.7 Ω ID = −2.5 A VOUT

−2 −3 Forward transfer admittance |Y fs| (S) Drain−source voltage V DS ( V ) Drain−source voltage V DS (V) ID – VDS Drain current I D ( A ) Drain-source voltage V DS (V) ID – VDS Drain current I D ( A ) Gate−source voltage V GS (V) ID – VGS Drain current I D (A) Gate−source voltage V GS (V) VDS – VGS Drain current I D (A) |Yfs| – ID Drain current I D (A) RDS (ON) – ID Drain−source ON resistance RDS (ON) ( m Ω) Common source Ta = 25°C, Pulse test −1.5 −1.6 VGS = −1.3 V −3 −10 Common source Ta = 25°C Pulse test −10 −10 −12 0 −1 Ta = −55°C 100 Common source VDS = −10 V Pulse test −0.1 −0.2 −0.3 −0.4 −0.5 Common source Ta = 25°C Pulse test −2.5 ID = −5 A Common source VDS = −10 V Pulse test Ta = −55°C 100 0.1 100 −0.1 −1 −100−10 Common source Ta = 25°C Pulse test VGS = −2 V −2.5 100 −4.5 −0.1 −100 −1 −10 −1.4 −1.7 −1.8 −10 −3 −2 −1.9 −1.8 −1.7 −1.6 VGS = −1.4 V −1.3

Ambient temperature Ta (°C) RDS (ON) – Ta Drain-source ON resistance RDS (ON) ( m Ω) Drain−source voltage V DS (V) IDR – VDS Drain reverse current I DR ( A ) Drain−source voltage V DS (V) Capacitance – VDS Capacitance C (pF) Ambient temperature Ta (°C) Vth – Ta Gate threshold voltage V th (V) Ambient temperature Ta (°C) PD – Ta Drain power dissipation P D (W) Gate−source voltage V GS ( V ) Total gate charge Q g (nC) Dynamic input/output characteristics Drain−source voltage V DS ( V ) Common source Pulse test −80 −40 0 40 80 120 160 VGS = −2 V VGS = −2.5 V VGS = −4.5 V ID = −5 A −2.5 −1.3 Common source Ta = 25°C Pulse test −0.1 −100 −10 −10 V −5 −3 VGS = 0 V Common source Ta = 25°C VGS = 0 V f = 1 MHz Ciss Coss Crss 100 1000 10000 300 3000 −80 −40 0 40 80 160 120 Common source VDS = −10 V ID = −200 µA Pulse test −1.2 −1.0 −0.2 (1) (4) (3) (2) 0.25 0.5 0.75 1.0 1.25 0 40 80 160 120 200 Common source ID = −5 A Ta = 25°C, Pulse test VDD = −16 V −10 −15 −20 VDS VDD = −16 V VGS −0.6 −0.8 −0.4 Device mounted on a glass-epoxy board (a) (Note 2a) (1) Single-device operation (Note 3a) (2) Single-device value at dual operation (Note 3b) Device mounted on a glass-epoxy board (b) (Note 2b) (3) Single-device operation (Note 3a) (4) Single-device value at dual operation (Note 3b) t = 10 s

rth − tw Pulse width t w ( s ) Drain−source voltage V DS (V) Transient thermal impedance r th ( ° C / W ) Drain current I D (A) Safe operating area 0.1 0.1 1 10 0.1 100 ID max (Pulse) * 10 ms * 1 ms * VDSS max 0.001 0.01 0.1 1 10 100 1000 (1) (2) (3) (4) 0.1 0.3 0.5 100 300 1000 500 * Single pulse Ta = 25°C Curves must be derated linearly with increase in temperature. Device mounted on a glass-epoxy board (a) (Note 2a) (1) Single-device operation (Note 3a) (2) Single-device value at dual operation (Note 3b) Device mounted on a glass-epoxy board (b) (Note 2b) (3) Single-device operation (Note 3a) (4) Single-device value at dual operation (Note 3b) t = 10 s Single-device value at dual operation (Note 3b)

• The information contained herein is subject to change without notice.
• The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others.
• TOSHIBA is continually working to improve the quality an d reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
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• TOSHIBA products should not be embedded to the downstream products which are prohibited to be produced and sold, under any law and regulations. 030619EAARESTRICTIONS ON PRODUCT USE