TPCS8004 TOSHIBA | Alldatasheet
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TOSHIBA Field Effect Transistor Silicon N Channel MOS Type ( π-MOSV) TPCS8004 High-Speed Switching Applications Switching Regulator Applications DC-DC Converter Applications
- Small footprint due to small and thin package
- Low drain-source ON resistance: RDS (ON) = 0.56 Ω (typ.)
- High forward transfer admittance: |Yfs| = 1.8 S (typ.)
- Low leakage current: IDSS = 100 µA (max) (VDS = 200 V)
- Enhancement model: Vth = 1.5~3.5 V (VDS = 10 V , ID = 1 mA) Maximum Ratings (Ta = 25°C) Characteristics Symbol Rating Unit Drain-source voltage V DSS 200 V Drain-gate voltage (RGS = 20 kΩ) V DGR 200 V Gate-source voltage V GSS ±20 V DC (Note 1) I D 1.3 Drain current Pulse (Note 1) I DP 5.2 A Drain power dissipation (t = 10 s) (Note 2a) PD 1.5 Drain power dissipation (t = 10 s) (Note 2b) PD 0.6 W Single pulse avalanche energy (Note3) E AS 1.05 mJ Avalanche current I AR 1.3 A Repetitive avalanche energy (Note2a, Note 4) EAR 0.15 mJ Channel temperature T ch 150 °C Storage temperature range T stg −55~150 °C Note 1, Note 2, Note 3 and Note 4: See the next page. This transistor is an electrostatic-sensitive device. Please handle with caution. Unit: mm JEDEC ― JEITA ― TOSHIBA 2-3R1B Weight: 0.035 g (typ.) Circuit Configuration 8 7 6 5 1 2 3 4
Characteristics Symbol Max Unit Thermal resistance, channel to ambient (t = 10 s) (Note 2a) Rth (ch-a) 83.3 °C/W Thermal resistance, channel to ambient (t = 10 s) (Note 2b) Rth (ch-a) 208 °C/W Marking (Note 5) Note 1: Ensure that the channel temperature does not exceed 150°C. Note 2: a) Device mounted on a glass-epoxy board (a) b) Device mounted on a glass-epoxy board (b) Note 3: V DD = 50 V, Tch = 25°C (initial), L = 1.0 mH, RG = 25 Ω, IAR = 1.3 A Note 4: Repetitive rating: pulse width limited by maximum channel temperature Note 5: ○ on lower right of the marking indicates Pin 1. S8004 Lot No. A line indicates lead (Pb)-free package or lead (Pb)-free finish. Part No. (or abbreviation code) FR-4 25.4 × 25.4 × 0.8 (unit: mm) FR-4 25.4 × 25.4 × 0.8 (unit: mm) ※ Weekly code: (Three digits) Week of manufacture (01 for the first week of a year: sequential number up to 52 or 53) Year of manufacture (The last digit of a year)
Electrical Characteristics (Ta = 25°C) Characteristics Symbol Test Condition Min Typ. Max Unit Gate leakage current I GSS V GS = ±16 V, VDS = 0 V ⎯ ⎯ ±10 µA Drain cut-OFF current I DSS V DS = 200 V, VGS = 0 V ⎯ ⎯ 100 µA Drain-source breakdown voltage V (BR) DSS ID = 10 mA, VGS = 0 V 200 ⎯ ⎯ V Gate threshold voltage V th V DS = 10 V, ID = 1 mA 1.5 ⎯ 3.5 V Drain-source ON resistance R DS (ON) V GS = 10 V, ID = 0.6 A ⎯ 0.56 0.8 Ω Forward transfer admittance |Y fs| V DS = 10 V, ID = 0.6 A 0.9 1.8 ⎯ S Input capacitance C iss ⎯ 380 ⎯ pF Reverse transfer capacitance C rss ⎯ 40 ⎯ pF Output capacitance C oss VDS = 10 V, VGS = 0 V, f = 1 MHz ⎯ 140 ⎯ pF Rise time t r ⎯ 4.5 ⎯ Turn-ON time t on ⎯ 12 ⎯ Fall time t f ⎯ 23 ⎯ Switching time Turn-OFF time t off Duty <= 1%, tw = 10 µs ⎯ 54 ⎯ ns Total gate charge (gate-source plus gate-drain) Qg ⎯ 12 ⎯ nC Gate-source charge Q gs ⎯ 8 ⎯ nC Gate-drain (“miller”) charge Q gd VDD ∼− 160 V, VGS = 10 V, ID = 1.3 A ⎯ 4 ⎯ nC Source-Drain Ratings and Characteristics (Ta = 25°C) Characteristics Symbol Test Condition Min Typ. Max Unit Drain reverse current (pulse) (Note 1) I DRP ⎯ ⎯ ⎯ 5.2 A Forward voltage (diode) V DSF I DR = 1.3 A, VGS = 0 V ⎯ ⎯ −2.0 V Reverse recovery time t rr ⎯ 89 ⎯ ns Reverse recovery charge Q rr IDR = 1.3 A, VGS = 0 V, dIDR/dt = 100 A/µs ⎯ 230 ⎯ nC RL = 167 Ω VDD ∼− 100 V 0 V VGS 10 V 4.7 Ω ID = 0.6 A VOUT
0.5 1.0 1.5 2.0 3.0 0 4 8 12 16 20 2.5 0.32 0.6 1.3 ID = 2.6 A Common source Ta = 25°C Pulse test Forward transfer admittance ⎪Yfs⎪ (S) Drain-source voltage V DS (V) Drain-source voltage V DS (V) ID – VDS Drain current I D (A) Drain-source voltage V DS ( V ) ID – VDS Drain current I D ( A ) Gate-source voltage V GS (V) ID – VGS Drain current I D (A) Gate-source voltage V GS (V) VDS – VGS Drain current I D (A) |Yfs| – ID Drain current I D ( A ) Drain-source on resistance R DS (ON) ( Ω) −55°C 0 1 2 3 4 5 Ta = 100°C 25°C Common source VDS = 10 V Pulse test RDS (ON) – ID 10 20 30 40 Common source Ta = 25°C Pulse test VGS = 3.6 V 3.8 4.2 4.4 4.64.8 10 8 0.05 0.1 0.5 0.05 0.1 0.3 0.5 1 3 5 15 V Common source Ta = 25°C Pulse test VGS = 10 V 0.3 0.05 0.1 0.3 0.5 1 3 5 Common source VDS = 10 V Pulse test Ta = −55°C 25°C100°C 0.05 0.1 0.5 0.3 0246 8 1 0 Common source Ta = 25°C Pulse test 4.4 4.2 3.8 VGS = 3.6 V 4.6 4.810
ID = 1.3 A Ta = 25 °C VDS VGS VDD = 160 V Ambient temperature Ta (°C) RDS (ON) – Ta Drain-source ON resistance R DS (ON) ( Ω) Drain-source voltage V DS (V) IDR – VDS Drain reverse current I DR ( A ) Drain-source voltage V DS (V) Capacitance – VDS Capacitance C (pF) Ambient temperature Ta (°C) Vth – Ta Gate threshold voltage V th ( V ) Ambient temperature Ta (°C) PD – Ta Drain power dissipation P D (W) 100 1000 0.1 1 10 100 Common source Ta = 25°C f = 1MHz VGS = 0 V Crss Coss Ciss 0.1 0.5 0.3
3 V 0, −1 V
VGS = 10 V 5 V Common source Ta = 25°C Pulse test Gate-source voltage V GS (V) Total gate charge Q g ( n C ) Dynamic input/output characteristics Drain-source voltage V DS (V) 0.2 0.4 0.8 1.2 −80 −40 0 40 80 160 Common source Pulse test 1.0 120 ID = 0.32 A 0.65 A 1.3 A VGS = 10 V −80 −40 0 40 80 160 Common source VDS = 10 V ID = 1 mA Pulse test 120 (1) Device mounted on a glass-epoxy board (a) (Note 2a) (2) Device mounted on a glass-epoxy board (b) (Note 2b) t = 10 s 0 40 80 120 160 200 0.4 0.8 1.2 1.6 2.0 (2) (1)
rth − tw Safe operating area EAS − Tch Pulse width t w (S) Drain-source voltage V DS (V) Channel temperature (initial) Tch (°C) Normalized transient thermal impedance r th (°C/W) Avalanche energy E AS ( m J ) Drain current I D (A) −15 V 15 V Test circuit Wave form IAR BVDSS VDD VDS Tch = 25°C (Initial) Peak IAR = 1.3 A, RG = 25 Ω VDD = 50 V, L = 1 mH −⋅⋅⋅= DDVVDSSB VDSSB2IL2 ASE 25 50 75 100 150 125 0.2 0.4 0.8 1.0 1.2 0.6 0.1 1 m 10 m 100 m 1 10 100 1000 0.3 0.5 100 300 500 (1) Device mounted on a glass-epoxy board (a) (Note 2a) (2) Device mounted on a glass-epoxy board (b) (Note 2b) t = 10 s Single pulse (2) (1) 0.001 0.1 0.3 1 3 10 30 100 1000 300 0.003 0.005 0.01 0.03 0.05 0.1 0.3 0.5 * Single pulse T a = 25°C Curves must be derated linearly with increase in temperature. ID max (pulse) * 10 ms * 1 ms * VDSS max
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