TPA3000D1

TPA3000D1 TI | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 19

Technical content

SLOS379A – SEPTEMBER 2001 – REVISED JANUARY 2002 17-W MONO FILTER-FREE CLASS-D AUDIO POWER AMPLIFIER 1www.ti.com

FEATURES

/C006817 W Into 8-Ω Load From 18-V Supply /C0068Third-Generation Modulation Technique: – Filter-Free Operation – Improved Efficiency – Improved SNR /C0068Low Supply Current...8 mA Typ at 12 V /C0068Shutdown Control...<1 µA Typ /C0068Shutdown Pin Is TTL Compatible /C0068TA = –40°C to 85°C /C0068Space-Saving, Thermally-Enhanced PowerPAD  Packaging

APPLICATIONS

/C0068LCD Monitors /C0068Hands-Free Car Kits /C0068Powered Speakers

DESCRIPTION

The TPA3000D1 is a 17-W mono bridge-tied load (BTL) filter-free class-D audio power amplifier with high efficiency, eliminating the need for heatsinks. The TPA3000D1 is designed to drive speakers without an output filter. The gain of the amplifier is controlled by two input terminals, GAIN1 and GAIN0. This allows the amplifier to be configured for a gain of 12, 18, 23.6, and 36 dB. The differential input stage provides high common mode rejection and improved power supply rejection. The amplifier also includes depop circuitry to reduce the amount of turnon pop at power-up and when cycling SHUTDOWN The TPA3000D1 is available in the 24-pin thermally enhanced TSSOP package (PWP) which eliminates the need for an external heat sink when playing music. VCC – Supply Voltage – V 8 1 01 21 41 61 8 VCC = 8 V TO 18 V f = 1 kHz Maximum 1% THD+N PO – Output Power – W OUTPUT POWER vs SUPPLY VOLTAGE R L = 8 Ω PO – Output Power – W Efficiency – % EFFICIENCY vs OUTPUT POWER 100 0 3 6 9 12 15 R L = 8 Ω Speaker VCC = 15 V f = 1 kHz PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright  2002, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SLOS379A – SEPTEMBER 2001 – REVISED JANUARY 2002 2 www.ti.com AVAILABLE OPTIONS T PACKAGED DEVICES TA TSSOP (PWP) † –40°C to 85°C TPA3000D1PWP † The PWP package is available taped and reeled. To order a taped and reeled part, add the suffix R to the part number (e.g., TPA3000D1PWPR). INN INP GAIN0 GAIN1 SHUTDOWN PGND VCLAMP BSN PV CC OUTN OUTN PGND V CC VREF BYPASS COSC ROSC AGND AGND BSP PV CC OUTP OUTP PGND PWP PACKAGE (TOP VIEW) Terminal Functions TERMINAL I/O DESCRIPTIONNAME NO. I/O DESCRIPTION AGND 18, 19 Analog ground BSN 8 I Bootstrap pin for high-side gate drive of negative BTL output (connect a 10-nF capacitor from OUTN to BSN) BSP 17 I Bootstrap pin for high-side gate drive of positive BTL output (connect a 10-nF capacitor from OUTP to BSP) BYPASS 22 I Connect 0.47 µF capacitor to ground for BYPASS voltage filtering. COSC 21 I Connect a 220-pF capacitor to ground to set oscillation frequency. GAIN0 3 I Bit 0 of gain control (see Table 1 for gain settings) GAIN1 4 I Bit 1 of gain control (see Table 1 for gain settings) INN 1 I Negative differential input INP 2 I Positive differential input OUTN 10, 11 O Negative BTL output OUTP 14, 15 O Positive BTL output PGND 6, 12, 13 Power ground PV CC 9, 16 I High-voltage power supply (for output stages) ROSC 20 I Connect 120 kΩ resistor to ground to set oscillation frequency. SHUTDOWN 5 I Shutdown terminal (negative logic), TTL compatible, 21-V compliant VCC 24 I Analog high-voltage power supply VCLAMP 7 O Connect 100-nF capacitor to ground to provide reference voltage for H-bridge gates VREF 23 O 5-V internal regulator for control circuitry (connect a 0.1-µF to 1-µF capacitor to ground)

SLOS379A – SEPTEMBER 2001 – REVISED JANUARY 2002 3www.ti.com functional block diagram Gate Drive_ Gate Drive Gain Adjust Gain Adjust Start-Up Protection Logic OC Detect/C0123 Thermal VCC OK Ramp Generator Biases and ReferencesGain AGNDVREF VREF PV CC INN OUTN PGND PV CC OUTP PGND INP SHUTDOWN GAIN1 GAIN0 COSC ROSC BYPASS SD Deglitch Logic Deglitch Logic VCC VCC BSP BSN Clamp Reference VCLAMP † Short-circuit protection operates only for shorts from the outputs to ground. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ /C0125Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C DERATING FACTOR TA = 70°C TA = 85°C PWP 2.7 W 21.8 mW/°C 1.7 W 1.4 W

SLOS379A – SEPTEMBER 2001 – REVISED JANUARY 2002 4 www.ti.com recommended operating conditions MIN MAX UNIT ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Supply voltage, VCC, PVCC ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ V ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ High-level input voltage, VIH ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ GAIN0, GAIN1, SHUTDOWN † ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ V ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Low-level input voltage, VIL ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ GAIN0, GAIN1, SHUTDOWN † ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ 0.8 ÁÁÁ ÁÁÁ V ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Operating free-air temperature, TA ÁÁÁ ÁÁÁ –40 ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ † See Application Information for more information on the characteristics of the SHUTDOWN terminal. electrical characteristics at TA = 25°C, PVCC = VCC = 12 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ÁÁÁÁ |VOS | ÁÁÁÁÁÁÁÁÁÁÁÁÁ Output offset voltage (measured differentially) ÁÁÁÁÁÁÁÁÁÁÁ VI = 0 V, A V = 12 dB ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ mV ÁÁÁÁ ÁÁÁÁ PSRR ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ Power supply rejection ratio ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ PV CC = 11.5 V to 12.5 V ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ –75 ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ dB ÁÁÁÁ ÁÁÁÁ |IIH| ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ High-level input current ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ PV CC = 12 V, V I = PVCC ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ µA ÁÁÁÁ ÁÁÁÁ |IIL| ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ Low-level input current ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ PV CC = 12 V, V I = 0 V ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ µA ÁÁÁÁ ÁÁÁÁ ICC ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ Supply current ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ mA ÁÁÁÁ ÁÁÁÁ ICC(SD) ÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁ Supply current, shutdown mode ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ µA operating characteristics, PVCC = VCC = 12 V, TA = 25°C, RL = 8 Ω, Gain = 12 dB (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ÁÁÁÁ ÁÁÁÁ PO ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ Output power ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ THD = 0.5%, f = 1 kHz ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ W ÁÁÁÁ ÁÁÁÁ THD + N ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ Total harmonic distortion plus noise ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ PO = 15 W, f = 20 Hz to 20 kHz ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ BOM ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ Maximum output power bandwidth ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ THD = 1% ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ kHz ÁÁÁÁ ÁÁÁÁ kSVR ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ Supply ripple rejection ratio ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ f = 1 kHz, C (BYPASS) = 0.47 µF ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ –70 ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ dB ÁÁÁÁ ÁÁÁÁ SNR ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ Signal-to-noise ratio ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ PO = 12 W ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ dB ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ C (BYPASS ) = 0.47 µF, f = 20 Hz to 22 kHz, ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ µV(rms) ÁÁÁÁ ÁÁÁÁ V ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ Noise output voltage ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ C (BYPASS) 0.47 µF, f 20 Hz to 22 kHz, No weighting filter used ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ –81 ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ dBV ÁÁÁÁ ÁÁÁÁ Vn ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ Noise output voltage ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ C (BYPASS ) = 0.47 µF, f = 20 Hz to 22 kHz, ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ µV(rms) ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ C (BYPASS) 0.47 µF, f 20 Hz to 22 kHz, A-weighted filter ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ –84 ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ dBV ÁÁÁÁ ÁÁÁÁ Zi ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ Input impedance ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ >23 ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ kΩ operating characteristics, PVCC = VCC = 18 V, TA = 25°C, RL = 8 Ω, Gain = 12 dB (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ÁÁÁÁ ÁÁÁÁ PO ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ Output power ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ THD = 0.5%, f = 1 kHz ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ W ÁÁÁÁ ÁÁÁÁ THD + N ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ Total harmonic distortion plus noise ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ PO = 15 W, f = 20 Hz to 20 kHz ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ BOM ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ Maximum output power bandwidth ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ THD = 1% ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ kHz ÁÁÁÁ ÁÁÁÁ kSVR ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ Supply ripple rejection ratio ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ f = 1 kHz, C BYPASS = 0.47 µF ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ dB ÁÁÁÁ ÁÁÁÁ SNR ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ Signal-to-noise ratio ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ PO = 17 W ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ 102 ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ dB ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ C (BYPASS) = 0.47 µF, f = 20 Hz to 20 kHz, ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ µV(rms) ÁÁÁÁ V ÁÁÁÁÁÁÁÁÁÁ Noise output voltage ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ C (BYPASS) = 0.47 µF, f = 20 Hz to 20 kHz, No weighting filter used ÁÁÁ ÁÁÁ –81 ÁÁÁ ÁÁÁ dBV ÁÁÁÁ ÁÁÁÁ Vn ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ Noise output voltage ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ C (BYPASS ) = 0.47 µF, f = 20 Hz to 22 kHz, ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ µV(rms) ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ C (BYPASS) 0.47 µF, f 20 Hz to 22 kHz, A-weighted filter ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ –84 ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ dBV ÁÁÁÁ ÁÁÁÁ Zi ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ Input impedance ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ >23 ÁÁÁ ÁÁÁ ÁÁÁ ÁÁÁ kΩ

SLOS379A – SEPTEMBER 2001 – REVISED JANUARY 2002 7www.ti.com TYPICAL CHARACTERISTICS Figure 7 PO – Output Power – W 0.01 0.1 1 10 THD+N – Total Harmonic Distortion + Noise – % TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 0.01 0.1 VCC = 18 V R L = 8 Ω Gain = 12 dB f = 1 kHz f = 20 Hz f = 20 kHz Figure 8 PO – Output Power – W 0.01 0.1 1 10 THD+N – Total Harmonic Distortion + Noise – % TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 0.01 0.1

10 VCC = 15 V

R L = 8 Ω Gain = 12 dB f = 1 kHz f = 20 Hz f = 20 kHz Figure 9 PO – Output Power – W 0.01 0.1 1 10 THD+N – Total Harmonic Distortion + Noise – % TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 0.01 0.1 VCC = 12 V R L = 8 Ω Gain = 12 dB f = 1 kHz f = 20 Hz f = 20 kHz Figure 10 PO – Output Power – W 0.01 0.1 1 THD+N – Total Harmonic Distortion + Noise – % TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 0.01 0.1 VCC = 8 V R L = 8 Ω Gain = 12 dB f = 20 kHz f = 20 Hz f = 1 kHz

SLOS379A – SEPTEMBER 2001 – REVISED JANUARY 2002 11www.ti.com

APPLICATION INFORMATION

eliminating the output filter with the TPA3000D1 This section focuses on how the user can eliminate the output filter with the TPA3000D1. effect on audio The class-D amplifier outputs a pulse-width modulated (PWM) square wave, which is the sum of the switching waveform and the amplified input audio signal. The human ear acts as a band-pass filter such that only the frequencies between approximately 20 Hz and 20 kHz are passed. The switching frequency components are much greater than 20 kHz, so the only signal heard is the amplified input audio signal. traditional class-D modulation scheme The traditional class-D modulation scheme, which is used in the TPA032D0x family, has a differential output where each output is 180 degrees out of phase and changes from ground to the supply voltage, V CC . Therefore, the differential prefiltered output varies between positive and negative VCC , where filtered 50% duty cycle yields 0 V across the load. The traditional class-D modulation scheme with voltage and current waveforms is shown in Figure 23. Note that even at an average of 0 V across the load (50% duty cycle), the current to the load is high, causing high loss, thus causing a high supply current. 0 V –12 V +12 V Current OUTP Differential Voltage Across Load OUTN Figure 23. Traditional Class-D Modulation Scheme’s Output Voltage and The TPA3000D1 uses a modulation scheme that still has each output switching from 0 to the supply voltage.

SLOS379A – SEPTEMBER 2001 – REVISED JANUARY 2002 12 www.ti.com TPA3000D1 modulation scheme (continued) 0 V –12 V +12 V Current OUTP OUTN Differential Voltage Across Load 0 V –12 V +12 V Current OUTP OUTN Differential Voltage Across Load Output = 0 V Output > 0 V Figure 24. The TPA3000D1 Output Voltage and Current Waveforms Into an Inductive Load resistive and reactive, whereas an LC filter is almost purely reactive. most applications the filter is not needed. dissipation, therefore increasing efficiency.

SLOS379A – SEPTEMBER 2001 – REVISED JANUARY 2002 13www.ti.com effects of applying a square wave into a speaker Audio specialists have advised for years not to apply a square wave to speakers. If the amplitude of the waveform is high enough and the frequency of the square wave is within the bandwidth of the speaker, the square wave could cause the voice coil to jump out of the air gap and/or scar the voice coil. A 250-kHz switching frequency, however, does not significantly move the voice coil, as the cone movement is proportional to 1/f 2 for frequencies beyond the audio band. Damage may occur if the voice coil cannot handle the additional heat generated from the high-frequency switching current. The amount of power dissipated in the speaker may be estimated by first considering the overall efficiency of the system. If the on-resistance (r ds(on)) of the output transistors is considered to cause the dominant loss in the system, then the maximum theoretical efficiency for the TPA3000D1 with an 8-Ω load is as follows: Efficiency (theoretical, %)/C0043R L/C0324/C0466R L /C0041rds(on)/C0467/C0032100% /C00438/C0324(8/C00410.4)/C0032100% /C004395.24% The maximum measured output power is approximately 17 W with an 18-V power supply. The total theoretical power supplied (P(total)) for this worst-case condition would therefore be as follows: P (total)/C0043P O /C0324Efficiency/C004317 W /C03240.9524/C004317.85 W The efficiency measured in the lab using an 8-Ω speaker was 89%. The power not accounted for as dissipated across the rds(on) may be calculated by simply subtracting the theoretical power from the measured power: Other losses/C0043P (total)(measured)/C0042P (total)(theoretical)/C004319.1/C004217.85/C00431.25 W The quiescent supply current at 18 V is measured to be 9.8 mA. It can be assumed that the quiescent current encapsulates all remaining losses in the device, i.e., biasing and switching losses. It may be assumed that any remaining power is dissipated in the speaker and is calculated as follows: P (dis)/C00431.25 W/C0042(18 V/C00329.8 mA)/C00431.07 W Note that these calculations are for the worst-case condition of 17 W delivered to the speaker. Since the 1.07 W is only 6.3% of the power delivered to the speaker, it may be concluded that the amount of power actually dissipated in the speaker is relatively insignificant. Furthermore, this power dissipated is well within the specifications of most loudspeaker drivers in a system, as the power rating is typically selected to handle the power generated from a clipping waveform. when to use an output filter Design the TPA3000D1 without the filter if the traces from amplifier to speaker are short. Powered speakers, where the speaker is in the same enclosure as the amplifier, is a typical application for class-D without a filter. A ferrite bead filter may be used if the design is failing radiated emissions without a filter, or if a frequency sensitive circuit is operating higher than 1 MHz. The ferrite filter reduces EMI around 1 MHz and higher (FCC and CE only test radiated emissions greater than 30 MHz). When selecting a ferrite bead, choose one with high impedance at high frequencies, but very low impedance at low frequencies. Use a LC output filter if there are low frequency (<1 MHz) EMI sensitive circuits and/or there are long wires from the amplifier to the speaker. (2) (3) (4)

SLOS379A – SEPTEMBER 2001 – REVISED JANUARY 2002 15www.ti.com Each gain setting is achieved by varying the input resistance of the amplifier, which can range from its smallest value to over six times that value. As a result, if a single capacitor is used in the input high-pass filter, the –3d B or cutoff frequency also changes by over six times. C i IN Zi Zf Input Signal The –3-dB frequency can be calculated using equation 5. (5)f/C00431 2/C0112ZiC i input capacitor, Ci In the typical application an input capacitor (Ci) is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation. In this case, Ci and the input impedance of the amplifier (Zi) form a high-pass filter with the corner frequency determined in equation 6. fc /C00431 2/C0112ZiC i –3 dB fc (6) The value of Ci is important, as it directly affects the bass (low frequency) performance of the circuit. Consider the example where Zi is 241 kΩ and the specification calls for a flat bass response down to 20 Hz. Equation 6 is reconfigured as equation 7. C i /C00431 2/C0112Zifc (7) In this example, Ci is 33 nF, so one would likely choose a value of 0.1 µF as this value is commonly used. If the gain is known and will be constant, use Zi from Table 1 to calculate Ci. A further consideration for this capacitor is the leakage path from the input source through the input network (Ci) and the feedback network to the load. This leakage current creates a dc offset voltage at the input to the amplifier that reduces useful headroom, especially in high gain applications. For this reason a low-leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor should face the amplifier input in most applications as the dc level there is held at 2.5 V, which is likely higher than the source dc level. Note that it is important to confirm the capacitor polarity in the application.

SLOS379A – SEPTEMBER 2001 – REVISED JANUARY 2002 16 www.ti.com power supply decoupling, CS The TPA3000D1 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is achieved by using two capacitors of different types that target different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 µF placed as close as possible to the device V CC lead works best. For filtering lower-frequency noise signals, a larger aluminum electrolytic capacitor of 10 µF or greater placed near the audio power amplifier is recommended. BSN and BSP capacitors The full H-bridge output stage uses only NMOS transistors. It therefore requires bootstrap capacitors for the high side of each output to turn on correctly. A 10-nF ceramic capacitor, rated for at least 25 V, must be connected from each output to its corresponding bootstrap input. Specifically, one 10-nF capacitor must be connected from OUTP to BSP, and one 10-nF capacitor must be connected from OUTN to BSN. (See the evaluation circuit diagram at the end of this data sheet.) VCLAMP capacitors To ensure that the maximum gate-to-source voltage for the NMOS output transistors is not exceeded, an internal regulator clamps the gate voltage. A 0.1-µF capacitor must be connected from VCLAMP (pin 7) to ground and must be rated for at least 25 V. The voltage at VCLAMP (pin 7) varies with V CC and may not be used for powering any other circuitry. midrail bypass capacitor, CBYPASS The midrail bypass capacitor (CBYPASS ) is the most critical capacitor and serves several important functions. During start-up or recovery from shutdown mode, CBYPASS determines the rate at which the amplifier starts up. The second function is to reduce noise produced by the power supply caused by coupling into the output drive signal. This noise is from the midrail generation circuit internal to the amplifier, which appears as degraded PSRR and THD+N. Bypass capacitor (C BYPASS ) values of 0.47-µF to 1-µF ceramic or tantalum low-ESR capacitors are recommended for the best THD noise, and depop performance. VREF decoupling capacitor The VREF terminal (pin 23) is the output of an internally-generated 5-V supply, used for the oscillator and gain setting logic. It requires a 0.1-µF to 1-µF capacitor to ground to keep the regulator stable. The regulator may not be used to power any additional circuitry. differential input The differential input stage of the amplifier cancels any noise that appears on both input lines of the channel. To use the TPA3000D1 EVM with a differential source, connect the positive lead of the audio source to the INP input and the negative lead from the audio source to the INN input. To use the TPA3000D1 with a single-ended source, ac ground the INN input through a capacitor and apply the audio single to the input. In a single-ended input application, the INN input should be ac-grounded at the audio source instead of at the device input for best noise performance.

SLOS379A – SEPTEMBER 2001 – REVISED JANUARY 2002 17www.ti.com ,APPLICATION INFORMATION SHUTDOWN operation The TPA3000D1 employs a shutdown mode of operation designed to reduce supply current (ICC ) to the absolute minimum level during periods of nonuse for battery-power conservation. The SHUTDOWN input terminal should be held high during normal operation when the amplifier is in use. Pulling SHUTDOWN low causes the outputs to mute and the amplifier to enter a low-current state, ICC(SD) = 1 µA. SHUTDOWN should never be left unconnected, because amplifier operation would be unpredictable. Ideally, the device should be held in shutdown when the system powers up and brought out of shutdown once any digital circuitry has settled. However, if SHUTDOWN is to be left unused or if the device is to be powered up with SHUTDOWN held high, the circuit below should be used. C SD 0.1 µF SHUTDOWN Pin 23 R (SD) 120 kΩ VCC (or SHUTDOWN Control Signal, TTL Compatible) The values for RSD and CSD should be chosen for a time constant (τ = RSD C SD ) of at least 10 ms for proper operation. The maximum output current of the SHUTDOWN control signal source must not be exceeded. using low-ESR capacitors Low-ESR capacitors are recommended throughout this application section. A real (as opposed to ideal) capacitor can be modeled simply as a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects of the capacitor in the circuit. The lower the equivalent value of this resistance the more the real capacitor behaves like an ideal capacitor.

MHTS001D – JANUARY 1995 – REVISED MAY 1999 18 www.ti.com MECHANICAL DATA PWP (R-PDSO-G) PowerPAD  PLASTIC SMALL-OUTLINE 4073225/F 10/98 0,50 0,75 0,25 0,15 NOM Thermal Pad (See Note D) Gage Plane 2824 7,70 7,90 6,40 6,60 9,60 9,80 6,60 6,20 0,19 4,50 4,30 0,15 A 0,30 1,20 MAX 1614 5,10 4,90 PINS 4,90 5,10 DIM A MIN A MAX 0,05 Seating Plane 0,65 0,10 M0,10 0°–/C02578°

20 PINS SHOWN

NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusions. D. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. This pad is electrically and thermally connected to the backside of the die and possibly selected leads. E. Falls within JEDEC MO-153 PowerPAD is a trademark of Texas Instruments.

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third–party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright  2002, Texas Instruments Incorporated