TP5700A NSC | Alldatasheet

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Y 5 mA–120 mA loop operation Y Voltage swing down to 1.0V Y Electret microphone amplifier Y Receive amplifier with push-pull outputs Y Automatic gain compensation for loop length Y Sidetone impedance independent of input impedance Y DTMF interface with muting Y Voltage regulator outputs for DTMF generator etc. Y Works in parallel with a standard phone on 20 mA loop Y Available in small outline surface mount package Simplified Block Diagram TL/H/5201–1 C1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. V a with Respect to V b 20V Voltage at Any Other Pin V a a 0.3V to V b b 0.3V Operating Temperature, T A b25§Ct o a70§C Power Dissipation (Note 3) 1W Storage Temperature, T S b65§Ct o a150§C Junction Temperature 150 §C Lead Temperature (Soldering, 10 seconds) 300 §C Unless otherwise specified, all tests based on the test circuits shown in Figure 1 , all limits printed in bold characters are guaranteed at T A e 0§Ct o a60§C by correlation with 100% testing at T A e 25§C. All other limits are assured by by correlation with other production tests, and/or product design and characterization. Symbol Parameter Conditions Min Typ Max Units ILOOP e 5 mA 2.8 V VT-R Tip-Ring Voltage including e 20 mA 4.5 V nominal 1.4V polarity guard e 50 mA 7 V (See Figure 1 ) e 80 mA 10.5 V e 120 mA 15 V VI Minimum Instantaneous V a to V b 1.0 V Voltage Swing I LOOP e 5mA TRANSMIT AMPLIFIER RXIN Input Resistance From Pin 7 to V b 15 30 50 k X GXA Gain at 1 kHz R AGC e 0X to V b ILOOP e 20 mA, T A e 25§C only 33 35 37 dB GXT Gain Variation v. T A g1d B GXI Gain Variation v. I LOOP ILOOP e 20 to 100 mA b6d B NX Transmit Noise MIC IN 1 e 0V 12 18 dBrnC S/DX Signal/Total Harmonic I LOOP t 20 mA Distortion V L e 800 mVrms 2 10 % GXM Gain Change when MUTED MUTE IN t VMON b55 dB DTMF AMPLIFIER RDIN Input Resistance From Pin 8 to V b 10 20 55 k X GXD Gain at 1 kHz R AGC e 0X to V b ILOOP e 20 mA, T A e 25§C only 3.5 5.5 7.5 dB S/DXD Signal/Total I LOOP e 20 mA 3 10 %Harmonic Distortion V L e 1.06 Vrms, T A e 25§C only GXDT Gain Variation v. T A g1d B GXDI Gain Variation v. I LOOP ILOOP e 20 to 100 mA b6d B MUTE INPUT IMIN Input Current Pin 9 e 1.5V 40 mA VMOFF MUTE OFF Input Voltage 0.5 V VMON MUTE ON Input Voltage 1.5 V

with other production tests, and/or product design and characterization. FIGURE 1. Test Circuits for Electrical Characteristics Note 1. Adjust V DC to set specified I LOOP current. tain a DC slope resistance similar to that of a standard phone. DC provides an adjustment for the slope resistance.

TL/H/5201–5 Top View Order Number TP5700AM or TP5700AN See NS Package M16B or N16A Pin Descriptions Pins 1, 2 RCV0a and RCV0 b The push-pull complementary outputs of the receive amplifi- er. Dynamic transducers with a minimum impedance of 100 X can be directly driven by these outputs. Pin 3 Vb This is the negative supply input to the device and should be connected to the negative output of the polarity guard. All other voltages on the device are referred to this pin. Pin 4 S/T This is the output of the Sidetone cancellation signal, which requires a balance impedance of approximately 10 times the subscriber’s line impedance to be connected from this pin to V a (pin 13). Pin 5 XDI The input to the line output driver amplifier. Transmit AGC is applied in this stage. Pin 6 XPO This is the transmit pre-amp output which is normally capac- itively coupled to pin 5. Pin 7 MIC IN 1 This is the inverting input to the transmit pre-amplifier and is intended to be capacitively coupled to an FET-buffered electret microphone. Pin 8 DTMF IN The DTMF input which has an internal resistor to V b to provide the emitter load resistor for a CMOS DTMF genera- tor. This input is only active when MUTE IN (pin 9) is pulled high. Pin 9 MUTE IN The MUTE Input, which must be pulled at least 1.5V higher than V b to mute MIC IN and enable DTMF IN. Pin 10 VREG1 The regulated output for biasing a pulse dialer or DTMF generator. A 4.7 mF decoupling capacitor to V b should be fitted if this output is used. Pin 11 VREG2 A 1.2V regulated output suitable for powering a low-voltage electret microphone. A 1 mF decoupling capacitor to V b should be fitted if this output is used. Pin 12 RCV IN The receive AGC amplifier input. Pin 13 V a This is the positive supply input to the device and should be connected to the positive output of the polarity guard. The current through this pin is modulated by the transmit signal. Pin 14 R DC An external 1W resistor is required from this pin to V b to control the DC input impedance of the circuit. The nominal value is 56 X for low voltage operation. Values up to 82 X may be used to increase the available transmit output volt- age swing at the expense of low voltage operation. Pin 15 V BIAS This internal voltage bias line must be connected to V a via an external resistor, R o, and decoupled to V b with a 22 mF capacitor. R o dominates the AC input impedance of the cir- cuit and should be 620 X for a 600 X input impedance or 910X for a 900 X input impedance. Pin 16 RAGC The range of transmit and receive gain variations between short and long loops may be adjusted by connecting a resis- tor from this pin to V b (pin 3). Figure 3 shows the relation- ship between the resistor value and the AGC range. This pin may be left open-circuit to defeat AGC action. TL/H/5201–7 FIGURE 3

last-number dialed memory will keep this capacitor charged. IN pin on the Speech Circuit. FIGURE 5. Typical Pulse Dialing Telephone

TP5700A Telephone Speech Circuit Physical Dimensions inches (millimeters) Lit. Ý113984 Order Number TP5700AM Molded Dual-in-Line Package (N) Order Number TP5700AN LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.

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a49) 0-180-530 85 86 13th Floor, Straight Block, Tel: 81-043-299-2309 Arlington, TX 76017 Email: cnjwge @ tevm2.nsc.com Ocean Centre, 5 Canton Rd. Fax: 81-043-299-2408 Tel: 1(800) 272-9959 Deutsch Tel: ( a49) 0-180-530 85 85 Tsimshatsui, Kowloon Fax: 1(800) 737-7018 English Tel: ( a49) 0-180-532 78 32 Hong Kong Fran3ais Tel: ( a49) 0-180-532 93 58 Tel: (852) 2737-1600 Italiano Tel: ( a49) 0-180-534 16 80 Fax: (852) 2736-9960 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.