TP3210

TP3210 NSC | Alldatasheet

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Technical content

FIGURE 1. Simplified Block Diagram

S| Connection Diagram [pin [Description = = Top View Transmit frame synchronization pulse input which enables BCLK to shift the PCM information out of Dx. FSx is an 8 kHz pulse an 40 FRING train. See Figures 8 and 9 for timing details. RN]2 The TRI-STATE® PCM data output which is Veat 3 38-1 enabled by FSx. RPR—~| 4 TS Open drain output which pulses low during TRIS 36F—TIPS: the period when the Dx output is enabled. FSR Receive frame synchronization pulse input iNR-7 34, RINGS which enables BCLK to shift the PCM. Gs information into Dr. FSR is an 8 kHz pulse saL-reuse train. See Figures 8 and 9 tor timing details. coms BU Receive data input. PCM data is shifted into Cl—t10 Sip-RBUS- Dr during the receive timeslot determined GNDI—]11 by FSR. CouK—412 29) RRLY CCLK | Control clock used to shift control data into MCLK—=413 28; RLYi Cl and out of CO during CS low. CLKSEL 14 27;—RLY2 Chip select input. Must be low to enable the pcuk 415 26/—cND3 shifting of control data into Ci and out of 16 25-00 - me 7 zoe cl The serial contro! data input used to set the — operating state of the module. TSeV18 237 Vo The serial status output used to monitor the FSx—719 22 -GNO2 operating state of the module. CO is TRI- FSp—420 21 Voce STATE when CS is high. See Figure 3 for timing diagram. TU/H/9422-2 init i Open drain interrupt output. A logic low Order Number TP3210J indicates a change in the status of the Pin D. ipti shutdown. In Descriptions Ves Negative power supply. Vag = 5V +5%. [pin [Description | Decoupled by internal 0.047 yF to ground. Normally positive side of the subscriber line. Positive power supply. Voc = 5V +5%. Normally negative side of the subscriber Decoupled by internat 0.047 wF to ground. line. ARLY | Ring Relay Driver. Controlled by State TPR High voltage line driver output. Connects to Control Data Word bite {eco able 0), this TIP via an external protection network. det fomatically turned off when ring trip is High voltage line driver output. Connects to ~ - [rr RING via an external protection network, | ovr Genera purpose relay eriver controled by TIPS Positive ring sensing input. Connected to ALv2 > a " 2 | General purpose relay driver controlled by the positive side of the subscriber loop “ during ringing. State Control Data Word bit D6. —— 7 GND1 | Low Voltage Ground. Vag, Vcc and all me | Negative rg sensing input. Connected fo GND2 | dita signals ar roforenced'o these pins. pace GND3 GND1, GND2 and GND3 should be Guring ringing. externally connected together close to the RBUS+ | Positive ring bus sensing input. Connected module. Collectively referenced as GND in to the positive side of the ring bus. electrical specifications. RBUS— | Negative ring bus sensing input. Connected Vpat Negative high voltage supply. to the negative side of the ring bus. Vpat = —55V to —59V. BCLK Bit Clock used to shift PCM information into RTN High voltage ground return. Vgar and all Dp and out of Dx. May vary from 64 kHz to analog signals are referenced to this pin. 2.048 MHz in 8 kHz increments. Don’t connect. Do not make external MCLK — | Master Clock. Must be 1.536, 1.544 or connections to these pins. 2.048 MHz. CLKSEL | Master Clock Select Input. Must be connected high for 1.536 or 1.544 MHz operation. Must be connected low for 2.048 MHz operation. 4-144

Functional Block Description 8 Block Block Line Driver The Line Driver is a differential output comBO The COMBO provides the PCM transconductance amplifier which filtering, encoding and decoding Provides the d.c. power and balanced functions necessary to interface the ac. signals to the subscriber line. The PCM highway to the analog signals on Loop Impedance Control circuit. The identical to the industry standard ac. signal applied to the line is TP3054 COMBO CODEC/Filter (see controlled by the a.c. Loop !mpedance the TP3054 datasheet for full details). Gontrated oy he Tesdst COMBO Control The Control interface circuit provides CODEC/Filter from the received PCM Interface easy control and monitoring of the information. Feedback from the TIP State of the TP3210 via a simple serial and RING lines produces an effective interface. Via this circuit the user can longitudinal input impedance of about Program the operating mode of the 1502 from TIP and RING to RTN (752. module, and monitor the line status total). In the presence of large (see Table | for details). longitudinal currents, each output of the Line Driver is capable of sourcing Functional Description or sinking current to limit the longitudinal voltage. Power-On Line Receiver __| The Line Receiver monitors the When power is first applied, the power-on reset circuitry ini- metallic (differential) voltage on the tializes the TP3210 and places it in a standby mode. The line in the presence of large State Control Data Word is cleared to “0”. All unnecessary longitudinal (common mode) voltages. circuitry is powered down. The serial control interface and the loop supervision circuitry remain fully functional. The de- Loop Impedance | The Loop impedance Control feeds vice is now ready for activation, either by the user program- Control back the fina vettaga to produce a ming it into the ring mode by writing into the State Control impedance Tor lon ger loops anda Data Word or by the subscriber going off-hook, powering-up constant current d.c. feed for shorter the device automatically. loops while maintaining an a.c. 2-wire The State Control Data Word eo re eee tend, cosy mostra The State Control Data word is a single eight-bit word as the 2-wire return loss requirements. shown in Table |. Bits DO-D7 of the control word program the operating state of the device. The module can override Hybrid Balance | The Hybrid Balance Control circuit the control bits D2 and D3 to activate the power deniat Control consists of four software selectable mode in order to protect itself from damage under a thermal networks, assuring that the 4-wire overload condition. return loss requirements are met for a variety of conditions. Status Word Loop “The Loop Supervision circuit monitor The eight-bit Status Word indicates the status of the Supervision the dic. current flow in the subscriber TP3210 at the instant a read operation is performed. Table loop under non-ringing state and IV shows the definitions of the status word. A logic high detects on-hook, off-hook and indicates that the state or function is enabled, a low indica- replicates dial pulses. tse that it is disabled. Ring The Ring Supervision circuit monitors The Control Interface Supervision the d.c. current flow in the subscriber The Control Interface consists of a single eight-bit shift reg- loop during the ringing state. This ister and a buffer register. The shift register is written via the preut is capable of Getecting an off serial input Cl, under the control of CS and GCLK, to pro- the presence of lage a.c. ringing " gram the device's operating state, Several bits of the shift signals. It operates on loops with register may be altered by the device itself in response to ringing superimposed on TIP or RING changes in the subscriber loop status. These changes in or with balanced ringing. It supports state may be read via the serial output CO. The S2 and S3 bridged ringers, ringers to ground on status bits are over-written by the occurrence of a thermal either TIP or RING and with overload, forcing the device into the Power-Denial mode. S7 superimposed ringers. is the hook-switch status bit. A logic “0” for S7 indicates an - - Off-Hook or Ring-Trip condition exists at the instant of ac- Relay Drivers ane three vey relay avers are capatle cess and a logic “1” indicates on-hook. Any changes in line FALY dedoutedtothere cindy status, or thermal shutdown condition will generate an inter- automatically turned off when ring trip is tupt at INTR output. detected by the Ring Supervision circuit. RLY1 and RLY2 are general purpose. Relay currentwillbereturnedto GND3at pin 26. 1-145

o $| Functional Description (continued) & TABLE |. State Control Data Word Control BR Description D7 Don't Care. This bit is overwritten by the line supervision circuitry. Dé A logic ““1" turns on RLY2. DS A logic “1” turns on RLY1. D4 A logic “1” enables Ring mode, turns on RALY and Ring Supervision circuit. Status Bit S7 indicates ring-trip. Logic “0” at D4 enables the normal non-ringing mode. D3 Used with D2 to select Power Denial, Battery Reversal and On-Hook Transmission modes. See Table Il. Under Power Denial mode, the Line Driver is disabled, denying power to the subscriber loop. it can be set or cleared by a write operation. Under a thermal overload condition, D2 is forced to “0” and D3 is forced to “1” in order to protect the device from damage. As tong as the thermal overload condition exists, the Power Denial mode cannot be cleared by a write operation. d2 Used with D3 to select Power Denial, Battery Reversal and On-Hook Transmission modes. See Tabte Il. D1 Used with DO to select hybrid balance network. See Table Ill. DO Used with D1 to select hybrid balance network. See Table Ili. TABLE Il. Operating Modes of TP3210 In the Write/Read operation, the objective is to change the [pa | os | v2 | Mode _—sz| state of the device. While shifting the new state control data into Cl, the previous status information is shifted out of CO. [0 [0 | 0 | Noma | _This data should bo compared with the previous status i formation to determine if a change had occurred since the [o [0 | 1 [Reverse Battery lat access. [To fot [0] PowerDeniar | _ Inthe Read/Wrta operation, the objective isto monitor the | state of the module. While the current status is shifted out at | o | 1 [+ | ontook transmission CO, the last known state of the device is shifted into Cl D1 [ox [ox [ong] _ externally: It thermal overload condition has occured since the last access, the device wilt automatically set itself to the power denial mode (S2 bit will be forced to “O" and TABLE Ill. Hybrid Balance Test Networks $3 bit will be forced to ‘1") prior to the access and will be Reference reset by writing the previous state. This has no detrimental D1 Network effect, however, since the power-denial mode will immedi- Test Netwo ately be set again and the device will remain in the Power- [ o | o | 9002 Denial mode as long as the thermal overload continues to [0 | 1 | tes0njcto0n + 0.005 uF) _| exist. If ring trip has occurred or the hook switch status has 1 16500(1000 + 0.005 wF) changed since the last access, the S7 bit will also be altered [1 | o | 8000/|(1008 + 0.05 pF) by the device. The timing for the Write/Read or Read/Write La | [soon +216uF |The cick stems Reed ope u [1d 9000 + 2.16 WF The Quick Status Read operation allows a fast read of the There are several ways of accessing the serial control inter- 7 status bit, which indicates if a Ring-Trip or Off-Hook con- face. They are: dition exists. It does not cause the shift register to shift, thus a. Write/Read no control data is required. Figure 3 is the timing diagram for b. Read/Write the Quick Status Read Mode. c, Quick Status Read 1-146

3 Functional Description (continued) Loop Supervision

| Battery Feed The Loop Supervision circuit operates in the normal (non- The apparent battery voltage across the line is approximate- ringing) state. At normal battery polarity, off-hook is indicat- ly 0.86 X Vga. With Vgat = —56V, the TP3210 provides ed when loop current exceeds nominally 8.5 mA and on- anominal apparent battery voltage of — 48V across TIP and hook indicated when the current falls below nominally RING. The module provides a resistive/inductive feed at 6.5 mA, providing a 2 mA hysteresis. The Loop Supervision longer loops. The d.c. current feed has been designed to has been designed to maintain the dial pulse make interval guarantee 21 mA into a 19002 loop at nominal battery. At greater than 25 ms regardless of the distortion introduced shorter loops, the d.c. feed is current-limited to nominally by the loop characteristics. At reversed battery polarity, off- 43 mA in order to conserve power. At normal battery polarity hook is detected when loop current exceeds nominally (D2=0 and D3=0), TIP is more positive than RING. The 42 mA and on-hook indicated when current falls below nom- current feed characteristic is shown in Figure 4. inally 10 mA. A logic ‘‘1" at status bit S7 indicates on-hook, while a logic “0” indicates off-hook. For Ground Start Sig- bs nalling, TIP is opened with an external relay. Off-hook is | | indicated when the current from RING to ground exceeds Ey nominally 17 mA and on-hook when the current falls below | nominally 13 mA. z 0 A typical example of hook switch timing is illustrated in Fig- : ure 5, While in the standby mode, all unnecessary circuitry is i ” powered down. When Loop Supervision detects off-hook, 8 the module is powered up, INTR goes low and status bit S7 a aa is cleared (A). The INTR remains active until CS goes low : and status is read, at which time the status of the switch ° ! hook is latched, clearing INTR {B). When the Loop Supervi- t ‘sion detects on-hook, all unnecessary circuitry is again pow- 5 : ered down, status bit S7 is set and INTR is again set low (C). When the status information is read, the present switch 6 epee og oe eee te ee hook status is latched, clearing the interrupt, and INTR goes R.oor=(Weae*Rsanon) = ka high (0). In the case of either on-hook or off-hook, if the TL/H/9422-5 system fails to read the status before the switch hook re- FIGURE 4, DC Feed Characteristics verts to its previous state, the interrupt will clear itself (E). If the device's control interface is being accessed when off- 2-Wire Impedance hook oceurs, i.e., CS is low, INTR is set low immediately (F) The nominal 2-wire input impedance is 9000 + 2.16 pF. but S7 is cleared only after CS returns high (G). On the next This is shunted by a feed inductance which is nominally 26 Read/Write access, S7 is latched Henries on long loops, and approaches infinity on short loops. ooo OFF=H00K ‘n= H00K Transmission Level _ The 0 TLP is referenced at the PCM interface of the four =~LT LI LL wire ports. The TP3210 has 0.1 dB loss for both transmit _ and receive signals. On the 2-wire analog interface, the se LF LF LIL transmit is +0.1 TLP and the receive is —0.1 TLP, 0 TLP is defined as 0 dBm into 9000. a a Hybrid Balance om LLY The Hybrid Balance Control circuit contains four selectable rar co ers balance networks which are selected by programming State TUH/9422-6 Control Word bits DO and D1. The balance networks are FIGURE 5. Typical Hook Switch Detect Timing intended to be used with the corresponding reference test Ring Si isi networks for hybrid balance as shown in Table Ill. ing Supervision The Ring Supervision circuit measures the loop current Longitudinal Balance and across two 3602. ring sensing resistors with a 1 MQ internal Longitudinal Current Capability resistive bridge (see Figure 10). The voltage at the output The 2-wire input of the device exhibits a longitudinal imped- of the bridge is filtered, then algebraically added and sub- ance of 1502 from TIP to ground and from RING to ground. tracted from a voltage corresponding to a loop current of These impedances are extremely well matched and are not about 11 mAdc. Each of the resulting voltages are integrat- ‘strongly dependent on impedance matching in the external ed over one period of the ring frequency and compared to protection network. The longitudinal voltage is sensed on zero. If either of the resulting voltages is less than zero for the loop side of the protection network and fed back to the two consecutive cycles, ring-trip is detected. RALLY is de-ac- Line Driver, thus any component variations external to the tivated, status bit S7 is cleared to “0” indicating ring trip, device can be corrected by the feedback loop. The Line and an interrupt is also generated. Control bit D4 is not au- Driver is capable of handling 20 mArms of longitudinal cur- tomatically reset to “0”, it has to be cleared to “O" by a rent in each of the TIP and RING leads. write/read operation after a ring trip is detected. If the MCLK is interrupted and stays continuously high or low for more than 200 us, the ring relay driver will be turned off. 4-148

1. Furthermore, it operates with up to five ringers con- by a control write to normal mode, clearing S2 and S3 to

The ring sensing inputs at TIPS, RINGS, RBUS+ and after CS returns high (E). A typical example of ring trip timing is illustrated in Figure 6. i ST call initiation in the normal manner. FIGURE 6. Typical Ring Trip Detect Timing rising edge and latches the PCM data into Da on its falling the Power-Denial mode, and INTR is set low. The interrupt ther a short frame sync pulse or a long frame sync pulse.

. v Absolute Maximum Ratings Ss It Military/Aerospace specified devices are required, TPR, RPR to RTN +2Vto —85V(50ms) | S please contact the National Semiconductor Sales TIP, RING, TIPS, RINGS +1000V, Office/Distributors for availability and specifications. RBUS+, RBUS— to RTN 10 s/1000 ps Pulse Voc to GND —0.5V to +7V Operating Temperature Range —25°C to + 125°C Vep to GND +0.5V to ~7V Storage Temperature Range —65°C to + 150°C Veat to RTN +0.8V to —70V Lead Temperature RTN to GND +500V, 10 18/50 xs Pulse (Soldering, 10 Sec) 300°C Voltage at Any Digital Maximum Junction Temperature 150°C Input or Output Voc + 0.3V to GND — 0.3V

Electrical Characteristics

Unless otherwise noted, limits printed in bold characters are guaranteed for Voc = 5.0V +5%, Vag = —5.0V +5%, Vaat = ~5B5V to —59V, Ta = 0°C to +70°C by correlation with 100% electrical testing at Ta = 25°C. All other limits are assured by correlation with other production tests and/or product design and characterization. Typical characteristics are specified at Voc = 5.0V, Vas = —5.0V, Vaat = —58V, Ta = 25°C. All digital signals are referenced to GND, all analog signals are referenced to RTN. symbol | Parameter | Conaitions [min] tye [max [units POWER DISSIPATION (Normal Mode: D2=0, 03=0) teato | Vear tale Curent Noo =OmAVear=—s7v | | 2a [| ae | ma tooo VoclateCurent | top=oma_ | | || ma tears hoop = 20mAVear=—s7v | [23 | 8 | ma leo! oo Active Curent | lupop = 20 mA ee ee POWER DISSIPATION (On-Hook Transmission Mode: D2= 1, D3=1) tegon | Vapictecurent [| ttep=oma | | | ase | ma DIGITAL INTERFACE (Note 1) Vi Imputtowteve [Tr TV Vin Input High Level All Digital Inputs except CLKSEL v CLKSEL Vv Vow Output Low Level Dx, TSx, CO, IL = 3.2mA Vv INTR, IL = 2.0mA v Ie Input Low Current GND < Vin < Vi, A All Digital Inputs e hin Input High Current Vin < Vin < Voos A All Digital Inputs bas 1 lou Output High Current TSx and INTR, A Vox < Vout < Voc M loz Output Current in the CO, Dx High Impedance BA State (TRI-STATE) Note 1: See Appendix | for the definition of digital interface parameters. 1-151

J $| Electrical Characteristics | Unless otherwise noted, limits printed in bold characters are guaranteed for Voc = 5.0V +5%, Vas = —5.0V +5%, Veat = —55V to —59V, Ta = 0°C to +70°C by correlation with 100% electrical testing at Ta = 25°C. All other limits are assured by correlation with other production tests and/or product design and characterization. Typical characteristics are specified at Voc = 5.0V, Veg = —5.0V, Vear = —56V, Ta = 25°C. All digital signals are referenced to GND, all analog signals are referenced to RTN. (Continued) Symbot_[ Parameter | Gonations | win [tye | max | unis BATTERY FEED hoop + Loop Current Roop = 19009, Vea = —55V mA RLoop = 13009, Vaat = —57V mA Roop = 2002, Vaat = —59V mA Vep = —5V +5% Nop — Reverse Loop Roop = 19002, Vaar = —58V 20 mA Current Fioop = 13002, Vaat = —57V 26 mA Poop = 2002, VaaT = —59V 38 mA Veg = —5V +5% lpp Power Denial Loop Roop = 2002 mA Current Viop __|_ Loop Vattage [Ric tonn | mse | LOOP SUPERVISION Roffhk0 Loop Resistance to Produce Roffhk0 Connected from TIP to an Off-Hook Indication RING, Vgat = —55V a at Loop Start RonhkO Loop Resistance to Produce | Ronhk0 Connected from TIP to an On-Hook Indication RING, Vgat = —59V ko at Loop Start Roffhk1 Loop Resistance to Produce Rofthk1 Connected from RING an Off-Hook Indication to RTN, TIP Open a at Ground Start Vpat = —55V Ronhk1 Loop Resistance to Produce Ronhk1 Connected from RING to an On-Hook Indication RTN, TIP Open. ko at Ground Start Veat = —59V DPD Dial Pulse Distortion Rieak = 10k2 || (5kM + 2.16 pF) Roop = 2002, 12 pps, Break = 64% ms Roop = 19002, 12 pps, Break = 64% ms CS High, Measure Width of Make Period at INTR RING SUPERVISION RNGTRP1 Ring Trip Detect, RBUS+ = OV, RBUS— = —48V Normal Ringing TIPS = —4.70V, RINGS = —43.3V, ms Must Detect Ring-Trip within the Specified Time FRNGTRP2 Ring Trip Detect, RBUS+ = —48V,RBUS— = OV, Reverse Ringing TIPS = —43.3V, RINGS = —4.7V, ms Must Detect Ring-Trip within the Specified Time 1-152

Electrical Characteristics 8 Unless otherwise noted, limits printed in bold characters are guaranteed for Voc = 5.0V +5%, Vag = —5.0V +5%, Vaart = | = —55V to —59V, Ta = O°C to + 70°C by correlation with 100% electrical testing at Ta = 25°C. All other limits are assured by e correlation with other production tests and/or product design and characterization. Typical characteristics are specified at Voc = 5.0V, Veg = —5.0V, Vaat = —56V, Ta = 25°C. All digital signals are referenced to GND, all analog signals are referenced to RTN. (Continued) symbol_[ Parameter |_—Conattons | Min | typ | Max | unite RING SUPERVISION (Continued) RNGTRP3 Ring Trip Non-Detect RBUS+ = OV, RBUS— = —48V, Normal Ringing TIPS = —3.25V, RINGS = —44.75V, ms Must Not Detect Ring-Trip within the Specified Time (Note 2) RNGTRP4 Ring Trip Non-Detect RBUS+ = —48V, RBUS— = OV, Reverse Ringing TIPS = —44.75V, RINGS = —3.25V, ms Must Not Detect Ring-Trip within the Specified Time (Note 2) RNGTRPS Ring Trip Detect, TIPS, RBUS— = —4.7V, RINGS, Normal Ringing RBUS+ = 17 Vrms, f = 20 Hz, Must Detect Ring-Trip ms within the Specified Time RNGTRP6 Ring Trip Detect TIPS, RBUS— = 17 Vrms, RINGS, Reverse Ringing RBUS+ = —4,7V,f = 20Hz, ms Must Detect Ring-Trip within the Specified Time RNGTRP7 Ring Trip Non-Detect TIPS, RBUS— = —3.25V, RINGS, Normal Ringing RBUS+ = 17 Vrms, f = 20 Hz, ms Must Not Detect Ring-Trip within the Specified Time (Note 2) RNGTRPS Ring Trip Non-Detect TIPS, RBUS— = 17 Vrms, RINGS, Reverse Ringing RBUS+ = —3.25V,f = 20Hz, me Must not Detect Ring-Trip within the Specified Time (Note 2) HYBRID BALANCE Unless otherwise specified, ILoop = 20 mA, D2=0, D3=0 ECHO1 4-Wire Return Loss Zrer = 9002 across Tip-Ring D1 =0,D0=0 f = 203.125 Hz 21 0B = 484.375 Hz 26 4B = 1015.625 Hz 26 dB = 2500 Hz 26 dB = 3406.25 Hz 21 dB ECHO2 4-Wire Return Loss ZpeF = 16502 || (1002 + 0.005 pF) D1 =0,D0=1 f = 203.125 Hz 21 dB = 484.375 Hz 26 dB = 101,625 Hz 26 dB = 2500 Hz 26 dB = 3406.25 Hz 21 dB ECHO3 4-Wire Return Loss Zper = 8002 | (1002 +0.05 wF) D1 = 1,D0=0 f = 203.125 Hz dB = 484.375 Hz dB = 1015.625 Hz dB = 2500 Hz dB = 3406.25 Hz dB Note 2: The intent of Ring Trip Non-Detect tests are to ensure that ring does not occur under the specified conditions even after an essentially infinite period of time. For practical purposes of cost effectively testing the SLIM Subscriber Line Interface Module, the wait time to determine that a false ring trip has not occurred has necessarily been limited to a value which has been determined through characterization to ensure that false ring trip never occurs. 1-153

o $| Electrical Characteristics | Unless otherwise noted, limits printed in bold characters are guaranteed for Voc = 5.0V +5%, Ves = —5.0V +5%, Vaart = —55V to —59V, Ta = 0°C to +70°C by correlation with 100% electrical testing at Ta = 25°C. All other limits are assured by correlation with other production tests and/or product design and characterization. Typical characteristics are specified at Voc = 5.0V, Vag = —5.0V, Vpat = —56V, Ta = 25°C. All digital signals are referenced to GND, all analog signals are referenced to RTN. (Continued) symbol [Parameter | Gonaittons | min_ | typ | Max | units HYBRID BALANCE (Continued) ECHO4 4-Wire Return Loss Zper = 9000 + 2.16 pF D1 =1,D0=1 f = 203.125 Hz dB = 484.375 Hz dB = 1015.625 Hz 40 dB = 2500 Hz dB = 3406.25 Hz dB TRANSMISSION Unless Otherwise Noted, Zper = 9002 + 2.16 pF, f = 1015.625 Hz, lLoop = 20 mA, D2 = 0,03 = 0 RTNLOSS 2-Wire Return Loss f = 203.125 Hz dB = 484.375 Hz dB = 1015.625 Hz dB = 2500 Hz dB = 3406.25 Hz dB 0dBmO The Absolute 2-Wire The Absolute Reference Level at Reference Level at the 2-Wire Interface is Defined 0.949 Vrms as 0 dBm into 9000. Veat = —S6V,f = 1015.625 Hz, -01 dB Ta = +25°C, Input = Digital Code for 0 dBm0 at Dr, Measure Voltage across TIP-RING. Vpat = —56V, f = 1015.625 Hz, dB Ta = +25°C, Input = 0 dBm0 at 2-Wire Port, Measure Digital Code at Dx. at On-Hook Transmission Mode | Vgat = —56V,Ta = +25°C, de Zper = 9000 + 2.16 pF ILoop = 0 mA, D2=1,D3=1 at On-Hook Transmission Mode | Vgat = —56V, Ta = +28°C, -0.1 dB lLoop = 0 mA, D2=1,D3=1 over Supply Range Vpat = —55V to —59V, qB f = 1015.625 Hz ‘over Supply Range Veat = —55V to —59V, dB t = 1015.625 Hz GRT Receive Gain Variation Voc = 5V, Vea = —5V, over Temperature Veat = —56V,f = 1015.625 Hz dB Reference to GRA GXxT Transmit Gain Variation Voc = 5V, Vag = —5V, over Temperature Vat = —56V,f = 1015.625 Hz -01 0.1 qB Reference to GXA 1-154

Electrical Characteristics 8 Unless otherwise noted, limits printed in bold characters are guaranteed for Voc = 5.0V +5%, Vag = —5.0V +5%, Vgat = o —55V to —59V, Ta = 0°C to + 70°C by correlation with 100% electrical testing at Ta = 25°C. All other limits are assured by correlation with other production tests and/or product design and characterization. Typical characteristics are specified at Voc = 5.0V, Veg = —5.0V, Veat = —56V, Ta = 25°C. All digital signals are referenced to GND, all analog signals are referenced to RTN. (Continued) TRANSMISSION Unless Otherwise Noted, Zper = 900M + 2.16 uF, f = 1015.625 Hz, lLoop = 20 mA, D2= 0, D3=0 (Continued) GRF Receive Frequency Response Measure Relative to GRA, f = 203.125 Hz -1.9 ° dB = 296.875 Hz -0.4 0.25 dB = 484.375 Hz -0.25 0.25 dB = 2015.625 Hz -0.25 0.25 dB = 2703.125 Hz ~0.25 0.25 dB = 3015.625 Hz —0.25 0.25 * dB = 3203.125 Hz -O.25 0.25 dB = 3390.625 Hz 1.2 o dB = 3984.375 Hz —14 dB sos. Spurious Out of Band Measure Relative to GRA, Signals (Alias Tones) f = 4796.75 Hz dB = 6703.125 Hz dB = 11390.625 Hz dB GXF Transmit Frequency Response Measure Relative to GXA, f = 62.500 Hz —21 dB = 203.125 Hz -2.5 o dB = 296.875 Hz -0.4 0.25 dB = 484.375 Hz -0.25 0.25 dB = 2015.625 Hz —0.25 0.25 dB = 2703.125 Hz -0.25 0.25 dB = 3015.625 Hz ~0.25 0.25 dB = 3203.125 Hz -0.25 0.25 dB = 3390.625 Hz 1.2 °o dB = 3984.375 Hz -14 dB = 5046.875 Hz —32 dB = 11890.625 Hz -32 dB GRL Receive Gain Variation Measure Relative to GRA with Signal Level PCM Level = 3.1dBmO -0.25 0.25 dB = -23dBmO —0.25 0.25 dB = ~11.4dBmO0 —0.25 0.25 dB = —17.6 dBmO -0.25 0.25 dB = —23.9dBmO 0.25 0.25 dB = —29.9dBmO —0.25 0.25 dB = —37.8dBmO -0.25 0.25 dB = —47.1dBmO -0.45 0.45 dB = —55.7 dBmO -1.3 1.3 dB 1 | GXL Transmit Gain Variation Measure Relative to GXA with Signal Level PCM Level = 3.1dBmO -0.25 0.25 dB = —2.3dBmO —0.25 0.25 dB = -11.4dBm0 -0.25 0.25 dB = —17.6 dBmO -0.25 0.25 dB = —23.9dBmO -0.25 0.25 dB = —29.9dBm0 -0.25 0.25 dB = —47.1dBmO -0.45 0.45 dB = ~55.7 dBmO -1.3 1.3 dB 1-155,

e $| Electrical Characteristics & Unless otherwise noted, fimits printed in bold characters are guaranteed for Voc = 5.0V +5%, Vag = —5.0V +5%, VaaT = —55V to —59V, Ta = 0°C to +70°C by correlation with 100% electrical testing at Ta = 25°C. All other limits are assured by correlation with other production tests and/or product design and characterization. Typical characteristics are specified at Voc = 5.0V, Vag = —5.0V, Veat = —56V, Ta = 25°C. All digital signals are referenced to GND, all analog signals are referenced to RTN. (Continued) symbol | Parameter | ——Gonditions | Min. | typ | Max | Unts TRANSMISSION Unless Otherwise Noted, Zper = 9009 + 2.16 uF, f = 1015.625 Hz, lLoop = 20 mA, D2=0, D3~0 (Continued) STOR Receive Signal to Measure through C Message Filter Total Distortion f = 1015.625 Hz, PCM Level = 3.1 dBmO 33 BC = 0.0 dBmO 36 dBc = ~23dBmO 36 asc = -11.4dBmO 36 dBC ’ = 17.6 dBmO 36 dBC = —23.9dBmO 36 dBC = -29.9 dBmO 35 dBC = —37.8dBmO 31 dBC = -40.0 dBmO 29 dBc = —45.0dBmO 25 dBC = —47.1dBmO 23 dBC = —55.7 dBmO 14 dBC STDX Transmit Signal to Measure through C Message Filter Total Distortion 1 = 1015.625 Hz, PCM Level = 3.1dBmO 33 dBC = 0.0dBmO 36 d8C = —2.3dBm0 36 dBC = —11.4dBmO 36 dBC = -17.6dBmO 36 dBC = -23.9 d8mO 36 dBC = —29.9dBmO 35 dBC = —37.8dBmO 31 dBC = 40.0 dBmO 29 dBc = —46.0dBmO 25 dBC = —47.1dBmO 22 dBC = ~55.7 dBmO 13 dBC DRA | Absolute RecoweDeiay | t= 1eooHe || t90 | ns DRR Receive Delay Measure Relative to DRA, Distortion f = 500 Hz -2 ys = 1000 Hz 10 BS = 2600 Hz 70 us = 2800 Hz 100 us = 3000 Hz 150 BS DXA |“ AbsoluteTransmitDelay | f= eooHz || goo | ns DXR Transmit Delay Measure Relative to DXA, Distortion f = 500 Hz 250 ps = 600 Hz 150 us = 800 Hz 65 ps = 1000 Hz 30 us = 2600 Hz 60 ps = 2800 Hz 80 ps = 3000 Hz 140 BS 4-156

Electrical Characteristics 8 Unless otherwise noted, limits printed in bold characters are guaranteed for Voc = 5.0V +5%, Vag = ~5.0V +5%,Vaat = | —55V to —59V, Ta = 0°C to +70°C by correlation with 100% electrical testing at Ta = 25°C. All other limits are assured by correlation with other production tests and/or product design and characterization. Typical characteristics are specified at Voc = 5.0V, Vag = —5.0V, Vgat = —56V, Ta = 25°C. All digital signals are referenced to GND, all analog signals are referenced to RTN. (Continued) Symbol | __—Parameter_— | Conditions [win | typ | Max | Units NOISE Zper = 9000 + 2.16 uF, ILoop = 20 MA, D2=0, D3=0 NRC Receive C Message PCM Code is Alternating Weighted Idle Channel Positive and Negative dBrnco Noise Zeroes NXC Transmit C Message Measured by Extrapolation Weighted Idle Channel from Signal to Distortion dBrnco Noise Measurements at — 50 dBmO. POWER SUPPLY REJECTION RATIO Unless Otherwise Specified, ZRer = 9009 + 2.16 LF, lLoop = 20 mA, D2=0, D3=0 PPSRR | Voc Power Supply f = 328.125 Hz 30 4B Rejection, Receive f = 1078.125 Hz 30 dB f = 3328.125 Hz 30 dB VPSRR | Vgat Power Supply f = 328.125 Hz dB Rejection, Receive f = 1078.125 Hz dB f = 3328.125 Hz dB PPSRx Voc Power Supply f = 328,125 Hz 30 dB Rejection, Transmit f = 1078.125 Hz 30 dB f = 3328.125 Hz 30 a8 VPSRx | Vgat Power Supply f = 928,125 Hz dB Rejection, Transmit f = 1078.125 Hz dB f = 3328.125 Hz dB LONGITUDINAL BALANCE AND CAPABILITY Iuus1 Longitudinal Current Capability, lLoop = 5 mA, f = 60 Hz, Loop Start Inject ILLs1 into TIP mArms and RING. Device Must Not Detect Off-Hook. Triangular Waveform lise Longitudinal Current Capability, 'Loop = 21 mA, f = 60 Hz, Loop Start Inject ILLsz into TIP Anns and RING. Device Must Not Detect On-Hook. Triangular Waveform lest Longitudinal Current Capability, | f = 60 Hz, ground = 0 mA Ground Start Triangular Waveform. Inject Iasi mame into RING, TIP Open. Device Must Not Detect Off-Hook hese Longitudinal Current Capability, | IGrouna = 50 mA, f = 60 Hz. Ground Start Inject Iso into RING, TIP Open. mAnms Device Must Not Detect On-Hook. Triangular Waveform BAL2W 2-Wire Longitudinal IEEE Method 455-1976, ILoop = 20 mA, Balance \\Longitudinal = 20 mArms/leg, Measure Vmetaltic across TIP-RING f= 62.5Hz 61 dB = 203.125 Hz 61 dB = 1015.625 Hz 61 dB = 2015.625 Hz 61 6B 1 = 2703.125 Hz 56 dB = 3000 Hz 54 dB = 3406.25 Hz 51 oB 1-157

. . vu Electrical Characteristics KG Unless otherwise noted, limits printed in bold characters are guaranteed for Vag = 5.0V +5%, Vag = ~8.0V +5%, Vea = | = —55V to —59V, Ta = 0°C to + 70°C by correlation with 100% electrical testing at Tq = 25°C. All other limits are assured by correlation with other production tests and/or product design and characterization. Typical characteristics are specified at Voc = 5.0V, Vag = —5.0V, Vaat = —56V, Ta = 25°C. All digital signals are referenced to GND, all analog signals are reterenced to RTN. (Continued) symbot_[ Parameter | onattons Tn typ [Max | Units LONG FRAME SYNC MODE (Figure 9) tHBCFSH Hold Time from BCLK ns Low to FS tsFsaco Setup Time from FS ns to BCLK Low tpscpxo Delay Time from BCLK Cy = 150 pF Plus 2 LSTTL Loads or FS, Whichever Comes ns Later to Dx Valid toscpx Delay Time from C= 150 pF Plus 2 LSTTL Loads ns BCLK to Dx Valid toscoxz Delay Time from C, = 50pF ns BCLK to Dx Disabled toscpxzo | Delay Time from BCLK Cy = 50 pF or FS, Whichever Comes ns Later, to Dx Disabled tsprBC ‘Setup Time from Da ns to BCLK Low tuecor Hold Time from BCLK ns Low to Dp Valid DIGITAL TIMING, SERIAL CONTROL INTERFACE (See Figures 2 and 3, Notes 4 and 5) 1/tpoc CCLK Frequency Frequency Accuracy <+100ppm | 0.08 | | 2.048 | MHz woo. | widtnorccucew ff p00 Ps twos. _|_ Width of 68 Low PT 400 Ts READ/WRITE, WRITE READ MODES (Figure 2) tucccs Hold Time from hs CCLK to TS tscsce Setup Time from ns CS to CCLK tpecco Delay Time from CCLK Cl = 150 pF Plus 2 LSTTL Loads or CS, Whichever Comes ns Later, to CO Valid tpcccoz Delay Time from CCLK 1 | or CS, Whichever Comes ns Later, to CO Disabled 1-159 .

$| Electrical Characteristics & Unless otherwise noted, limits printed in bold characters are guaranteed for Voc = 5.0V +5%, Vag = —5.0V +5%, Veat = —58V to —59V, Ta = 0°C to +70°C by correlation with 100% electrical testing at Ta = 25°C. All other limits are assured by correlation with other production tests and/or product design and characterization. Typical characteristics are specified at Voc = 5.0V, Vas = —5.0V, Veat = —56V, Ta = 25°C. All digital signals are referenced to GND, all analog signals are referenced to RTN. (Continued) Symbot_[ Parameter | ___Conatwons win [typ | max | unts READ/WRITE, WRITE READ MODES (Figure 2) (Continued) tsccci Setup Time from ns Cl to CCLK tucicc Hold Time from ns CCLK to Cl tpcsin Delay Time from TS Ry = 1k from INTA hs Low to INTR High to Voc QUICK STATUS READ MODE (Figure 3) tcocsL Hold Time from ns CCLK to TS Low tscsccL Setup Time from ns CS to CCLK Low tocsco Delay Time from Cy = 150 pF Pius 2 ns CS to CO Valid LSTLL Loads tpcscoz Delay Time from CS ns to CO Disabled ‘Note 4: See Appendix | for the definition and naming conventions used for digital timing parameters. Note 5: See Table V for the definition of the mneumonics used for the digital timing parameters. TABLE V. Timing Parameter Mneumonics BCLK ee a [oes . 1-160

tors Rip, Rrina and a voltage limiting circuit which limits ‘stand power cross and surges. ties for this voltage limit are shown in Figure 77. The lowest ‘A complete N-channel line card is illustrated in Figura 12. ble to absorb the power surges. The TIP and RING input rangement.

4.2 Amp, 100V 'SGS 15060

20 Amp Surge Thomson TPC68B

FIGURE 11. Some Secondary Protection Networks FIGURE 12. Typical N-Channel Linecard