TP3200

TP3200 NSC | Alldatasheet

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S Semiconductor s a TP3200, TP3204 SLIC-MC 3 Magnetic Compensation SLICs ipti One of the three relay drivers is dedicated to the ring func- General Description ; tion, the other two are generat purpose. TP3200 has PNP The TP3200 and TP3204 are monolithic Bipolar integrated relay drivers, while the TP3204 has NPN relay drivers. circuits intended for use on subscriber and trunk interface cards of digital PABX and central office equipment. Each device contains a magnetic compensation circuit, a supervi- Features Ci f I sion circuit and three relay drivers with latched inputs. ™ Magnetic Compensation Circuit allows the use of low Th Sti ti ‘rcuit all th f cost ferrite core transformers je magnetic compensation circuit allows the use Of @ — m@ Supervision Circuitry provides hook-switch detect, ring- small, low cost line transformer by measuring the loop cur- ; , scat ° is trip detect and dial pulse replication rent, and producing an output current proportional to the A Mk a oni , d.c. value of the loop current, This output current is passed Ring relay driver synchronized to zero-crossings through a winding of the line transformer in such away as to Automatic ring-trip circuit—TP3200, TP3204 cancel the d.c. component of the magnetic flux. Thus the | ™ Three Latched relay drivers transformer may be wound on a small ferrite core withoutan ™ —48 Volt relay drivers—TP3200 air gap. @ +5 Volt relay drivers—TP3204 The supervision output is used to detect off-hook, replicate ™ Requires only +5V supplies dial pulses and terminate ringing on detection of ring-trip. @ Thermal shutdown protection ™ Power-Up reset on relay driver latches Simplified Block Diagrams P3200 P3204 CAPT CAPT or PTS el . or PTS nl ° 9) ral ve (YR ve (*) Re (1) Re cap2- > sur > SUP cap2 1P3200 (1953209 TRIP, in TRIP | BGND RYR RING B Pt £9 a RING | bon ic RYR RCI RY2 RC2. iD QI aie ™ a: rf < EN: EN Vee GND Yeo v GND vy TL/H/5589-1 ce bad TUH/s509-2 1-135

x $ | Absolute Maximum Ratings | It Mititary/Aerospace specified devices are required, Vay w.rt. GND (TP3200) —70V s please contact the National Semiconductor Sales Vpy w.r.t. GND (TP3204) 20V g Office/Distributors for availability and specifications. Voltage at Sensing Inputs 300 Vpeak © | Operating Temperature —25°C to + 85°C T+, T-,R+,R—, wrt. GND (continuous) e Storage Temperature —65°C to + 150°C T+,T-,R+,R— (FCC 68,302/d) 1000V (surge) Voc w.r.t. GND wv Iny (TP3200) —50 mA Vpp wart. GND -7V Iny (TP3204) 120 mA Vee w.r-t. Vee 14V Power Dissipation (Note 1) 1.5W Vic w.r.t. GND —-70V ESD (Note 2) 2kV Electrical Characteristics uniess otherwise specified, Limits printed in bold characters are guaranteed for Voc = +5.0V, Vgp = —5.0V +5% and Ta = 0°C to 70°C by correlation with 100% production testing at Ta = 25°C. All other limits are assured by correlation with other production tests and/or product design and characterization. Typical values are measured at Voc = +5.0V, Vag = —5.0V, and Ta = 25°C. COMPENSATION CIRCUIT Rin __| InputResistance | T+,7—ReR-——SS*d Sd 2 | id Vos Offset Voltage at Vo ILoop=0 MA, Rg = 1002. Veat = —48V, VC Open. +30 | mv Ay Differential Voltage Gain R_= 150, Rg= 100, Measure from T+,T-, vv R+ and R— to VG, loop = 10-100 mA| Io Maximum Compensation | The Output Current is Nominally Current Given by Vo/Ri, Where Ry is mA Connected from VC to GND. Fo Measure at CAPI [86_| 100_| 420_|_ka ViGsat_| Saturation Vottage at iC | ic=20mA.MeasurefromvCtoic. || -0.9 | = 4.8 Tv Ric IC Output Impedance R= 1500, f=1 kHz, ic = 10 mA MQ Ig = 20mA Ko. N Idle Noise IC=20 mA, R_ = 1502 Connect 15002 from dBc IC to Vaart, Measure at IC. SUPERVISION CIRCUITRY lo Ring-Trip Current Source | At CAP2 [fw] [spa la Ring-Trip Threshhold CAP2=0.1 pF, f= 20 Hz, Rg= 1002 ee ee ee I+ Off-hook Positive Rig = 100. Increase Loop Current mA Threshold until SUP Switches low. H Off-hook Hysteresis Rs= 100. Decrease Loop Current from 1+ mA until SUP Switches High. RELAY DRIVERS VRY sat Relay Driver Saturation TP3200, IRY = 30 mA v Voltage TP3204, IRY=80 mA Vv DIGITAL INTERFACE (SUP, EN, RC1, RC2, RING, RSYNC) Vou | Outputuowlevel | iq=18ma SSS re Vou | OutputHightevel [ ton=O.1mA a Vi | imputowtevet fe Vin | InputHightevel Pe i | inputCurent 7 <Vy<20 Eon TT on Toma POWER DISSIPATION loc Voc Supply RL= 1500, Rg=1009 mA IpLe Current 'Loop=0 mA, All Relays Off IgB0 Vea Supply i= 1502, Rg= 1009, ILoop=0 mA mA Ipue Current All Relays Off. loc Voc Supply RL = 1509, Rg=1000 mA Active Current ILoop= 40 mA, IRy= 10 mA apt Vea Supply RL = 1502, Rg=1000 mA Active Current ILoop=40 MA, Iay=10 mA PSRR+ | Power Supply Rejection | AVo/AVco, f=1 kHz, CAP1 = 1 uF [ -6o | -so | | a PSRR— | Aatio AVo/AVag, f= 1 kHz, CAP1 = 1 uF [ -3e [-so[ | as 1-136

. rari uu Electrical Characteristics uniess otherwise specified, Limits printed in bold characters are guaranteed for | 62 Voc = +5.0V, Vag = —5.0V £5% and Ta = 0°C to 70°C by correlation with 100% production testing at Ta = 25°C. Allother | 3 limits are assured by correlation with other production tests and/or product design and characterization. Typical values are bd measured at Voc = +5.0V, Vag = —5.0V, and Ta = 25°C. r= Symbol_[ Parameter [Conditions |= Min_(| Typ | Max | Units | TIMING (SEE DEFINITIONS AND TIMING CONVENTIONS FOR TEST METHOD INFORMATION) > tSRE Set-up Time Measure from RING, or RC1, 3 RC2 Valid to EN Falling Edge. ba tHER Hold Time Measure from EN Falling Edge s to RING, RC4, or RC2 Invalid. a tWEN Input Pulse Active High twrs Width EN ps RSYNC. BS toey RY1, RY2 Drivers Measure from En Active and Delay Time RC1, RC2, Valid to RY1, RY2 s On or Off. Iny (on) = 10 mA, ios Iny (otf) = 0.1 mA tory RYR Driver Measure from RSYNC Rising Delay Time Edge to RYR On or Off. s IRYR (on) = 10 mA, a lave (off) = 0.1 mA ths Off-Hook Measure from Loop = 20 mA : Detection Time to SUP Transition from High to Low. ia ta Ring-Trip Measure from ILoop = 20 mA to, Detection Time RYR Off, CAP2 = 0.1 uF, ms | f = 20 Hz, lav” (on) = 10 mA, layR (ott) = 0.1 mA Note 1: Derate based on 150°C maximum junction temperature and thermal resistance of 80°C/W, junction to ambient Note 2: Device pins T+, T—,R+, A are not guaranteed to meet the NSC standard requirement for ESD protection of 2000V. The functional requirements in the intended application prohibit the use of any additional components on chip for ESD protection. Maximum surge voltage for these pins is greater than 1000V, measured in accordance with FCC 68, 302/¢. Timing Diagram RING, RC2 a EN Hyer toey RYI OR RY2 twrs RSYNC —— tory 1 | RYR TUH/5589-17 1-137

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2 Connection Diagrams

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o R-—42 21eT+ Rea? 19}—T+ & ws 20}-BGND ics 18}-GND Ves—j5 18F—CAP2 vos 16}—RYR Vo—46 1P3200 17F—RYR capt fo P3204 ish vec cAP1—47 16F—Vec sup —47 14 Ry1 SUP —48 ISP RYt RSYNC —48 13 f— RY2 RSYNC —J3 14} Ry2 RING —19 12}h—Rc2 RING 410 13—RC2 EN—f10 11} Ret EN 12}—RC1 TUH/S800-5 TL/H/5589-3 Top View Top View Order Number TP3204N Order Number TP3200N ‘See NS Package Number N20A See NS Package Number N22A Description of Pin Functions Name Function Name Function Tt Tip positive voltage sense input connected to CAP2 External capacitor input required to perform the positive (GND) side of the Tip current sense charging and discharging by Io for one cycle of resistor. ting frequency in order to perform the ring-trip T- Tip negative voltage sense input connected to function. the negative (line) side of the Tip current sense vc Compensation voltage output. The output volt- resistor. age at this pin is proportional to the d.c. loop BGND Battery ground return for the relay drivers. This current flowing through the line transformer. An ground should be connected in such a way as external resistor Ri connected from VC to GND to minimize noise due to relay switching and causes a current to flow from IC which is in turn also to avoid large voltage transients in the proportional to the d.c. loop current. presence of lightning. Preferably it should be GND Analog ground. connected to GND on the backplane. Voc +5 volts +5% R- Ring negative voltage sense input connected to SUP Supervision output indicating off-hook, Dial the negative (Vgar) side of the Ring current Pulse and Ring Trip status. sense resistor. EN Enable input. The RING, RC1 and AC2 inputs R+ Ring positive voltage sense input connected to are gated in during the high state of EN and the positive (line) side of the Ring current sense {atched on the falling edge. resistor. RC1 General purpose relay control input 1, used to Ves —5 volts +5% turn on or off relay driver 1 (RY1) when enabled Ic Compensation current output. The current by EN. sourced by this output is proportional to the d.c. RC2 General purpose relay control input 2 used to loop current flowing through the line transform- turn on or off relay driver 2 (RY2) when enabled er. By passing this current through an auxiliary by EN. winding of appropriate winding ratio, the aver- RING Ring command input used to turn on or off the age magnetic flux in the transformer core can ring relay driver when enabled by EN. be cancelled. CAP1 €xternal capacitor input required to filter voice frequency components from the loop current. 1-138

mum voltage across the relay contacts. RSYNC ly 13 mA the SUP output goes low, indicating off-hook. bridge, and produces a voltage proportional to the instanta- of ring trip is described in the next section. FIGURE 1. Magnetic Compensation Circult—Simplified Diagram

source Io either sources or sinks 10 pA into CAP2. This be kept at logic low in order to prevent relay chattering. fig. to fig. 4 operate with a positive supply voltage up to 20 volts. FIGURE 3. Ring Trip Circuit ' '

S| Application Information (continues) © | The ac. loop voltage will appear at IC, amplified by the ratio Thus we require: >| Nc/(2Np). A dc. bias voltage must be provided which is ; s sufficiently negative to prevent the compensation transistor |Veatl (min) > Re * ILoop (max)/N + 1.55N — VICsaT $ | trom saturating without producing excessive power dissipa- + ILoop(max) * 2Rg * Ay (2) & tion in the integrated circuit. This bias voltage can be an intermediate supply voltage or may be generated by the Substituting for Ro, compensation current flowing through a resistance. The re- . \\ sistance may be made up of the transformer winding resist- [Vearl(min) > (1.85N — Vamin + |Veatimen) ance and discrete resistances such as the filter resistor * |Loop(max)/ILoop{min) + 1.55N + 1.5 + 30l.oop(max) shown in Figure 6. lf the bias voltage is generated by an IR Thus for a minimum loop current of 20 mA and a maximum drop, a higher supply voltage or lower compensation current of 100 mA, with a minimum zener voltage of 58 volts, and ratio will be required to allow for large variations in loop battery voltage from —42V to —54V, the maximum com- current, resulting in higher circuit power dissipation. pensation current ratio is 6.18:1. Design Example IfN = Sis chosen, i.e. Nc = 10 Np, the allowable range for Assuming a 0 TLP on the line of 0 dBm into 6009, a 3 dB AG can fen Oe caculate’. FO oe othe sononsation overload corresponds to a peak signal level of 1.55 volts. ), Ac » Sl i" The peak a.c. voltage at IC is therefore 1.55N, where winding may typically be 6009, an additional 8209 can N=No/(2Np). At minimum loop current, the d.c. bias at IC safely be added in series to form a high frequency filter on must be sufficiently positive of the zener voltage to allow the battery supply. negative swings without clipping. Allowing for the winding - - resistance and reactance, a safe limit is: Finally, from Np/Ne = Ay Rs/RL, RL = 1509. Ro® loop (min)/N > 1.55N ~ Vz min + \\Veatimax (1) Further Information J ; ; For additional information on design of suitable transform- where Vz is the zener voltage, Rc is the total resistance ers see National Semiconductor Application Note AN-439. from IG to Vear. ; ; For information on the design of matched attenuators suit- At the opposite extreme, the compensation transistor must able for setting Receive TLP levels, see the data sheet not saturate with maximum loop current and positive peak “TP3052 Family of COMBO™ Devices”. swings. This corresponds to a voltage at IC of not less than =ViCgat + VC = 1.5 + ILoop (max) * 2Rg * Ay. 1-142