TN2540N3-G

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Document overview

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• PDF pages: 14

Technical content

Features

• 2V Maximum Low Threshold
• High Input Impedance
• 125 pF Maximum Low Input Capacitance
• Fast Switching Speeds
• Low On-Resistance
• Free from Secondary Breakdown
• Low Input and Output Leakage

Applications

• Logic-Level Interfaces (Ideal for TTL and CMOS)
• Solid-State Relays
• Battery-Operated Systems
• Photovoltaic Drives
• Analog Switches
• General Purpose Line Drivers
• Telecommunication Switches General Description The TN2540 low-threshold Enhancement-mode (normally-off) transistor uses a vertical DMOS structure and a well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally induced secondary breakdown. Microchip’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Package Types See Table 3-1 and Table 3-2 for pin information. 3-lead SOT-89 (Top view) GATE SOURCE DRAIN DRAIN 3-lead TO-92 (Top view) GATE SOURCE DRAIN N-Channel Enhancement-Mode Vertical DMOS FET

DS20005954A-page 2  2020 Microchip Technology Inc.

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings† † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS Electrical Specifications: TA = 25°C unless otherwise specified. All DC parameters are 100% tested at 25°C unless otherwise stated. Pulse test: 300 µs pulse, 2% duty cycle Parameter Sym. Min. Typ. Max. Unit Conditions Drain-to-Source Breakdown Voltage BVDSS 400 — — V VGS = 0V, ID = 100 µA Gate Threshold Voltage VGS(th) 0.6 — 2 V VGS = VDS, ID = 1 mA Change in VGS(th) with Temperature ΔVGS(th) — –2.5 –4 mV/°C VGS = VDS, ID = 1 mA (Note 1) Gate Body Leakage Current IGSS — — 100 nA VGS = ±20V, VDS = 0V Zero-Gate Voltage Drain Current IDSS — — 10 µA VGS = 0V, VDS = Maximum rating — — 1 mA VDS = 0.8 Maximum rating, VGS = 0V, TA = 125°C (Note 1) On-State Drain Current ID(ON) 0.3 0.5 — A VGS = 4.5V, VDS = 25V 0.75 1 — A VGS = 10V, VDS = 25V Static Drain-to-Source On-State Resistance RDS(ON) — 8 12 Ω VGS = 4.5V, ID = 150 mA — 8 12 Ω VGS = 10V, ID = 500 mA Change in RDS(ON) with Temperature ΔRDS(ON) — — 0.75 %/°C VGS = 10V, ID = 500 mA (Note 1) Note 1: Specification is obtained by characterization and is not 100% tested.

 2020 Microchip Technology Inc. DS20005954A-page 3 TN2540 AC ELECTRICAL CHARACTERISTICS Electrical Specifications: TA = 25°C unless otherwise specified. All AC parameters are not 100% sample tested. Parameter Sym. Min. Typ. Max. Unit Conditions Forward Transconductance GFS 125 200 — mmho VDS = 25V, ID = 100 mA Input Capacitance CISS — 95 125 pF VGS = 0V, VDS = 25V, f = 1 MHz Common-Source Output Capacitance COSS — 20 70 pF Reverse Transfer Capacitance CRSS — 10 25 pF Turn-On Delay Time td(ON) — — 20 ns VDD = 25V, ID = 1A, RGEN = 25Ω Rise Time tr — — 15 ns Turn-Off Delay Time td(OFF) — — 25 ns Fall Time tf — — 20 ns DIODE PARAMETER Diode Forward Voltage Drop VSD — — 1.8 V VGS = 0V, ISD = 200 mA (Note 1) Reverse Recovery Time trr — 300 — ns VGS = 0V, ISD = 1A Note 1: All DC parameters are 100% tested at 25°C unless otherwise stated. Pulse test: 300 µs pulse, 2% duty cycle TEMPERATURE SPECIFICATIONS Parameter Sym. Min. Typ. Max. Unit Conditions TEMPERATURE RANGE Operating Ambient Temperature TA –55 — +150 °C Storage Temperature TS –55 — +150 °C PACKAGE THERMAL RESISTANCE 3-lead TO-92 JA — 132 — °C/W 3-lead SOT-89 JA — 73 — °C/W THERMAL CHARACTERISTICS Package ID (Note 1) (Continuous) (mA) ID (Pulsed) (A) Power Dissipation at TA = 25°C (W) IDR (Note 1) (mA) IDRM (A) 3-lead TO-92 175 2 1 175 2 3-lead SOT-89 260 1.8 1.6 (Note 2) 260 1.8 Note 1: ID (continuous) is limited by maximum rated TJ. 2: TA = 25°C. Mounted on an FR5 Board, 25 mm x 25 mm x 1.57 mm.

DS20005954A-page 4  2020 Microchip Technology Inc.

2.0 TYPICAL PERFORMANCE CURVES

FIGURE 2-1: Output Characteristics. FIGURE 2-2: Transconductance vs. Drain Current. FIGURE 2-3: Maximum Rated Safe Operating Area. FIGURE 2-4: Saturation Characteristics. FIGURE 2-5: Power Dissipation vs. Ambient Temperature. FIGURE 2-6: Thermal Response Characteristics. Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g. outside specified power supply range) and therefore outside the warranted range. ID (amperes) VDS (volts) 0 10 20 30 40 50 2.0 1.6 1.2 0.8 0.4 VGS = 10V GFS (siemens) ID (amperes) 0.0 0.2 0.4 0.6 0.8 1.0 VDS =15V 125 OC 0.8 TA = -55 OC 25 OC ID (amperes) VDS (volts) 0.1 1.0 10 100 1.0 0.1 0.01 0.001 TO-243AA(DC) TO-92(DC) TO-243AA(pulsed) ID (amperes) VDS (volts) 5.0V 4.0V 3.0V 02468 1 0 0.0 0.2 0.4 0.6 0.8 1.0 VGS = 10V 6.0V 8.0V PD (watts) TA (OC) 0 25 50 75 100 125 150 2.0 1.0 TO-243AA TO-92(DC) Thermal Resistance (normalized) tp (seconds) TO-243AA PD = 1.6W TC = 25 OC 1.0 0.8 0.6 0.4 0.2 0.001 0.01 0.1 1.0 10

DS20005954A-page 6  2020 Microchip Technology Inc.

3.0 PIN DESCRIPTION

The details on the pins of TN2540 are listed in Table 3-1 and Table 3-2. Refer to Package Types for the location of pins. TABLE 3-1: TO-92 PIN FUNCTION TABLE Pin Number Pin Name Description

1 Source Source

2 Gate Gate

3 Drain Drain

TABLE 3-2: SOT-89 PIN FUNCTION TABLE Pin Number Pin Name Description

1 Gate Gate

2,4 Drain Drain

3 Source Source

 2020 Microchip Technology Inc. DS20005954A-page 7 TN2540

4.0 FUNCTIONAL DESCRIPTION

Figure 4-1 illustrates the switching waveforms and test circuit for TN2540. FIGURE 4-1: Switching Waveforms and Test Circuit. 90% 10% 90% 90% 10%10% Pulse Generator VDD RL OUTPUT D.U.T. t(ON) td(ON) t(OFF) td(OFF)tr INPUT INPUT OUTPUT 10V VDD RGEN tf TABLE 4-1: PRODUCT SUMMARY BVDSS/BVDGS (V) RDS(ON) (Maximum) (Ω) ID(ON) (Minimum) (A) VGS(TH) (Maximum) (V) 400 12 1 2

DS20005954A-page 8  2020 Microchip Technology Inc.

5.0 PACKAGING INFORMATION

5.1 Package Marking Information

Legend: XX...X Product Code or Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code Pb-free JEDEC® designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for product code or customer-specific information. Package may or not include the corporate logo. 3-lead TO-92 YWWNNN XXXXXX XX e3 Example 023145 TN2540 N3 e3 3-lead SOT-89 Example XXXXYWW NNN TN5D015 635

 2020 Microchip Technology Inc. DS20005954A-page 9 TN2540 Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.

DS20005954A-page 10  2020 Microchip Technology Inc. 3-Lead TO-243AA (SOT-89) Package Outline (N8) Symbol A b b1 C D D1 E E1 e e1 H L Dimensions (mm) MIN 1.50 BSC 3.00 BSC 3.94 0.73 † JEDEC Registration TO-243, Variation AA, Issue C, July 1986. † This dimension differs from the JEDEC drawing Drawings not to scale. b b1 D E H E1 C A 12 3 e Top View Side View L

 2020 Microchip Technology Inc. DS20005954A-page 11 TN2540 APPENDIX A: REVISION HISTORY Revision A (November 2020)

• Converted Supertex Doc# DSFP-TN2540 to Microchip DS20005954A
• Changed the package marking format
• Removed the TO-92 P003, P004, P005, P013, and P014 media types from the N3 package to align specifications with the actual BQM
• Made minor text changes throughout the document

DS20005954A-page 12  2020 Microchip Technology Inc. PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. Examples: a) TN2540N3-G: N-Channel Enhancement- Mode, Vertical DMOS FET, 3-lead TO-92, 1000/Bag b) TN2540N3-G-P002: N-Channel Enhancement- Mode, Vertical DMOS FET, 3-lead TO-92, 2000/Reel c) TN2540N8-G: N-Channel Enhancement- Mode, Vertical DMOS FET, 3-lead SOT-89, 2000/Reel PART NO. Device Device: TN2540 = N-Channel Enhancement-Mode Vertical DMOS FET Packages: N3 = 3-lead TO-92 N8 = 3-lead SOT-89 Environmental: G = Lead (Pb)-free/RoHS-compliant Package Media Types: (blank) = 1000/Bag for an N3 Package = 2000/Reel for an N8 Package P002 = 2000/Reel for an N3 Package XX Package - X - X Environmental Media Type Options

 2020 Microchip Technology Inc. DS20005954A-page 13 Information contained in this publication is provided for the sole purpose of designing with and using Microchip products. Infor- mation regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. THIS INFORMATION IS PROVIDED BY MICROCHIP "AS IS". MICROCHIP MAKES NO REPRESENTATIONS OR WAR - RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTIES OF NON- INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE OR WARRANTIES RELATED TO ITS CONDITION, QUALITY, OR PERFORMANCE. IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDI- RECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUEN- TIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE INFORMATION OR ITS USE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY RELATED TO THE INFORMATION OR ITS USE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY , THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THE INFORMATION. Use of Microchip devices in life sup- port and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, Adaptec, AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT, chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AgileSwitch, APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet- Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, WinPath, and ZL are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, Augmented Switching, BlueSky, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, Espresso T1S, EtherGREEN, IdealBridge, In-Circuit Serial Programming, ICSP, INICnet, Intelligent Paralleling, Inter-Chip Connectivity, JitterBlocker, maxCrypto, maxView, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, RTAX, RTG4, SAM-ICE, Serial Quad I/O, simpleMAP , SimpliPHY , SmartBuffer, SMART-I.S., storClad, SQI, SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY , Total Endurance, TSHARC, USBCheck, VariSense, VectorBlox, VeriPHY , ViewSpan, WiperLock, XpressConnect, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2020, Microchip Technology Incorporated, All Rights Reserved. ISBN: 978-1-5224-7138-7 Note the following details of the code protection feature on Microchip devices:

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