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Technical content

Features

  • Low Threshold
  • High Input Impedance
  • 110 pF Maximum Low-Input Capacitance
  • Fast Switching Speeds
  • Low On-Resistance
  • Free from Secondary Breakdown
  • Low Input and Output Leakage

Applications

  • Logic-Level Interfaces (Ideal for TTL and CMOS)
  • Solid-State Relays
  • Battery-Operated Systems
  • Photovoltaic Drives
  • Analog Switches
  • General Purpose Line Drivers
  • Telecommunication Switches General Description The TN2501 low-threshold Enhancement-mode (normal ly-off) transistor uses a vertical Diffusion Metal Oxide Semiconductor (D MOS) structure and a well-proven silicon-gate m anufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positiv e temperature coefficient inherent in Metal-Oxide Semiconductor (MOS) devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally induced secondary breakdown. Microchip’s vertical DMOS Field-Effect Transistors (FET s) are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance and fast switching speeds are desired. Package Type See Table 3-1 for pin information. 3-lead SOT-89 (Top view) GATE SOURCE DRAIN DRAIN N-Channel Enhancement-Mode Vertical DMOS FET

DS20005948A-page 2  2018 Microchip Technology Inc.

1.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings† † Notice: Stresses a bove those listed under “Absolute Maxi mum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS Electrical Specifications: TA = 25°C unless otherwise specified. All DC parameters are 100% tested at 25°C unless otherwise stated. (Pulse test: 300 µs pulse, 2% duty cycle) Parameter Sym. Min. Typ. Max. Unit Conditions Drain-to-Source Breakdown Voltage BVDSS 18 — — V VGS = 0V, ID = 1 mA Gate Threshold Voltage VGS(th) 0.3 — 1 V VGS = VDS, ID = 1 mA Change in VGS(th) with Temperature ∆VGS(th) — — –4 mV/°C VGS = VDS, ID = 1 mA (Note 1) Gate Body Leakage Current IGSS — — 100 nA VGS = ±15V, VDS = 0V Zero-Gate Voltage Drain Current IDSS — — 10 µA VGS = 0V, VDS = Maximum rating — — 1 mA VDS = 0.8 Maximum rating, VGS = 0V, TA = 125°C (Note 1) On-State Drain Current ID(ON) 250 600 — mA VGS = VDS = 3V Static Drain-to-Source On-State Resistance RDS(ON) — — 25 Ω VGS = 1.2V, ID = 3 mA — — 3.5 Ω VGS = 2V, ID = 50 mA — — 2.5 Ω VGS = 3V, ID = 200 mA Change in RDS(ON) with Temperature ∆RDS(ON) — — 0.75 %/°C VGS = 3V, ID = 200 mA (Note 1) Note 1: Specifica tion is obtained by characterization and is not 100% tested.

AC ELECTRICAL CHARACTERISTICS Electrical Specifications: TA = 25°C unless otherwise specified. All AC parameters are sample tested. Parameter Sym. Min. Typ. Max. Unit Conditions Forward Transconductance GFS 150 300 — mmho VDS = 3V, ID = 200 mA Input Capacitance CISS — — 110 pF VGS = 0V, VDS = 15V, f = 1 MHz Common Source Output Capacitance COSS — — 60 pF Reverse Transfer Capacitance CRSS — — 35 pF Turn-On Delay Time td(ON) — — 5 ns VDD = 15V, ID = 250 mA, RGEN = 25Ω Rise Time tr — — 15 ns Turn-Off Delay Time td(OFF) — — 15 ns Fall Time tf — — 8 ns DIODE PARAMETER Diode Forward Voltage Drop VSD — 1.1 1.8 V VGS = 0V, ISD = 200 mA (Note 1) Reverse Recovery Time trr — 100 — ns VGS = 0V, ISD = 200 mA Note 1: All DC para meters are 100% tested at 25°C unless otherwise stated.  (Pulse test: 300 µs pulse, 2% duty cycle) TEMPERATURE SPECIFICATIONS Parameter Sym. Min. Typ. Max. Unit Conditions TEMPERATURE RANGE Operating Ambient Temperature TA –55 — +150 °C Storage Temperature TS –55 — +150 °C PACKAGE THERMAL RESISTANCE 3-lead SOT-89  JA — 133 — °C/W THERMAL CHARACTERISTICS Package ID (Note 1) (Con tinuous) (mA) ID (Pulsed) (mA) Power Dissipation at TA = 25°C (Note 2) (W) IDR (Note 1) (mA) IDRM (mA) 3-lead SOT-89 400 560 1.6 400 560 Note 1: ID (continuous) is limited by maximum rated TJ. 2: TA = 25°C. Mounted on an FR4 Board, 25 mm x 25 mm x 1.57 mm.  2018 Microchip Technology Inc. DS20005948A-page 3 TN2501

DS20005948A-page 4  2018 Microchip Technology Inc.

2.0 TYPICAL PERFORMANCE CURVES

ID (amperes) VDS (volts) 1.0 2.0 4.0 3.0 VGS = 10V 01 0 2 0 5.0 Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tabl es, the data presented may be outside the specified operating range (e.g. outside specified power supply range) and therefore outside the warranted range. FIGURE 2-1: Output Characteristics. GFS (siemens) ID (amperes) 0.0 0.2 0.4 0.6 0.8 1.0 VDS =15V TA =125 OC TA =25 OC TA = -55 OC FIGURE 2-2: T ransconductance vs. Drain Current. ID (amperes) VDS (volts) 0.1 1.0 10 100 1.0 0.1 0.01 0.001 SOT-89 (DC) SOT-89 (pulsed) TA = 25 OC FIGURE 2-3: Maximum Rated Safe Operating Area. FIGURE 2-4: Saturation Charac teristics. ID (amperes) VDS (volts) 3.0V 2.0V 1.0V 02468 1 0 0.0 0.2 0.4 0.6 0.8 1.0 VGS = 4.0V 0 25 50 75 100 125 150 2.0 1.0 TA (OC) PD (watts) SOT-89 FIGURE 2-5: Power Dissipation vs. Ambient Temperature. Thermal Resistance (normalized) tp (Seconds) 1.0 0.8 0.6 0.4 0.2 0.001 0.01 0.1 1.0 10 SOT-89 PD = 1.6W TC = 25OC FIGURE 2-6: Thermal Response Characteristics.

DS20005948A-page 6  2018 Microchip Technology Inc.

3.0 PIN DESCRIPTION

The details on the pins of TN2501 are listed on Table 3-1. Refer to Package Type for the location of pin TABLE 3-1: PIN FUNCTION TABLE Pin Number Pin Name Description

1 Gate Gate

2 Drain Drain

3 Source Source

 2018 Microchip Technology Inc. DS20005948A-page 7 TN2501

4.0 FUNCTIONAL DESCRIPTION

Figure 4-1 illustrates the switchin g waveforms and test circuit for TN2501. 90% 10% 90% 90% 10%10% Pulse Generator VDD RL OUTPUT D.U.T. t(ON) td(ON) t(OFF) td(OFF)tr INPUT INPUT OUTPUT 10V VDD RGEN tf FIGURE 4-1: Switching Waveforms and Test Circuit. TABLE 4-1: PRODUCT SUMMARY BVDSS/BVDGS (V) RDS(ON) (Maximum) (Ω) ID(ON) (Minimum) (mA) VGS(TH) (Maximum) (V) 18 2.5 250 1

DS20005948A-page 8  2018 Microchip Technology Inc.

5.0 PACKAGING INFORMATION

5.1 Package Marking Information

Legend: XX...X Product Code or Customer-specific information  Y Year code (last digit of calendar year)  YY Year code (last 2 digits of calendar year)  WW Week code (week of January 1 is week ‘01’)  NNN Alphanumeric traceability code  Pb-free JEDEC ® designator for Matte Tin (Sn) * This package is Pb-free. The Pb-free JEDEC designator ( ) can be found on the outer packaging for this package. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, t hus limiting the number of available characters for product code or customer-specific information. Package may or not include the corporate logo. 3-lead SOT-89 Example XXXXYWW NNN TN5U855 398

3-Lead TO-243AA (SOT-89) Package Outline (N8) Symbol A b b1 C D D1 E E1 e e1 H L Dimensions (mm) MIN 1.50 BSC 3.00 BSC 3.94 0.73 † JEDEC Registration TO-243, Variation AA, Issue C, July 1986. † This dimension differs from the JEDEC drawing Drawings not to scale. b b1 D E H E1 C A 12 3 e Top View Side View L  2018 Microchip Technology Inc. DS20005948A-page 9 TN2501

DS20005948A-page 10  2018 Microchip Technology Inc. NOTES:

 2018 Microchip Technology Inc. DS20005948A-page 11 TN2501 APPENDIX A: REVISION HISTORY Revision A (May 2018)

  • Converted Supertex Doc# DSFP- TN2501 to Microchip DS20005948A
  • Changed the package marking format
  • Added some sections to comply with Microchip formatting standards
  • Made minor text changes throughout the document

DS20005948A-page 12  2018 Microchip Technology Inc. PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. Example: a) TN2501N8-G: N-Channel Enhancement- Mode, Vertical DMOS FET, 3-lead SOT-89, 2000/Reel PART NO. Device Device: TN2501 = N-Channel Enhancement-Mode Vertical DMOS FET Package: N8 = 3-lead SOT-89 Environmental: G = Lead (Pb)-free/RoHS-compliant Package Media Type: (blank) = 2000/Reel for an N8 Package XX Package - X - X Environmental Media Type Options

 2018 Microchip Technology Inc. DS20005948A-page 13 Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application me ets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE . Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or ot herwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, CryptoAuthentication, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP , Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2018, Microchip Technology Incorporated, All Rights Reserved. ISBN: 978-1-5224-3154-1 Note the following details of the code protection feature on Microchip devices:

  • Microchip products meet the specification cont ained in their particular Microchip Data Sheet.
  • Microchip believes that its family of pr oducts is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions.
  • There are dishonest and possibly illegal meth ods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
  • Microchip is willing to work with the customer who is concerned about the integrity of their code.
  • Neither Microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC ® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 ==

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