TMUX1247DCKR | DigiCamel IC Datasheet

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TMUX1247 TI | Alldatasheet

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D RF Output TMUX1247 SEL 1.8 V DAC 0 V 5 V RF Input Product Folder Order Now T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TMUX1247 SCDS399 –AUGUST 2019 TMUX12475-VBidirectional,2:1(SPDT)GeneralPurposeSwitch

1 Features

1• Rail to rail operation

Bidirectional signal path
1.8 V Logic compatible
Fail-safe logic
Low on-resistance: 3 Ω
Wide supply range: 1.08 V to 5.5 V
-40°C to +125°C Operating temperature
Low supply current: 4 nA
Transition time: 14 ns
Break-before-make switching
ESD protection HBM: 2000 V

2 Applications

Analog and Digital Switching
I2C and SPI bus Multiplexing
Remote radio units
Active antenna system mMIMO (AAS)
Barcode scanner
Motor drives
Building automation
Analog input module
Power delivery
Video surveillance
Electronic point of sale
Appliances
Consumer audio

3 Description

The TMUX1247 is a general purpose complementary metal-oxide semiconductor (CMOS) single-pole double-throw (SPDT) switch. The TMUX1247 switches between two source inputs based on the state of the SEL pin. Wide operating supply of 1.08 V to 5.5 V allows for use in a broad array of applications from personal electronics to building automation. The device supports bidirectional analog and digital signals on the source (Sx) and drain (D) pins ranging from GND to VDD. A low supply current of 4 nA enables use in portable applications. All logic inputs have 1.8 V logic compatible thresholds, ensuring both TTL and CMOS logic compatibility when operating in the valid supply voltage range. Fail-Safe Logic circuitry allows voltages on the control pins to be applied before the supply pin, protecting the device from potential damage. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TMUX1247 SC70 (6) 2.00 mm × 1.25 mm (1) For all available packages, see the package option addendum at the end of the data sheet. SPACER SPACER

6.5 Electrical Characteristics (VDD = 5 V ±10 %), GND =

6.6 Electrical Characteristics (VDD = 3.3 V ±10 %), GND 6.7 Electrical Characteristics (VDD = 1.8 V ±10 %), GND 6.8 Electrical Characteristics (VDD = 1.2 V ±10 %), GND

12.2 Receiving Notification of Documentation Updates 25

13 Mechanical, Packaging, and Orderable

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. DATE REVISION NOTES August 2019 * Initial release.

5 Pin Configuration and Functions

(1) I = input, O = output, I/O = input and output, P = power Pin Functions PIN TYPE(1) DESCRIPTION NAME NO. S2 1 I/O Source pin 2. Can be an input or output. VDD 2 P Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and GND. S1 3 I/O Source pin 1. Can be an input or output. D 4 I/O Drain pin. Can be an input or output. GND 5 P Ground (0 V) reference SEL 6 I Select pin: controls state of the switch according to Table 1. (Logic Low = S1 to D, Logic High = S2 to D)

SCDS399 –AUGUST 2019 www.ti.com Product Folder Links: TMUX1247 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum. (3) All voltages are with respect to ground, unless otherwise specified. (4) Pins are diode-clamped to the power-supply rails. Over voltage signals must be voltage and current limited to maximum ratings.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)(3) MIN MAX UNIT VDD Supply voltage –0.5 6 V VSEL or VEN Logic control input pin voltage (SEL) –0.5 6 V ISEL or IEN Logic control input pin current (SEL) –30 30 mA VS or VD Source or drain voltage (Sx, D) –0.5 VDD+0.5 V IS or ID (CONT) Source or drain continuous current (Sx, D) –50 50 mA IK Diode clamp current(4) –30 30 mA Tstg Storage temperature –65 150 °C TJ Junction temperature 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±750

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VDD Supply voltage 1.08 5.5 V VS or VD Signal path input/output voltage (source or drain pin) (Sx, D) 0 VDD V VSEL Logic control input pin voltage (SEL) 0 5.5 V TA Ambient temperature –40 125 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.4 Thermal Information

THERMAL METRIC(1) TMUX1247 UNITDCK (SC70)

6 PINS

RθJA Junction-to-ambient thermal resistance 243.6 °C/W RθJC(top) Junction-to-case (top) thermal resistance 180.9 °C/W RθJB Junction-to-board thermal resistance 106.3 °C/W ΨJT Junction-to-top characterization parameter 89.1 °C/W ΨJB Junction-to-board characterization parameter 106.0 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance N/A °C/W

www.ti.com SCDS399 –AUGUST 2019 Product Folder Links: TMUX1247 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated 6.5 Electrical Characteristics (VDD = 5 V ±10 %), GND = 0 V unless otherwise specified. at TA = 25°C, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON On-resistance VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 3 Ω –40°C to +85°C 5 Ω –40°C to +125°C 6 Ω ΔRON On-resistance matching between channels VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 0.15 Ω –40°C to +85°C 1 Ω –40°C to +125°C 1 Ω RON FLAT On-resistance flatness VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 1.5 Ω –40°C to +85°C 2 Ω –40°C to +125°C 3 Ω IS(OFF) Source off leakage current(1) VDD = 5 V Switch Off VD = 4.5 V / 1.5 V VS = 1.5 V / 4.5 V Refer to Off-Leakage Current 25°C ±75 nA –40°C to +85°C –150 150 nA –40°C to +125°C –175 175 nA ID(ON) IS(ON) Channel on leakage current VDD = 5 V Switch On VD = VS = 4.5 V / 1 V Refer to On-Leakage Current 25°C ±200 nA –40°C to +85°C –500 500 nA –40°C to +125°C –750 750 nA LOGIC INPUTS VIH Input logic high -40°C to 125°C 1.42 5.5 V VIL Input logic low -40°C to 125°C 0 0.87 V IIH IIL Input leakage current 25°C ±0.005 µA IIH IIL Input leakage current –40°C to +125°C ±0.05 µA CIN Digital input capacitance 25°C 1 pF CIN Digital input capacitance –40°C to +125°C 2 pF POWER SUPPLY IDD VDD supply current Digital Inputs = 0 V or 5.5 V 25°C 0.007 µA –40°C to +125°C 1.5 µA

SCDS399 –AUGUST 2019 www.ti.com Product Folder Links: TMUX1247 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Electrical Characteristics (VDD = 5 V ±10 %), GND = 0 V unless otherwise specified. (continued) at TA = 25°C, VDD = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN Switching time between channels VS = 3 V RL = 200 Ω, CL = 15 pF 25°C 12 ns –40°C to +85°C 18 ns –40°C to +125°C 19 ns tOPEN (BBM) Break before make time VS = 3 V RL = 200 Ω, CL = 15 pF 25°C 8 ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns QC Charge Injection VS = VDD /2 RS = 0 Ω, CL = 1 nF 25°C –10 pC OISO Off Isolation RL = 50 Ω, CL = 5 pF f = 1 MHz 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz 25°C –45 dB XTALK Crosstalk RL = 50 Ω, CL = 5 pF f = 1 MHz 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz 25°C –45 dB BW Bandwidth RL = 50 Ω, CL = 5 pF 25°C 250 MHz CSOFF Source off capacitance f = 1 MHz 25°C 7 pF CSON CDON On capacitance f = 1 MHz 25°C 23 pF

www.ti.com SCDS399 –AUGUST 2019 Product Folder Links: TMUX1247 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated (1) When VS is 3 V, VD is 1 V or when VS is 1 V, VD is 3 V. 6.6 Electrical Characteristics (VDD = 3.3 V ±10 %), GND = 0 V unless otherwise specified. at TA = 25°C, VDD = 3.3 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON On-resistance VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 4.5 Ω –40°C to +85°C 12.5 Ω –40°C to +125°C 13 Ω ΔRON On-resistance matching between channels VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 0.15 Ω –40°C to +85°C 1 Ω –40°C to +125°C 1 Ω RON FLAT On-resistance flatness VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 3.5 Ω –40°C to +85°C 4 Ω –40°C to +125°C 5 Ω IS(OFF) Source off leakage current(1) VDD = 3.3 V Switch Off VD = 3 V / 1 V VS = 1 V / 3 V Refer to Off-Leakage Current 25°C ±75 nA –40°C to +85°C –150 150 nA –40°C to +125°C –175 175 nA ID(ON) IS(ON) Channel on leakage current VDD = 3.3 V Switch On VD = VS = 3 V / 1 V Refer to On-Leakage Current 25°C ±200 nA –40°C to +85°C –500 500 nA –40°C to +125°C –750 750 nA LOGIC INPUTS VIH Input logic high -40°C to 125°C 1.35 5.5 V VIL Input logic low -40°C to 125°C 0 0.8 V IIH IIL Input leakage current 25°C ±0.005 µA IIH IIL Input leakage current –40°C to +125°C ±0.05 µA CIN Logic input capacitance 25°C 1 pF CIN Logic input capacitance –40°C to +125°C 2 pF POWER SUPPLY IDD VDD supply current Digital Inputs = 0 V or 5.5 V 25°C 0.004 µA –40°C to +125°C 0.8 µA

SCDS399 –AUGUST 2019 www.ti.com Product Folder Links: TMUX1247 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Electrical Characteristics (VDD = 3.3 V ±10 %), GND = 0 V unless otherwise specified. (continued) at TA = 25°C, VDD = 3.3 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT DYNAMIC CHARACTERISTICS tTRAN Switching time between channels VS = 2 V RL = 200 Ω, CL = 15 pF 25°C 14 ns –40°C to +85°C 20 ns –40°C to +125°C 22 ns tOPEN (BBM) Break before make time VS = 2 V RL = 200 Ω, CL = 15 pF 25°C 8 ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns QC Charge Injection VS = VDD/2 RS = 0 Ω, CL = 1 nF 25°C –6 pC OISO Off Isolation RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB XTALK Crosstalk RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –45 dB BW Bandwidth RL = 50 Ω, CL = 5 pF Refer to Bandwidth 25°C 250 MHz CSOFF Source off capacitance f = 1 MHz 25°C 7 pF CSON CDON On capacitance f = 1 MHz 25°C 23 pF

www.ti.com SCDS399 –AUGUST 2019 Product Folder Links: TMUX1247 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated (1) When VS is 1.8 V, VD is 1 V or when VS is 1 V, VD is 1.8 V. 6.7 Electrical Characteristics (VDD = 1.8 V ±10 %), GND = 0 V unless otherwise specified. at TA = 25°C, VDD = 1.8 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON On-resistance VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 40 Ω –40°C to +85°C 80 Ω –40°C to +125°C 80 Ω ΔRON On-resistance matching between channels VS = 0 V to VDD ISD = 10 mA Refer to On-Resistance 25°C 0.4 Ω –40°C to +85°C 1.5 Ω –40°C to +125°C 1.5 Ω IS(OFF) Source off leakage current(1) VDD = 1.98 V Switch Off VD = 1.8 V / 1 V VS = 1 V / 1.8 V Refer to Off-Leakage Current 25°C ±75 nA –40°C to +85°C –150 150 nA –40°C to +125°C –175 175 nA ID(ON) IS(ON) Channel on leakage current VDD = 1.98 V Switch On VD = VS = 1.62 V / 1 V 25°C ±200 nA –40°C to +85°C –500 500 nA –40°C to +125°C –750 750 nA DIGITAL INPUTS VIH Input logic high –40°C to +125°C 1.07 5.5 V VIL Input logic low –40°C to +125°C 0 0.68 V IIH IIL Input leakage current 25°C ±0.005 µA IIH IIL Input leakage current –40°C to +125°C ±0.05 µA CIN Logic input capacitance 25°C 1 pF CIN Logic input capacitance –40°C to +125°C 2 pF POWER SUPPLY IDD VDD supply current Logic Inputs = 0 V or 5.5 V 25°C 0.002 µA –40°C to +125°C 0.52 µA

SCDS399 –AUGUST 2019 www.ti.com Product Folder Links: TMUX1247 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated Electrical Characteristics (VDD = 1.8 V ±10 %), GND = 0 V unless otherwise specified. (continued) at TA = 25°C, VDD = 1.8 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT LOGIC INPUTS tTRAN Switching time between channels VS = 1 V RL = 200 Ω, CL = 15 pF 25°C 24 ns –40°C to +85°C 44 ns –40°C to +125°C 45 ns tOPEN (BBM) Break before make time VS = 1 V RL = 200 Ω, CL = 15 pF 25°C 16 ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns QC Charge Injection VS = VDD/2 RS = 0 Ω, CL = 1 nF 25°C –3 pC OISO Off Isolation RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Off Isolation 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Off Isolation 25°C –45 dB XTALK Crosstalk RL = 50 Ω, CL = 5 pF f = 1 MHz Refer to Crosstalk 25°C –65 dB RL = 50 Ω, CL = 5 pF f = 10 MHz Refer to Crosstalk 25°C –45 dB BW Bandwidth RL = 50 Ω, CL = 5 pF 25°C 250 MHz CSOFF Source off capacitance f = 1 MHz 25°C 7 pF CSON CDON On capacitance f = 1 MHz 25°C 23 pF

www.ti.com SCDS399 –AUGUST 2019 Product Folder Links: TMUX1247 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated (1) When VS is 1 V, VD is 1.2 V or when VS is 1.2 V, VD is 1 V. 6.8 Electrical Characteristics (VDD = 1.2 V ±10 %), GND = 0 V unless otherwise specified. at TA = 25°C, VDD = 1.2 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT ANALOG SWITCH RON On-resistance VS = 0 V to VDD IDS = 10 mA 25°C 70 Ω –40°C to +85°C 105 Ω –40°C to +125°C 105 Ω ΔRON On-resistance matching between channels VS = 0 V to VDD IDS = 10 mA 25°C 0.4 Ω –40°C to +85°C 1.5 Ω –40°C to +125°C 1.5 Ω IS(OFF) Source off leakage current(1) VDD = 1.32 V Switch Off VD = 1.2 V / 1 V VS = 1 V / 1.2 V 25°C ±75 nA –40°C to +85°C –150 150 nA –40°C to +125°C –175 175 nA ID(ON) IS(ON) Channel on leakage current VDD = 1.32 V Switch On VD = VS = 1 V / 0.8 V 25°C ±200 nA –40°C to +85°C –500 500 nA –40°C to +125°C –750 750 nA DIGITAL INPUTS VIH Input logic high –40°C to +125°C 0.96 V VIL Input logic low –40°C to +125°C 0.36 V IIH IIL Input leakage current 25°C ±0.005 µA IIH IIL Input leakage current –40°C to +125°C ±0.10 µA CIN Digital input capacitance 25°C 1 pF CIN Digital input capacitance –40°C to +125°C 2 pF POWER SUPPLY IDD VDD supply current Digital Inputs = 0 V or 5.5 V 25°C 0.0015 µA –40°C to +125°C 0.45 µA DYNAMIC CHARACTERISTICS tTRAN Switching time between channels VIN = VDD VS = 1 V RL = 200 Ω, CL = 15 pF 25°C 40 ns –40°C to +85°C 175 ns –40°C to +125°C 175 ns tOPEN (BBM) Break before make time VS = 1 V RL = 200 Ω, CL = 15 pF 25°C 27 ns –40°C to +85°C 1 ns –40°C to +125°C 1 ns QC Charge Injection VS = (VDD + VSS)/2 RS = 0 Ω, CL = 1 nF 25°C ±5 pC OISO Off Isolation RL = 50 Ω, CL = 5 pF f = 1 MHz 25°C -64 dB RL = 50 Ω, CL = 5 pF f = 10 MHz 25°C -44 dB XTALK Crosstalk RL = 50 Ω, CL = 5 pF f = 1 MHz 25°C -64 dB RL = 50 Ω, CL = 5 pF f = 10 MHz 25°C -44 dB BW Bandwidth RL = 50 Ω, CL = 5 pF 25°C 250 MHz CSOFF Source off capacitance f = 1 MHz 25°C 7 pF CSON CDON On capacitance f = 1 MHz 25°C 23 pF

6.9 Typical Characteristics

Figure 1. On-Resistance vs Source or Drain Voltage Figure 2. On-Resistance vs Source or Drain Voltage Figure 3. Supply Current vs Logic Voltage Figure 4. Ttransition vs Supply Voltage Figure 5. Crosstalk and Off-Isolation vs Frequency Figure 6. Frequency Response

7 Parameter Measurement Information

7.1 On-Resistance

The on-resistance of a device is the ohmic resistance between the source (Sx) and drain (D) pins of the device. The on-resistance varies with input voltage and supply voltage. The symbol RON is used to denote on-resistance. Figure 7. On-Resistance Measurement Setup

7.2 Off-Leakage Current

off. This current is denoted by the symbol IS(OFF). The setup used to measure off-leakage current is shown in Figure 8. Figure 8. Off-Leakage Measurement Setup

7.3 On-Leakage Current

is on. This current is denoted by the symbol IS(ON). on. This current is denoted by the symbol ID(ON). measuring the on-leakage current, denoted by IS(ON) or ID(ON). Figure 9. On-Leakage Measurement Setup

7.4 Transition Time

Figure 10. Transition-Time Measurement Setup

7.5 Break-Before-Make

the setup used to measure break-before-make delay, denoted by the symbol tOPEN(BBM). Figure 11. Break-Before-Make Delay Measurement Setup

7.6 Charge Injection

transistors results in a charge injected into the drain or source during the falling or rising edge of the gate signal. by the symbol QC. Figure 12 shows the setup used to measure charge injection from Drain (D) to Source (Sx). Figure 12. Charge-Injection Measurement Setup

7.7 Off Isolation

Figure 13. Off Isolation Measurement Setup

7.8 Crosstalk

Figure 14. Crosstalk Measurement Setup

7.9 Bandwidth

shows the setup used to measure bandwidth. Figure 15. Bandwidth Measurement Setup

8 Detailed Description

8.1 Overview

8.2 Functional Block Diagram

Figure 16. TMUX1247 Functional Block Diagram

8.3 Feature Description

8.3.1 Bidirectional Operation

has very similar characteristics in both directions and supports both analog and digital signals.

8.3.2 Rail to Rail Operation

The valid signal path input/output voltage for TMUX1247 ranges from GND to VDD.

8.3.4 Fail-Safe Logic

of another device up to 5.5 V.

8.4 Device Functional Modes

The TMUX1247 can be operated without any external components except for the supply decoupling capacitors. or D) should be connected to GND.

8.5 Truth Tables

Table 1. TMUX1247 Truth Table

9 Application and Implementation

validate and test their design implementation to confirm system functionality.

9.1 Application Information

devices include 1.8V logic compatible control input pins that enable operation in systems with 1.8V I/O rails. board size, and overall system cost.

9.2 Typical Application

9.2.1 Input Control for Power Amplifier

the gate to GND. Figure 17 shows the TMUX1247 configured for control of the power amplifier. Figure 17. Input Control of Power Amplifier

9.2.1.1 Design Requirements

This design example uses the parameters listed in Table 3. Table 2. Design Parameters

9.2.1.2 Detailed Design Procedure

select pin is recommended to have a weak pull-down or pull-up resistor to ensure the input is in a known state. max continuous current can be 30 mA.

9.2.1.3 Application Curve

Figure 18. Ttransition vs Supply Voltage

9.2.2 Switchable Operational Amplifier Gain Setting

configured for gain setting application. Figure 19. Switchable Op Amp Gain Setting

9.2.2.1 Design Requirements

This design example uses the parameters listed in Table 3. Table 3. Design Parameters

9.2.2.2 Detailed Design Procedure

The TMUX1247 can be operated without any external components except for the supply decoupling capacitors. V and the max continuous current can be 30 mA.

9.2.2.3 Application Curve

Figure 20. On-Resistance vs Source or Drain Voltage

10 Power Supply Recommendations

ratings because stresses beyond the listed ratings can cause permanent damage to the devices. supply noise immunity, use a supply decoupling capacitor ranging from 0.1 μF to 10 μF from VDD to ground. inductance and is beneficial for connections to ground planes.

11 Layout

11.1 Layout Guidelines

11.1.1 Layout Information

maintains constant trace width and minimizes reflections. Figure 21. Trace Example hole pins are not recommended at high frequencies.

Decouple the VDD pin with a 0.1-µF capacitor, placed as close to the pin as possible. Make sure that the capacitor voltage rating is sufficient for the VDD supply.
Keep the input lines as short as possible.
Use a solid ground plane to help reduce electromagnetic interference (EMI) noise pickup.
Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if possible, and only make perpendicular crossings when necessary.

11.2 Layout Example

Figure 22. TMUX1247 Layout Example

12 Device and Documentation Support

12.1 Documentation Support

12.1.1 Related Documentation

Texas Instruments, Improve Stability Issues with Low CON Multiplexers. Texas Instruments, Simplifying Design with 1.8 V logic Muxes and Switches. Texas Instruments, Eliminate Power Sequencing with Powered-off Protection Signal Switches. Texas Instruments, System-Level Protection for High-Voltage Analog Multiplexers.

12.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

12.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

12.4 Trademarks

E2E is a trademark of Texas Instruments.

12.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

12.6 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 18-Oct-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TMUX1247DCKR Active Production SC70 (DCK) | 6 3000 | LARGE T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 125 247 TMUX1247DCKR.A Active Production SC70 (DCK) | 6 3000 | LARGE T&R Yes SN Level-1-260C-UNLIM -40 to 125 247 TMUX1247DCKRG4 Active Production SC70 (DCK) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 247 TMUX1247DCKRG4.A Active Production SC70 (DCK) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 247 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 6-Nov-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 6-Nov-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TMUX1247DCKR SC70 DCK 6 3000 180.0 180.0 18.0 TMUX1247DCKR SC70 DCK 6 3000 210.0 185.0 35.0 TMUX1247DCKRG4 SC70 DCK 6 3000 180.0 180.0 18.0 Pack Materials-Page 2

www.ti.com PACKAGE OUTLINE C 0.22

0.08 TYP

0.15 2.4 1.8 4X 0.65 1.1 0.8 0.1

0.0 TYP

6X 0.30 0.15 NOTE 5 0.46

0.26 TYP

0 TYP

1.3 4X 0 -12 4X 4 -15 A 2.15 1.85 B1.4 1.1 SOT - 1.1 max heightDCK0006A SMALL OUTLINE TRANSISTOR 4214835/D 11/2024 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.15 per side. 4. Falls within JEDEC MO-203 variation AB. INDEX AREA PIN 1 NOTE 5

0.1 C A B

0.1 C SCALE 5.600

www.ti.com EXAMPLE BOARD LAYOUT

0.07 MAX

0.07 MIN

6X (0.9) 6X (0.4) (2.2) 4X (0.65) (R0.05) TYP 4214835/D 11/2024 SOT - 1.1 max heightDCK0006A SMALL OUTLINE TRANSISTOR NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:18X PKG 3 4 SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL METALSOLDER MASK OPENING NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DETAILS EXPOSED METAL

www.ti.com EXAMPLE STENCIL DESIGN (2.2) 4X(0.65) 6X (0.9) 6X (0.4) (R0.05) TYP SOT - 1.1 max heightDCK0006A SMALL OUTLINE TRANSISTOR 4214835/D 11/2024 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 THICK STENCIL SCALE:18X SYMM PKG 3 4

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Product Information

TMUX1247DCKR specifications and overview.

Summary

TMUX1247 5-V Bidirectional, 2:1 (SPDT) General Purpose Switch AUGUST 2019

Description

TMUX1247 5-V Bidirectional, 2:1 (SPDT) General Purpose Switch AUGUST 2019

Source title TMUX1247DCKR Datasheet(PDF) - Texas Instruments

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