TMS5001NL

TMS5001NL TI | Alldatasheet

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BULLETIN NO. OLS 7512274, MAY 1975 © ASCII Logical Bit-Pairing and Typewriter Codes 40PIN PLASTIC DUAL-IN-LINE PACKAGE © ASR33 Teletype Code (roe views © Baudot P Punch Cox - t Paper Tape Code cap 1 }40 RI © N-Key Roll-Over or Lockout Mode com 2[ F39 R2 © Data-Ready Pulsed Output RES 3 38 RB © Internal Oscillator LoRO 4 a7 Re poo 5 36 RS ° La Data Ou itched Data Outputs oe 6 35 RE * Adjustable Key-Noise Protection poa 7 34 R7 © Keyboard Column Leakage Compensation p07 a ]33 Re © Compatible with Reed and Mechanical Switches p06 8 32 Re . Dos 10 31 ON © TTL-Compati ts ani ‘Compatible Inputs and Outputs bos 14 130 Ves © 10-Bit Output Words p03 12 ]29. ms2 voz 13[ 28 MST description bot 14; 27 Vos Voo 15 }28 cto The TMS 5001 NL is an MOS LSI dynamic encoder OR 16 25 co for use with standard keyboards having up to 90 ci ow 24 ce keys, The encoder is pre-programmed to generate in c2 18 23 «7 positive logic two ANSI-standard codes — the logical ca wl 122 cs bit pairing and the typewriter codes — the ASR33 ca 20 a cs teletype code, and the Baudot paper tape code. The device utilizes @ 3600-bit ROM (40x90 organization), a 9-row by 10-column key-scanning matrix, driver and sense amplifier interface circuits, a control circuit, a shift-register memory, and an on-chip oscillator with frequency determined by an external resistor and capacitor. The circuit can operate in the N-key roll-over or N-key lockout mode with external logic control. Key-make and key-break noise is ignored after initial key identification because scanning is terminated for a time interval that can be adjusted with another external capacitor at the delay-node terminal. ‘One of four key modes is selected by proper input levels at two mode-select terminals. A date- ready pulse is generated to indicate that a key is depressed, the binary word has been encoded, and that word is available at the 1/O terminals. The control inputs are compatible with Series 74 TTL circuits using pull-up resistors. Each data output can drive one Series 74 TTL circuit without externai resistors. The TMS 5001 NL is offered in @ 40-pin dual-in-line plastic (NL suffix) package designed for insertion in mounting-hole rows on 600-mil centers, The device is characterized for operation from 0°C to 70°C. operation The TMS 5001 subsystem consists basically of an oscillator, row and column matrix scanners, a control section with memory, and a ROM with buffered outputs. oscillator The internal oscillator generates two internal clock signals at the oscillator frequency that control the Precharge of the column inputs and drive the row and column scanning counters. The oscillator frequency is set by an external resistor connected between the resistor (RES) and common (COM) terminals and an external capacitor connected between the capacitor (CAP) and common (COM) terminals.

875 PRELIMINARY DATA SHEET: T I TRUM

Supplementary data. may be publabed at ater ae” EXAS, INSTRUMENTS W

operation (continued) row and column matrix scanners The keyboard is connected to the column (C1-C10) inputs and the row (R1-R9) outputs. During one haif of an oscillator cycle, the column inputs and row outputs are precharged to a negative voltage. In the next half-cycle, the modulo-10-counter column scanner enables one of the ten column-input gates and the modulo-9-counter row scanner allows one row to be connected to Vgg (nominally 5 V) through an MOS transistor having an impedance of about 600 ‘ohms. If the keyboard switch for that row and column is closed, the column input line capacitance discharges through the MOS load to Vgg. At a voitage Vgy (near Vg) the key closure is detected and scanning immediately stops. The row and column position is uniquely identified and stored as a single bit in a 90-bit shift register {see control section). Any single key depression is detected within one keyboard scan cycle, which is 90 oscillator or clock cycles. Within ‘one-half clock cycle after detection, the output word becomes valid at the data out (001-D010) terminals. In the roll-over mode, two clock cycles plus one delay-node interval after detection of a depressed key the scanning operation resumes and the next depressed-key location is detected and stored in the memory. Any new output word becomes valid one-half clock cycle after detection. If multiple keys are depressed simultaneously, the scanners will 3] ultimately locate and store all locations in the memory and each output word will become valid in rapid sequence In the lockout mode as the delay node voltage drops through Vg. scanning does not resume until the first key is released and the first output remains valid until the second depressed key is detected. Thus the second and subsequent depressed keys are ignored until the first key is released. In either mode when a key is released, scanning in the next cycle is halted when that key location is reached. The halt signal is obtained from the information in the memory identifying that key location. Key-release noise is therefore ignored until the delay node again precharges to Vgy. Then scanning resumes and the next depressed key is identified and its location stored in the memory. control section The delay node (DN) terminal voltage controls the time during which scanning stops after key detection. An external capacitor may be connected between DN and Vpp to lengthen this delay. Key-noise immunity can therefore be adjusted according to the key-switch characteristics. A high-level data ready (DR) output pulse having a length of one clock cycle appears ‘one-half clock cycle after the output data becomes valid to indicate that the encoded output word is available at the ten outputs. The lockout/roll-over (LO/RO) terminal places the device in the lockout operating mode when the LO/RO input is high ‘or in the roll-over mode when LO/RO is low. ROM and output buffers The row counter output addresses the ROM to generate a unique 10-bit binary word for each of the four modes and each of the 90 key positions. One of the four modes is selected by combinations of high- and low-level inputs at the mode select terminals (MS1 and MS2) as shown in the Character Output Charts. The data outputs (D01-D08) can drive Series 74 TTL circuits without external resistors. Output data becomes valid within one-half clock cycle after a key is detected. In the lockout mode, output words are latched and data remains valid until all three of the following events occur: 1) the key is released, 2) the delay node precharges to Vg, and scanning starts, and 3) a new key is depressed and detected, In the roll-over mode, output data remains valid only until the delay node charges to Vg1_ and another key is detected. The DR pulse is generated within one cycle after key detection. es 575

118 TEXAS INSTRUMENTS

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)* Supply voltage, Vp (see Note 1) Se Fo ee. =20V 100.3 NOTE 1: Under absolute maximum ravings, voltage values are with respect to the normally most positive supply, Vgg (substrate), Throughout the remainder of this data sheet voltage values are with respect to Vg. “Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This isa stress rating only and functional operation of the device at these or any other conditions beyond those indicated im the "Recommended Operating Conditions” section of this specification Is not implied, Exposure to absolute maximum rated conditions for extended periods may affect device reliabsly functional block diagram KEYBOARD COLUMN INPUTS a — ~ co cs ce oc? co cS ce 3 2 cr «2s1| (251 20] cai] tza| an 20} 191 toon] | a) : est (28) | \\ ‘coLuMN MODE SELECT 4 SCAN ‘ sz 22) | COUNTER P wr! if — oot ( vo10 | p09 16) | m | e voe ; « (31) DELAY 2) vor 1} 2 # NODE. ON 3! : Fs 8) v0 | | § ¢ z tw Lockout) Fad (10) | 2h BS A 10x90 Rom annay 5 - CONTROL — poLcoven, g\\ ve Sol E Pe 5 ch a BF oon ni | & id 3 Fs z) a2 | & ine, oara oa g READY, OR oon 21! (. cor 8 | ; . ' } { i | I i \\ Row scan ‘ COUNTER: | a LY J-I-E J- a a a ee es 4 £321} 1331] 134) (35)] 1869 | 1371 cal] as} aol a) a} ay AO RB ORT AG ORS RA RS AZ AY RES COM CAP KEYBOARD ROW OUTPUTS ) Rexr 7 |Cexr 675 TEXAS INSTRUMENTS 119 INCORPORATES

4-MODE DYNAMIC 90-KEY KEYBOARD ENCODER — ee SSSSSSSSSSSeeeeeeeeEeEeEeEeEeEe recommended operating conditions PARAMETER [MIN Nom max _ [unit | Supply voltese, VD ee ee Supply volte Viger : _—_ ee ee Supply voltage, Vss Fighevel input voltage (MS and LOTRO inputs, Vin Vsg=16 Vs -¥ Low-level input voltage (MS and LO/AO inputs), Vit Oscillator frequency, fose [0 300 | ete [Operating feesirtemperstaw Ta OC) electrical characteristics over recommended operating free-air temperature range [-raramereR——SCSC~“*‘“*~*SCSCSCSC*”Y;SCSTS CONDITIONS [MIN MAX [UNIT ] Low-level sense voltage (see Note 2), VSL. ~ High-level output voltage, data ready and DO outputs, VOM “Ton = 100A Vss-?__ vss |v Low-level output voltage, data ready and DO outputs, VoL lol=témaA «OSV [Precharge voltage at column inputs GeeNowe2) Tg ST Supply current from VG. 166 es eC [Row or columnline capacitance ———SSCSCS*~C~C~S~S~tCS~CS TOO 1000 |_| and precharge voltage levels only. a TYPICAL OPERATING CHARACTERISTICS OSCILLATOR FREQUENCY vs EXTERNAL DELAY NODE INTERVAL RESISTANCE AND CAPACITANCE vs EXTERNAL CAPACITANCE 100 x 100 CE OEE [PN ta= 28°C Ta = 25°C tS ee Seeri

80 KEE Nominal operating conditions Nominal operating conditions ioeeeetes

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120 TEXAS, INSTRUMENTS

4-MODE DYNAMIC 90-KEY KEYBOARD ENCODER character output charts Bonn monnmonamornnoenmo-amo-nmeoenmoran Fy FA jo- aloo ol4at - 2 5 ne faa Fala \\ Zo ho rpegehos- 7 Es ee o>>geirgs | | [rig iene < 5 gaasas a x wos s z E 2 z 2 2 Fd z z . Boe wmo ame nner nner nnernnennaernnenne g eae) pe eeaeeceee—~| [| © pase rm x dead g 622220" err S-loog sleek S/S SSsiSS SSR RRR --o- Eglee cee Slee S-b>2-558ah~ cee ee “|---| z Fy Fy z 2 2 B 2 F . en 575 TEXAS, INSTRUMENTS 121

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122 TEXAS INSTRUMENTS

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