TMP75AIDGKRG4 TI1 | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 20
Technical content
FEATURES
/C006827 ADDRESSES (TMP175)
8 ADDRESSES (TMP75)
/C0068DIGITAL OUTPUT: Two-Wire Serial Interface /C0068RESOLUTION: 9- to 12-Bits, User-Selectable /C0068ACCURACY: ±1.5°C (max) from −25°C to +85°C ±2.0°C (max) from −40°C to +125°C /C0068LOW QUIESCENT CURRENT: 50µA, 0.1µA Standby /C0068WIDE SUPPLY RANGE: 2.7V to 5.5V /C0068SMALL SO-8 AND MSOP-8 PACKAGES
APPLICATIONS
/C0068POWER-SUPPLY TEMPERATURE MONITORING /C0068COMPUTER PERIPHERAL THERMAL PROTECTION /C0068NOTEBOOK COMPUTERS /C0068CELL PHONES /C0068BATTERY MANAGEMENT /C0068OFFICE MACHINES /C0068THERMOSTAT CONTROLS /C0068ENVIRONMENTAL MONITORING AND HVAC /C0068ELECTROMECHANICAL DEVICE TEMPERATURE
DESCRIPTION
The TMP175 and TMP75 are two-wire, serial output temperature sensors available in SO-8 and MSOP-8 packages. Requiring no external components, the TMP175 and TMP75 are capable of reading temperatures with a resolution of 0.0625°C. The TMP175 and TMP75 feature a Two-Wire interface that is SMBus-compatible, with the TMP175 allowing up to 27 devices on one bus and the TMP75 allowing up to eight devices on one bus. The TMP175 and TMP75 both feature an SMBus Alert function. The TMP175 and TMP75 are ideal for extended temperature measurement in a variety of communication, computer, consumer, environmental, industrial, and instrumentation applications. The TMP175 and TMP75 are specified for operation over a temperature range of −40°C to +125°C. Diode Te m p . Sensor A/D Converter OSC Control Logic Serial Interface Config. and T emp. Register TMP175, TMP75 T emperature ALERT SDA 1 5GND SCL 27 A0 TMP175 TMP75 SBOS288J − JANUARY 2004 − REVISED DECEMBER 2007 Digital Temperature Sensor with Two-Wire Interface /C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 www.ti.com Copyright 2004−2007, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners.
/C0084/C0077/C0080/C0049/C0055/C0053 /C0084/C0077/C0080/C0055/C0053 SBOS288J − JANUARY 2004 − REVISED DECEMBER 2007 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) ESD Rating: (1)Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported. (2)Input voltage rating applies to all TMP175 and TMP75 input voltages. This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING TMP175 SO-8 D TMP175 TMP175 MSOP-8 DGK DABQ TMP75 SO-8 D TMP75 TMP75 MSOP-8 DGK T127 (1)For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. PIN ASSIGNMENTS Top View NOTE: Pin 1 is determined by orienting the package marking as indicated in the diagram. SDA SCL ALERT GND TMP175 SO−8 TMP175 SDA SCL ALERT GND T127 MSOP−8 TMP75 SDA SCL ALERT GND TMP75 SO−8 TMP75 SDA SCL ALERT GND DABQ MSOP−8 TMP175
/C0084/C0077/C0080/C0049/C0055/C0053 /C0084/C0077/C0080/C0055/C0053 SBOS288J − JANUARY 2004 − REVISED DECEMBER 2007 www.ti.com
ELECTRICAL CHARACTERISTICS
At TA = −40°C to +125°C, and V+ = 2.7V to 5.5V, unless otherwise noted. PARAMETER CONDITION TMP175 TMP75 UNITSPARAMETER CONDITION MIN TYP MAX MIN TYP MAX UNITS TEMPERATURE INPUT Range −40 +125 −40 +125 °C Accuracy (Temperature Error) −25°C to +85°C ±0.5 ±1.5 ±0.5 ±2.0 °C vs Supply 0.2 ±0.5 0.2 ±0.5 °C/V Resolution(1) Selectable +0.0625 +0.0625 °C DIGITAL INPUT/OUTPUT Input Capacitance 3 3 pF Input Logic Levels: Leakage Input Current, IIN 0V ≤ VIN ≤ 6V 1 1 µA Input Voltage Hysteresis SCL and SDA Pins 500 500 mV Output Logic Levels: VOL SDA IOL = 3mA 0 0.15 0.4 0 0.15 0.4 V VOL ALERT IOL = 4mA 0 0.15 0.4 0 0.15 0.4 V Resolution Selectable 9 to 12 9 to 12 Bits Conversion Time 9-Bit 27.5 37.5 27.5 37.5 ms 10-Bit 55 75 55 75 ms 11-Bit 110 150 110 150 ms 12-Bit 220 300 220 300 ms Timeout Time 25 54 74 25 54 74 ms POWER SUPPLY Operating Range 2.7 5.5 2.7 5.5 V Quiescent Current IQ Serial Bus Inactive 50 85 50 85 µA Serial Bus Active, SCL Freq = 400kHz 100 100 µA Serial Bus Active, SCL Freq = 3.4MHz 410 410 µA Shutdown Current ISD Serial Bus Inactive 0.1 3 0.1 3 µA Serial Bus Active, SCL Freq = 400kHz 60 60 µA Serial Bus Active, SCL Freq = 3.4MHz 380 380 µA TEMPERATURE RANGE Specified Range −40 +125 −40 +125 °C Operating Range −55 +127 −55 +127 °C Thermal Resistance /C0113JA MSOP-8 250 250 °C/W SO-8 150 150 °C/W (1)Specified for 12-bit resolution.
/C0084/C0077/C0080/C0049/C0055/C0053 /C0084/C0077/C0080/C0055/C0053 SBOS288J − JANUARY 2004 − REVISED DECEMBER 2007 www.ti.com TYPICAL CHARACTERISTICS At TA = +25°C and V+ = 5.0V, unless otherwise noted. QUIESCENT CURRENT vs TEMPERATURE Temperature (/C0095C) −55 −35 −15 5 25 45 65 85 105 125 130 IQ (µA) Serial Bus Inactive V +=5 V V+ = 2.7V 300 250 200 150 100 CONVERSION TIME vs TEMPERATURE Temperature (/C0095C) Conversion Time (ms) 12−bit resolution. −55 −35 −15 5 25 45 65 85 105 125 130 V +=5 V V+ = 2.7V 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 −0.1 SHUTDOWN CURRENT vs TEMPERATURE Temperature (/C0095C) ISD (µA) −55 −35 −15 5 25 45 65 85 105 125 130 2.0 1.5 1.0 0.5 0.0 −0.5 −1.0 −1.5 −2.0 TEMPERATURE ACCURACY vs TEMPERATURE Temperature Error (/C0095C) 3 typical units 12−bit resolution. Temperature (/C0095C) −55 −35 −1 55 2 54 56 58 5 1 0 5 1 2 5 1 3 0 500 450 400 350 300 250 200 150 100 QUIESCENT CURRENT WITH BUS ACTIVITY vs TEMPERATURE Frequency (Hz) 1k 10k 100k 1M 10M IQ (µA) 125/C0095C 25/C0095C −55/C0095C Hs MODE FAST MODE
Table 5. Temperature Data Format used with the unused LSBs set to zero. of the Configuration Register is all bits equal to 0.
1 OS R1 R0 F1 F0 POL TM SD
Table 6. Configuration Register Format reduces current consumption to typically less than 0.1µA. will shut down once the current conversion is completed. continuous conversion state. High and Low Limit Registers section. the ALERT pin will be active LOW, as shown in Figure 3. state of the ALERT pin is inverted. Figure 3. Output Transfer Function Diagrams order, see the section High and Low Limit Registers. Table 7. Fault Settings of the TMP175 and TMP75
Table 8. Resolution of the TMP175 and TMP75 shutdown state at the completion of the single conversion. device to Comparator Mode (TM = 0). Both operational modes are represented in Figure 3. for the Temperature Register.
1 H11 H10 H9 H8 H7 H6 H5 H4
2 H3 H2 H1 H0 0 0 0 0
Table 9. Bytes 1 and 2 of THIGH Register
1 L11 L10 L9 L8 L7 L6 L5 L4
2 L3 L2 L1 L0 0 0 0 0
Table 10. Bytes 1 and 2 of TLOW Register configured for 9-bit resolution. must first address slave devices via a slave address byte.
devices to be addressed on a single bus interface. or in response to a Two-Wire address acquire request.
0 Float 0 0101000
0 Float 1 0101001
1 Float 0 0101010
1 Float 1 010101 1
0 Float Float 0110101
1 Float Float 0110110
Table 11. Address Pins and Slave Addresses for Table 12. Address Pins and Slave Addresses for the START and STOP conditions. indicating whether a read or write operation is intended.
/C0084/C0077/C0080/C0049/C0055/C0053 /C0084/C0077/C0080/C0055/C0053 SBOS288J − JANUARY 2004 − REVISED DECEMBER 2007 www.ti.com When reading from the TMP175 and TMP75, the last value stored in the Pointer Register by a write operation is used to determine which register is read by a read operation. To change the register pointer for a read operation, a new value must be written to the Pointer Register. This is accomplished by issuing a slave address byte with the R/W bit LOW, followed by the Pointer Register Byte. No additional data is required. The master can then generate a START condition and send the slave address byte with the R/W bit HIGH to initiate the read command. See Figure 7 for details of this sequence. If repeated reads from the same register are desired, it is not necessary to continually send the Pointer Register bytes, as the TMP175 and TMP75 will remember the Pointer Register value until it is changed by the next write operation. Note that register bytes are sent most-significant byte first, followed by the least significant byte. SLAVE MODE OPERATIONS The TMP175 and TMP75 can operate as slave receivers or slave transmitters. Slave Receiver Mode: The first byte transmitted by the master is the slave address, with the R/W bit LOW. The TMP175 or TMP75 then acknowledges reception of a valid address. The next byte transmitted by the master is the Pointer Register. The TMP175 or TMP75 then acknowledges reception of the Pointer Register byte. The next byte or bytes are written to the register addressed by the Pointer Register. The TMP175 and TMP75 will acknowledge reception of each data byte. The master may terminate data transfer by generating a START or STOP condition. Slave Transmitter Mode: The first byte is transmitted by the master and is the slave address, with the R/W bit HIGH. The slave acknowledges reception of a valid slave address. The next byte is transmitted by the slave and is the most significant byte of the register indicated by the Pointer Register. The master acknowledges reception of the data byte. The next byte transmitted by the slave is the least significant byte. The master acknowledges reception of the data byte. The master may terminate data transfer by generating a Not-Acknowledge on reception of any data byte, or generating a START or STOP condition. SMBus ALERT FUNCTION The TMP175 and TMP75 support the SMBus Alert function. When the TMP75 and TMP175 are operating in Interrupt Mode (TM = 1), the ALERT pin of the TMP75 or TMP175 may be connected as an SMBus Alert signal. When a master senses that an ALERT condition is present on the ALERT line, the master sends an SMBus Alert command (00011001) on the bus. If the ALERT pin of the TMP75 or TMP175 is active, the devices will acknowledge the SMBus Alert command and respond by returning its slave address on the SDA line. The eighth bit (LSB) of the slave address byte will indicate if the temperature exceeding T HIGH or falling below TLOW caused the ALERT condition. This bit will be HIGH if the temperature is greater than or equal to THIGH . This bit will be LOW if the temperature is less than TLOW . Refer to Figure 8 for details of this sequence. If multiple devices on the bus respond to the SMBus Alert command, arbitration during the slave address portion of the SMBus Alert command will determine which device will clear its ALERT status. If the TMP75 or TMP175 wins the arbitration, its ALERT pin will become inactive at the completion of the SMBus Alert command. If the TMP75 or TMP175 loses the arbitration, its ALERT pin will remain active. GENERAL CALL The TMP175 and TMP75 respond to a Two-Wire General Call address (0000000) if the eighth bit is 0. The device will acknowledge the General Call address and respond to commands in the second byte. If the second byte is 00000100, the TMP175 and TMP75 will latch the status of their address pins, but will not reset. If the second byte is 00000110, the TMP175 and TMP75 will latch the status of their address pins and reset their internal registers to their power-up values. HIGH-SPEED MODE In order for the Two-Wire bus to operate at frequencies above 400kHz, the master device must issue an Hs-mode master code (00001XXX) as the first byte after a START condition to switch the bus to high-speed operation. The TMP175 and TMP75 will not acknowledge this byte, but will switch their input filters on SDA and SCL and their output filters on SDA to operate in Hs-mode, allowing transfers at up to 3.4MHz. After the Hs-mode master code has been issued, the master will transmit a Two-Wire slave address to initiate a data transfer operation. The bus will continue to operate in Hs-mode until a STOP condition occurs on the bus. Upon receiving the STOP condition, the TMP175 and TMP75 will switch the input and output filter back to fast-mode operation. TIMEOUT FUNCTION The TMP175 and TMP75 will reset the serial interface if either SCL or SDA are held LOW for 54ms (typ) between a START and STOP condition. The TMP175 and TMP75 will release the bus if it is pulled LOW and will wait for a START condition. To avoid activating the timeout function, it is necessary to maintain a communication speed of at least 1kHz for SCL operating frequency.
Bus Idle: Both SDA and SCL lines remain HIGH. repeated START or STOP condition. acknowledges the transfer of data. Hold time after repeated START condition. Table 13. Timing Diagram Definitions for the TMP175 and TMP75 Figure 4. Two-Wire Timing Diagram
000 R/W D7 D6 D5 D4 D3 D2 D1 D0
Figure 7. Two-Wire Timing Diagram for Read Word Format Figure 8. Timing Diagram for SMBus ALERT
www.ti.com 20-Oct-2012 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) TMP175AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-250C-1 YEAR TMP175AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-250C-1 YEAR TMP175AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMP175AIDGKRG4 ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMP175AIDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMP175AIDGKTG4 ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMP175AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMP175AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMP75AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) Call TI Level-1-260C-UNLIM TMP75AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) Call TI Level-1-260C-UNLIM TMP75AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMP75AIDGKRG4 ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMP75AIDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMP75AIDGKTG4 ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TMP75AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) Call TI Level-1-260C-UNLIM TMP75AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) Call TI Level-1-260C-UNLIM (1) The marketing status values are defined as follows:
www.ti.com 20-Oct-2012 Addendum-Page 2 ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 Pack Materials-Page 1
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TMP175AIDGKR VSSOP DGK 8 2500 366.0 364.0 50.0 TMP175AIDGKR VSSOP DGK 8 2500 370.0 355.0 55.0 TMP175AIDGKT VSSOP DGK 8 250 195.0 200.0 45.0 TMP175AIDGKT VSSOP DGK 8 250 366.0 364.0 50.0 TMP175AIDR SOIC D 8 2500 367.0 367.0 35.0 TMP75AIDGKR VSSOP DGK 8 2500 366.0 364.0 50.0 TMP75AIDGKT VSSOP DGK 8 250 366.0 364.0 50.0 TMP75AIDR SOIC D 8 2500 367.0 367.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 Pack Materials-Page 2
Texas InstrumentsIncorporatedand itssubsidiaries(TI)reservetherighttomake corrections,enhancements,improvementsand other changes toitssemiconductorproductsand servicesperJESD46, latestissue,and todiscontinueany productorserviceperJESD48, latest issue.Buyersshouldobtainthelatestrelevantinformationbeforeplacingordersand shouldverifythatsuch informationiscurrentand complete.Allsemiconductorproducts(alsoreferredtohereinas “components”)aresoldsubjecttoTI’s termsand conditionsofsale suppliedatthetimeoforderacknowledgment. TIwarrantsperformanceofitscomponents tothespecificationsapplicableatthetimeofsale,inaccordancewiththewarrantyinTI’s terms and conditionsofsaleofsemiconductorproducts.Testingand otherqualitycontroltechniquesareused totheextentTIdeems necessary tosupportthiswarranty.Exceptwhere mandated by applicablelaw,testingofallparametersofeach component isnotnecessarily performed. TIassumes no liabilityforapplicationsassistanceorthedesignofBuyers’products.Buyersareresponsiblefortheirproductsand applicationsusingTIcomponents.To minimizetherisksassociatedwithBuyers’productsand applications,Buyersshouldprovide adequatedesignand operatingsafeguards. TIdoes notwarrantorrepresentthatany license,eitherexpressorimplied,isgrantedunderany patentright,copyright,mask work right,or otherintellectualpropertyrightrelatingtoany combination,machine,orprocessinwhichTIcomponents orservicesareused.Information publishedby TIregardingthird-partyproductsorservicesdoes notconstitutea licensetouse such productsorservicesora warrantyor endorsementthereof.Use ofsuch informationmay requirea licensefroma thirdpartyunderthepatentsorotherintellectualpropertyofthe thirdparty,ora licensefromTIunderthepatentsorotherintellectualpropertyofTI. ReproductionofsignificantportionsofTIinformationinTIdatabooks ordatasheetsispermissibleonlyifreproductioniswithoutalteration and isaccompaniedby allassociatedwarranties,conditions,limitations,and notices.TIisnotresponsibleorliableforsuch altered documentation.Informationofthirdpartiesmay be subjecttoadditionalrestrictions. ResaleofTIcomponents orserviceswithstatementsdifferentfromorbeyond theparametersstatedby TIforthatcomponent orservice voidsallexpressand any impliedwarrantiesfortheassociatedTIcomponent orserviceand isan unfairand deceptivebusinesspractice. TIisnotresponsibleorliableforany such statements. Buyeracknowledgesand agreesthatitissolelyresponsibleforcompliancewithalllegal,regulatoryand safety-relatedrequirements concerningitsproducts,and any use ofTIcomponents initsapplications,notwithstandingany applications-relatedinformationorsupport thatmay be providedby TI.Buyerrepresentsand agreesthatithas allthenecessaryexpertisetocreateand implementsafeguardswhich anticipatedangerousconsequencesoffailures,monitorfailuresand theirconsequences,lessenthelikelihoodoffailuresthatmightcause harm and takeappropriateremedialactions.BuyerwillfullyindemnifyTIand itsrepresentativesagainstany damages arisingoutoftheuse ofany TIcomponents insafety-criticalapplications. Insome cases,TIcomponents may be promotedspecificallytofacilitatesafety-relatedapplications.Withsuch components,TI’s goalisto helpenablecustomerstodesignand createtheirown end-productsolutionsthatmeet applicablefunctionalsafetystandardsand requirements.Nonetheless,such components aresubjecttotheseterms. No TIcomponents areauthorizedforuse inFDA ClassIII(orsimilarlife-criticalmedicalequipment)unlessauthorizedofficersoftheparties have executeda specialagreementspecificallygoverningsuch use. OnlythoseTIcomponents whichTIhas specificallydesignatedas militarygradeor“enhanced plastic”aredesignedand intendedforuse in military/aerospaceapplicationsorenvironments.Buyeracknowledgesand agreesthatany militaryoraerospaceuse ofTIcomponents whichhave not been so designatedissolelyattheBuyer's risk,and thatBuyerissolelyresponsibleforcompliancewithalllegaland regulatoryrequirementsinconnectionwithsuch use. TIhas specificallydesignatedcertaincomponents whichmeet ISO/TS16949 requirements,mainlyforautomotiveuse.Components which have notbeen so designatedareneitherdesignednorintendedforautomotiveuse;and TIwillnotbe responsibleforany failureofsuch components tomeet such requirements. Products Applications Audio www.ti.com/audio Automotiveand Transportationwww.ti.com/automotive Amplifiers amplifier.ti.com Communicationsand Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP ® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energyand Lighting www.ti.com/energy Clocksand Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space,Avionicsand Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Videoand Imaging www.ti.com/video RFID www.ti-rfid.com OMAP ApplicationsProcessors www.ti.com/omap TIE2E Community e2e.ti.com WirelessConnectivity www.ti.com/wirelessconnectivity MailingAddress:Texas Instruments,PostOfficeBox 655303,Dallas,Texas 75265 Copyright© 2012,Texas InstrumentsIncorporated