TMP401 TI | Alldatasheet
Document overview
- Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
- PDF pages: 41
Technical content
Bus Interface Pointer Register Resolution Register Configuration Register Local Temp Low Limit Local THERM Limit Local Temp High Limit Remote Temp Low Limit Remote THERM Limit Remote Temp High Limit Remote Temperature Register Local Temperature Register Temperature Comparators Interrupt Configuration SCL GND THERM4
6 ALERT/THERM2V+
Sample & Buy T echnical Documents Tools & Software Support & Community TMP401 SBOS371B – AUGUST 2006– REVISED OCTOBER 2014 TMP401±1°CProgrammable,RemoteandLocal,DigitalOutTemperatureSensor
1 Features 3 Description
The TMP401 is a remote temperature sensor monitor 1• ±1°C Remote Diode Sensor with a built-in local temperature sensor. The remote• ±3°C Local Temperature Sensor sensor is capable of monitoring the temperature of
- Series Resistance Cancellation any external PN junction. Typical sense elements include low-cost NPN- or PNP-type transistors and• THERM Flag Output diodes, or accessible thermal diodes integrated within• ALERT/THERM2 Flag Output microcontrollers, microprocessors, or field-• Programmable Over- and Undertemperature programmable gate arrays (FPGAs). Limits The accuracy of the remote sensor is ±1°C for• Programmable Resolution: 9- to 12-Bit multiple IC manufacturers, with no calibration needed.
- Diode Fault Detection The two-wire serial interface accepts SMBus write byte, read byte, send byte, and receive byte• SMBus-Compatible commands to program alarm thresholds and to read temperature data.2 Applications Features included in the TMP401 are series• Servers and Workstations resistance cancellation, wide remote temperature• Desktop and Notebook Computers measurement range (up to +150°C), diode fault
- Telecom and Network Infrastructure detection, and temperature alert functions.
- Set Top Boxes Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TMP401 VSSOP (8) 3.00 mm × 3.00 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. space space An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
SBOS371B – AUGUST 2006– REVISED OCTOBER 2014 www.ti.com Table of Contents
4 Revision History
Changes from Revision A (October 2007) to Revision B Page
- Added Handling Rating, Recommended Operating Conditions, and Thermal Information tables and Feature Description, Device Functional Modes, Application and Implementation, Power Supply Recommendations, Layout, Device and Documentation Support, and Mechanical, Packaging, and Orderable
- Deleted SMBus Interface, SMBus clock frequency and SCL falling edge to SDA valid time parameters from
- Changed typical and maximum specifications in first two rows of Power Supply, IQ parameter in Electrical
2 Submit Documentation Feedback Copyright © 2006–2014, Texas Instruments Incorporated
Product Folder Links: TMP401
www.ti.com SBOS371B –AUGUST 2006– REVISED OCTOBER 2014 Revision History (continued) Copyright © 2006–2014, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TMP401
SBOS371B – AUGUST 2006– REVISED OCTOBER 2014 www.ti.com
5 Pin Configuration and Functions
(Top View) Pin Functions PIN I/O DESCRIPTION NO. NAME 1 V+ Analog input Positive supply (3 V to 5.5 V)
2 D+ Analog input Positive connection to remote temperature sensor
3 D– Analog input Negative connection to remote temperature sensor
4 THERM Digital output Thermal flag, active low, open-drain; requires pull-up resistor to V+
5 GND — Ground
Alert (reconfigurable as second thermal flag), active low, open-drain; requires pull-up6 ALERT/THERM2 Digital output resistor to V+
7 SDA Digital I/O Serial data line for SMBus, open-drain; requires pull-up resistor to V+
8 SCL Digital I/O Serial clock line for SMBus, open-drain; requires pull-up resistor to V+
4 Submit Documentation Feedback Copyright © 2006–2014, Texas Instruments Incorporated
Product Folder Links: TMP401
www.ti.com SBOS371B –AUGUST 2006– REVISED OCTOBER 2014
6 Specifications
6.1 Absolute Maximum Ratings(1)
Power supply, V+ 7.0 V Input and output voltage(2) –0.5 (V+) + (0.5) V Input current 10 mA Operating temperature range –55 +125 °C Junction Temperature (TJ max) +150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Input voltage rating applies to all TMP401 input and output pins.
6.2 Handling Ratings
Tstg Storage temperature range –60 +130 °C Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all –3000 3000pins(1) V(ESD) Electrostatic discharge V Charged device model (CDM), per JEDEC specification –1000 1000JESD22-C101, all pins(2) (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
V+ Positive supply (3 V to 5.5 V) 5 V TA Ambient temperature 25 °C
6.4 Thermal Information
THERMAL METRIC(1) DGK (VSSOP) UNIT
8 PINS
RθJA Junction-to-ambient thermal resistance 78.8 RθJC(top) Junction-to-case (top) thermal resistance 71.6 RθJB Junction-to-board thermal resistance 68.2 °C/W ψJT Junction-to-top characterization parameter 22.0 ψJB Junction-to-board characterization parameter 67.6 RθJC(bot) Junction-to-case (bottom) thermal resistance N/A (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Copyright © 2006–2014, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: TMP401
SBOS371B – AUGUST 2006– REVISED OCTOBER 2014 www.ti.com 6.5 Electrical Characteristics: V+ = 3 V to 5.5 V At TA = –40°C to +125°C, and V+ = 3 V to 5.5 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TEMPERATURE ERROR TELOCAL Local temperature sensor TA = –40°C to +125°C ±1 ±3 °C TA = +15°C to +75°C, TREMOTE = –40°C to +150°C, ±1 °CV+ = 3.3 V TEREMOTE Remote temperature sensor(1) TA = –40°C to +100°C, TREMOTE = –40°C to +150°C, ±3 °CV+ = 3.3 V TA = –40°C to +125°C, TREMOTE = –40°C to +150°C ±5 °C TELOCAL and TEREMOTE versus supply V+ = 3 V to 5.5 V ±0.2 ±0.5 °C/V TEMPERATURE MEASUREMENT Conversion time (per channel) One-shot mode 115 ms TELOCAL 9 12 Bits(programmable)Resolution TEREMOTE 12 Bits High Series resistance, 3 kΩ max 120 µA Medium high 60 µARemote sensor source currents Medium low 12 µA Low 6 µA η Remote transistor ideality factor TMP401 optimized ideality factor 1.008 SMBus INTERFACE VIH Logic input high voltage (SCL, SDA) 2.1 V VIL Logic input low voltage (SCL, SDA) 0.8 V Hysteresis 500 mV SMBus output low sink current 6 mA Logic input current –1 +1 µA SMBus input capacitance (SCL, SDA) 3 pF SMBus timeout 30 35 ms DIGITAL OUTPUTS VOL Output low voltage IOUT = 6 mA 0.15 0.4 V IOH High-level output leakage current VOUT = V+ 0.1 1 µA ALERT/THERM2 output low sink current ALERT/THERM2 forced to 0.4 V 6 mA THERM output low sink current THERM forced to 0.4 V 6 mA POWER SUPPLY V+ Specified voltage range 3 5.5 V 0.0625 conversions per second 29 36 µA 8 conversions per second 390 450 µA IQ Quiescent current Serial bus inactive, shutdown mode 3 10 µA Serial bus active, fS = 400 kHz, shutdown mode 90 µA Serial bus active, fS = 2.5 MHz, shutdown mode 350 µA UVLO Undervoltage lock out 2.3 2.4 2.6 V POR Power-on reset threshold 1.6 2.3 V TEMPERATURE RANGE Specified range –40 +125 °C Storage range –60 +130 °C θJA Thermal resistance, VSSOP-8 150 °C/W (1) Tested with less than 5-Ω effective series resistance and 100-pF differential input capacitance.
6 Submit Documentation Feedback Copyright © 2006–2014, Texas Instruments Incorporated
Product Folder Links: TMP401
www.ti.com SBOS371B –AUGUST 2006– REVISED OCTOBER 2014
6.6 Timing Requirements
See the Timing Diagrams section for timing diagrams. FAST MODE HIGH-SPEED MODE PARAMETER MIN MAX MIN MAX UNIT f(SCL) SCL operating frequency 0.001 0.4 0.001 2.5 MHz t(BUF) Bus free time between stop and start condition 600 160 ns Hold time after repeated start condition.t(HDSTA) 600 160 nsAfter this period, the first clock is generated. t(SUSTA) Repeated start condition setup time 600 160 ns t(SUSTO) Stop condition setup time 600 160 ns t(HDDAT) Data hold time 100 80 ns t(SUDAT) Data setup time 100 60 ns t(LOW) SCL clock low period 1300 260 ns t(HIGH) SCL clock high period 600 60 ns Clock rise and fall time 300 40 ns tF Data fall time 300 120 ns 300 ns tR Data rise time for SCL ≤ 100 kHz 1000 ns Copyright © 2006–2014, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: TMP401
30 Typical Units Shown
28 Typical Units Shown
6.7 Typical Characteristics
At TA = +25°C and V+ = 5.0 V, unless otherwise noted. Figure 1. Remote Temperature Error vs Temperature Figure 2. Local Temperature Error vs Temperature Figure 3. Remote Temperature Error vs Leakage Resistance Figure 4. Remote Temperature Error vs Series Resistance Figure 6. Remote Temperature Error vsFigure 5. Remote Temperature Error vs Series Resistance
8 Submit Documentation Feedback Copyright © 2006–2014, Texas Instruments Incorporated
0.1 F/c109 10 k/c87
7 Detailed Description
7.1 Overview
temperature comparator limits, and status information. response to rising temperatures. recommended for good local bypassing. Figure 11 shows a typical configuration for the TMP401. cancellation. A 2N3906 PNP is used in this configuration. (2) In most applications, RS is < 1.5 kΩ. (3) In most applications, CDIFF is < 1000 pF. Figure 11. Basic Connections
10 Submit Documentation Feedback Copyright © 2006–2014, Texas Instruments Incorporated
Bus Interface Pointer Register Resolution Register Configuration Register Local Temp Low Limit Local THERM Limit Local Temp High Limit Remote Temp Low Limit Remote THERM Limit Remote Temp High Limit Remote Temperature Register Local Temperature Register Temperature Comparators Interrupt Configuration SCL GND THERM4 www.ti.com SBOS371B –AUGUST 2006– REVISED OCTOBER 2014
7.2 Functional Block Diagram
Copyright © 2006–2014, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: TMP401
7.3 Feature Description
7.3.1 Standard and Extended Temperature Measurement Range
extended temperature range, switch bit 2 (RANGE) of the configuration register from low to high. Table 1. Temperature Data Format (Local and Remote Temperature High Bytes) values must be reprogrammed in the appropriate binary or extended binary format.
12 Submit Documentation Feedback Copyright © 2006–2014, Texas Instruments Incorporated
Table 2. Decimal Fraction Temperature Data Format (Local and Remote Temperature Low Bytes)
/c0b /c0c /c3e /c40ERR ERR T = -1.48 C /caa /cba /c71/cab /cbb /cab /cbb /cac /cbc /c71 /c0b /c0c /c0b /c0cERR /c18/c03/c10/c03/c14/c11/c13/c13/c1bT = x 2.73.15 + T C1.008 /caa /cba /caa /cba /c71/cab /cbb /cac /cbc /cab /cbb /cac /cbc TMP401 SBOS371B – AUGUST 2006– REVISED OCTOBER 2014 www.ti.com
7.3.2 Remote Sensing
The TMP401 is designed to be used with either discrete transistors or substrate transistors built into processor chips and application-specific integrated circuits (ASICs). Either NPN or PNP transistors can be used, as long as the base-emitter junction is used as the remote temperature sense. Either a transistor or diode connection can also be used (see Figure 11). Errors in remote temperature sensor readings are the consequence of the ideality factor and current excitation used by the TMP401 versus the manufacturer’s specified operating current for a given transistor. Some manufacturers specify a high-level and low-level current for the temperature-sensing substrate transistors. The TMP401 uses 6 μA for ILOW and 120 μA for IHIGH. The ideality factor (η) is a measured characteristic of a remote temperature sensor diode as compared to an ideal diode. The ideality factor for the TMP401 is trimmed to be 1.008. For transistors whose ideality factor does not match the TMP401, Equation 1 can be used to calculate the temperature error. Note that for Equation 1 to be used correctly, actual temperature (°C) must be converted to Kelvin (°K). where
- η = Ideality factor of the remote temperature sensor,
- T(°C) = actual temperature, and
- TERR = Error in the TMP401 reading resulting from η ≠ 1.008. Degree delta is the same for °C and °K. (1) For η = 1.004 and T(°C) = 100°C, use Equation 2: (2) If a discrete transistor is used as the remote temperature sensor with the TMP401, the best accuracy can be achieved by selecting the transistor according to the following criteria: 1. Base-emitter voltage > 0.25 V at 6 μA, at the highest sensed temperature. 2. Base-emitter voltage < 0.95 V at 120 μA, at the lowest sensed temperature. 3. Base resistance < 100 Ω. 4. Tight control of VBE characteristics indicated by small variations in hFE (that is, 50 to 150). Based on these criteria, two recommended small-signal transistors are the 2N3904 (NPN) or 2N3906 (PNP).
14 Submit Documentation Feedback Copyright © 2006–2014, Texas Instruments Incorporated
Product Folder Links: TMP401
www.ti.com SBOS371B –AUGUST 2006– REVISED OCTOBER 2014
7.4 Device Functional Modes
7.4.1 SMBus Alert Function
The TMP401 supports the SMBus alert function. When pin 6 is configured as an alert output, the ALERT pin of the TMP401 can be connected as an SMBus alert signal. When a master detects an alert condition on the ALERT line, the master sends an SMBus alert command (0001 1001b) on the bus. If the ALERT pin of the TMP401 is active, the devices acknowledge the SMBus alert command and respond by returning its slave address on the SDA line. The eighth bit (LSB) of the slave address byte indicates whether the temperature exceeding one of the temperature high limit settings or falling below one of the temperature low limit settings caused the alert condition. This bit is high if the temperature is greater than or equal to one of the temperature high limit settings; this bit is low if the temperature is less than one of the temperature low limit settings. See Figure 15 for details of this sequence. If multiple devices on the bus respond to the SMBus alert command, arbitration during the slave address portion of the SMBus alert command determines which device clears its alert status. If the TMP401 wins the arbitration, its ALERT pin becomes inactive at the completion of the SMBus alert command. If the TMP401 loses the arbitration, the ALERT pin remains active.
7.4.2 THERM (Pin 4) and ALERT/THERM2 (Pin 6)
The TMP401 has two pins dedicated to alarm functions, the THERM and ALERT/THERM2 pins. Both pins are open-drain outputs that each require a pull-up resistor to V+. These pins can be wire-ORed together with other alarm pins for system monitoring of multiple sensors. The THERM pin provides a thermal interrupt that cannot be software disabled. The ALERT pin is intended for use as an earlier warning interrupt, and can be software disabled, or masked. The ALERT/THERM2 pin can also be configured for use as THERM2, a second THERM pin (configuration register, AL/TH bit = 1). The default setting configures pin 6 to function as ALERT (AL/TH = 0). The THERM pin asserts low when either the measured local or remote temperature is outside of the temperature range programmed in the corresponding local and remote THERM limit register. The THERM temperature limit range can be programmed with a wider range than that of the limit registers, which allows ALERT to provide an earlier warning than THERM. The THERM alarm resets automatically when the measured temperature returns to within the THERM temperature limit range minus the hysteresis value stored in the THERM hysteresis register. The allowable values of hysteresis are listed in Table 8. The default hysteresis is 10°C. When the ALERT/THERM2 pin is configured as a second thermal alarm (configuration register, bit 7 = 0, bit 5 = 1), the pin functions the same as THERM, but uses the temperatures stored in the local and remote temperature high and low limit registers to set its comparison range. When ALERT/THERM2 (pin 6) is configured as ALERT (configuration register, bit 7 = 0, bit 5 = 0), the pin asserts low when either the measured local or remote temperature violates the range limit set by the corresponding local and remote temperature high and low limit registers. This alert function can be configured to assert only if the range is violated a specified number of consecutive times (1, 2, 3, or 4). The consecutive violation limit is set in the consecutive alert register. False alerts that occur as a result of environmental noise can be prevented by requiring consecutive faults. ALERT also asserts low if the remote temperature sensor is open- circuit. When the MASK function is enabled (configuration register, bit 7 = 1), ALERT is disabled (that is, masked). ALERT resets when the master reads the device address, as long as the condition that caused the alert no longer persists, and the status register is reset.
7.4.3 Sensor Fault
The TMP401 senses a fault at the D+ input resulting from incorrect diode connection or an open circuit. The detection circuitry consists of a voltage comparator that trips when the voltage at D+ exceeds (V+) – 0.6 V (typical). The comparator output is continuously checked during a conversion. If a fault is detected, the last valid measured temperature is used for the temperature measurement result, the OPEN bit (status register, bit 2) is set high, and (if the alert function is enabled) ALERT asserts low. When not using the remote sensor with the TMP401, the D+ and D– inputs must be connected together to prevent meaningless fault warnings. Copyright © 2006–2014, Texas Instruments Incorporated Submit Documentation Feedback 15 Product Folder Links: TMP401
SBOS371B – AUGUST 2006– REVISED OCTOBER 2014 www.ti.com Device Functional Modes (continued)
7.4.4 High-Speed Mode
In order for the two-wire bus to operate at frequencies above 400 kHz, the master device must issue a high- speed mode (Hs-mode) master code (0000 1xxxb) as the first byte after a start condition to switch the bus to high-speed operation. The TMP401 does not acknowledge this byte, but switches the input filters on SDA and SCL and the output filter on SDA to operate in Hs-mode, allowing transfers at up to 2.5 MHz. After the Hs-mode master code is issued, the master transmits a two-wire slave address to initiate a data transfer operation. The bus continues to operate in Hs-mode until a stop condition occurs on the bus. Upon receiving the stop condition, the TMP401 switches the input and output filter back to fast-mode operation.
7.4.5 Shutdown Mode (SD)
The TMP401 shutdown mode (SD) allows the user to save maximum power by shutting down all device circuitry other than the serial interface, thus reducing current consumption to typically less than 3 μA; see Figure 10 (Shutdown Quiescent Current vs Supply Voltage). Shutdown mode is enabled when the SD bit of the configuration register is high; the device shuts down when the current conversion is completed. When SD is low, the device maintains a continuous conversion state.
7.4.6 One-Shot Conversion
When the TMP401 is in shutdown mode (SD = 1 in the configuration register), a single conversion on both channels is started by writing any value to the one-shot start register, pointer address 0Fh. This write operation starts one conversion; the TMP401 returns to shutdown mode when that conversion completes. The value of the data sent in the write command is irrelevant and is not stored by the TMP401. When the TMP401 is set to shutdown mode, an initial 200 μs is required before a one-shot command can be given. This wait time only applies to the 200 μs immediately following shutdown. One-shot commands can be issued without delay thereafter.
7.4.7 General-Call Reset
The TMP401 supports reset via the two-wire general-call address 00h (0000 0000b). The TMP401 acknowledges the general-call address and responds to the second byte. If the second byte is 06h (0000 0110b), the TMP401 executes a software reset. This software reset restores the power-on reset state to all TMP401 registers, aborts any conversion in progress, and clears the ALERT and THERM pins. The TMP401 takes no action in response to other values in the second byte.
16 Submit Documentation Feedback Copyright © 2006–2014, Texas Instruments Incorporated
Product Folder Links: TMP401
www.ti.com SBOS371B –AUGUST 2006– REVISED OCTOBER 2014
7.5 Programming
7.5.1 Bus Overview
The TMP401 is SMBus interface-compatible. In SMBus protocol, the device that initiates the transfer is called a master, and the devices controlled by the master are slaves. The bus must be controlled by a master device that generates the serial clock (SCL), controls the bus access, and generates the start and stop conditions. To address a specific device, a start condition is initiated. A start condition is indicated by pulling the data line (SDA) from a high to low logic level while SCL is high. All slaves on the bus shift in the slave address byte, with the last bit indicating whether a read or write operation is intended. During the ninth clock pulse, the slave being addressed responds to the master by generating an acknowledge and pulling SDA low. Data transfer is then initiated and sent over eight clock pulses followed by an acknowledge bit. During data transfer SDA must remain stable while SCL is high, because any change in SDA while SCL is high is interpreted as a control signal. When all data are transferred, the master generates a stop condition. A stop condition is indicated by pulling SDA from low to high while SCL is high.
7.5.2 Serial Interface
The TMP401 operates only as a slave device on either the two-wire bus or the SMBus. Connections to either bus are made via the open-drain I/O lines, SDA and SCL. The SDA and SCL pins feature integrated spike- suppression filters and Schmitt triggers to minimize the effects of input spikes and bus noise. The TMP401 supports the transmission protocol for fast (1 kHz to 400 kHz) and high-speed (1 kHz to 2.5 MHz) modes. All data bytes are transmitted MSB first.
7.5.3 Serial Bus Address
To communicate with the TMP401, the master must first address slave devices via a slave address byte. The slave address byte consists of seven address bits, and a direction bit indicating the intent of executing a read or write operation. The address of the TMP401 is 4Ch (1001100b).
7.5.4 Read and Write Operations
Accessing a particular register on the TMP401 is accomplished by writing the appropriate value to the pointer register. The value for the pointer register is the first byte transferred after the slave address byte with the R/W bit low. Every write operation to the TMP401 requires a value for the pointer register (see Figure 13). When reading from the TMP401, the last value stored in the pointer register by a write operation is used to determine which register is read by a read operation. To change the register pointer for a read operation, a new value must be written to the pointer register. This transaction is accomplished by issuing a slave address byte with the R/W bit low, followed by the pointer register byte. No additional data are required. The master can then generate a start condition and send the slave address byte with the R/W bit high to initiate the read command. See Figure 14 for details of this sequence. If repeated reads from the same register are desired, continually sending the pointer register bytes is not necessary, because the TMP401 retains the pointer register value until changed by the next write operation. Note that register bytes are sent MSB first, followed by the LSB.
7.5.5 Timeout Function
When bit 7 of the consecutive alert register is set high, the TMP401 timeout function is enabled. The TMP401 resets the serial interface if either SCL or SDA are held low for 30 ms (typ) between a start and stop condition. If the TMP401 is holding the bus low, the device releases the bus and waits for a start condition. To avoid activating the timeout function, a communication speed of at least 1 kHz must be maintained for the SCL operating frequency. The default state of the timeout function is enabled (bit 7 = high). Copyright © 2006–2014, Texas Instruments Incorporated Submit Documentation Feedback 17 Product Folder Links: TMP401
7.5.6 Timing Diagrams
Bus Idle: Both SDA and SCL lines remain high. defines a start condition. Each data transfer is initiated with a start condition. defines a stop condition. Each data transfer terminates with a repeated start or stop condition. is determined by the master device. The receiver acknowledges the transfer of data. a not-acknowledge on the last byte transmitted by the slave. Figure 12. Two-Wire Timing Diagram Figure 13. Two-Wire Timing Diagram for Write Word Format
18 Submit Documentation Feedback Copyright © 2006–2014, Texas Instruments Incorporated
7.6 Register Maps
temperature comparator limits, and status information. These registers are described in Figure 16 and Table 3. Figure 16. Internal Register Structure Table 3. Register Map
00 NA 00 LT11 LT10 LT9 LT8 LT7 LT6 LT5 LT4 Local temperature (high byte)
01 NA 00 RT11 RT10 RT9 RT8 RT7 RT6 RT5 RT4 Remote temperature (high byte)
02 NA XX BUSY LHIGH LLOW RHIGH RLOW OPEN RTHRM LTHRM Status register
10 NA 00 RT3 RT2 RT1 RT0 0 0 0 0 Remote temperature (low byte)
15 NA 00 LT3 LT2 LT1 LT0 0 0 0 0 Local temperature (low byte)
20 Submit Documentation Feedback Copyright © 2006–2014, Texas Instruments Incorporated
www.ti.com SBOS371B –AUGUST 2006– REVISED OCTOBER 2014
7.6.1 Pointer Register
Figure 16 illustrates the internal register structure of the TMP401. The 8-bit pointer register is used to address a given data register. The pointer register identifies which of the data registers respond to a read or write command on the two-wire bus. This register is set with every write command. A write command must be issued to set the proper value in the pointer register before executing a read command. Table 3 describes the pointer address of the registers available in the TMP401. The power-on reset (POR) value of the pointer register is 00h (0000 0000b).
7.6.2 Temperature Registers
The TMP401 has four 8-bit registers that hold temperature measurement results. Both the local channel and the remote channel have a high byte register that contains the most significant bits (MSBs) of the temperature ADC result and a low byte register that contains the least significant bits (LSBs) of the temperature ADC result. The local channel high byte address is 00h; the local channel low byte address is 15h. The remote channel high byte is at address 01h; the remote channel low byte address is 10h. These registers are read-only and are updated by the ADC each time a temperature measurement is completed. The TMP401 contains circuitry to assure that a low byte register read command returns data from the same ADC conversion as the immediately preceding high byte read command. This assurance remains valid only until another register is read. For proper operation, the high byte of a temperature register must be read first. Read the low byte register in the next read command. The low byte register may be left unread if the LSBs are not needed. Alternatively, the temperature registers can be read as a 16-bit register by using a single two-byte read command from address 00h for the local channel result or from address 01h for the remote channel result. The high byte is output first, followed by the low byte. Both bytes of this read operation are from the same ADC conversion. The power-on reset value of both temperature registers is 00h.
7.6.3 Limit Registers
The TMP401 has 11 registers for setting comparator limits for both the local and remote measurement channels. These registers have read and write capability. The high and low limit registers for both channels span two registers, as do the temperature registers. The local temperature high limit is set by writing the high byte to pointer address 0Bh and writing the low byte to pointer address 16h, or by using a single two-byte write command (high byte first) to pointer address 0Bh. The local temperature high limit is obtained by reading the high byte from pointer address 05h and the low byte from pointer address 16h, or by using a two-byte read command from pointer address 05h. The power-on reset value of the local temperature high limit is 55h, standard, and 00h, extended (+85°C in standard temperature mode; +21°C in extended temperature mode). Similarly, the local temperature low limit is set by writing the high byte to pointer address 0Ch and writing the low byte to pointer address 17h, or by using a single two-byte write command to pointer address 0Ch. The local temperature low limit is read by reading the high byte from pointer address 06h and the low byte from pointer address 17h, or by using a two-byte read from pointer address 06h. The power-on reset value of the local temperature low limit register is 00h, standard and extended (0°C in standard temperature mode; –64°C in extended mode). The remote temperature high limit is set by writing the high byte to pointer address 0Dh and writing the low byte to pointer address 13h, or by using a two-byte write command to pointer address 0Dh. The remote temperature high limit is obtained by reading the high byte from pointer address 07h and the low byte from pointer address 13h, or by using a two-byte read command from pointer address 07h. The power-on reset value of the remote temperature high limit register is 55h, standard, and 00h, extended (+85°C in standard temperature mode; +21°C in extended temperature mode). The remote temperature low limit is set by writing the high byte to pointer address 0Eh and writing the low byte to pointer address 14h, or by using a two-byte write to pointer address 0Eh. The remote temperature low limit is read by reading the high byte from pointer address 08h and the low byte from pointer address 14h, or by using a two-byte read from pointer address 08h. The power-on reset value of the remote temperature low limit register is 00h, standard and extended (0°C in standard temperature mode; –64°C in extended mode). Copyright © 2006–2014, Texas Instruments Incorporated Submit Documentation Feedback 21 Product Folder Links: TMP401
(always positive). The power-on reset value of this register is 0Ah (+10°C). format. These values must be reprogrammed in the appropriate binary or extended binary format.
7.6.4 Status Register
register bits. The status register is read-only and is read by reading from pointer address 02h. Figure 17. Status Register (Read = 02h, Write = NA, POR = XXh) conversion. It will be high whenever the TMP401 is converting a temperature reading. The BUSY bit reads as ‘1’if the ADC is making a conversion. It reads as ‘0’if the ADC is not converting. The OPEN bit reads as ‘1’if the remote transistor is detected as open from the last read of the status register. The OPEN status is only detected when the ADC is attempting to convert a remote temperature. than the remote THERM limit less the value in the shared hysteresis register, as shown in Figure 18. local THERM limit less the value in the shared hysteresis register, as shown in Figure 18. Figure 18. SMBus Alert Timing Diagram bit is ‘0’, the LHIGH bit reads as ‘1’if the local high limit is exceeded from the last clearing of the status register. the value in the hysteresis register.
22 Submit Documentation Feedback Copyright © 2006–2014, Texas Instruments Incorporated
www.ti.com SBOS371B –AUGUST 2006– REVISED OCTOBER 2014 The RHIGH bit reads as ‘1’if the remote temperature exceeds the remote high limit and remains greater than the remote high limit less the value in the hysteresis register. The LLOW and RLOW bits are not affected by the AL/TH bit. The LLOW bit reads as ‘1’if the local low limit is exceeded from the last clearing of the status register. The RLOW bit reads as ‘1’ if the remote low limit is exceeded from the last clearing of the status register. The values of the LLOW, RLOW, and OPEN (as well as LHIGH and RHIGH when AL/TH is ‘0’) are latched and read as ‘1’until the status register is read or a device reset occurs. These bits are cleared by reading the status register, provided that the condition causing the flag to be set no longer exists. The values of BUSY, LTHRM, and RTHRM (as well as LHIGH and RHIGH when AL/TH is ‘1’) are not latched and are not cleared by reading the status register. These bits always indicate the current state, and are updated appropriately at the end of the corresponding ADC conversion. Clearing the status register bits does not clear the state of the ALERT pin; an SMBus alert response address command must be used to clear the ALERT pin. The TMP401 NORs LHIGH, LLOW, RHIGH, RLOW, and OPEN, so a status change for any of these flags from ‘0’to ‘1’automatically causes the ALERT pin to go low (only applies when the ALERT/THERM2 pin is configured for ALERT mode).
7.6.5 Configuration Register
The configuration register sets the temperature range, controls shutdown mode, and determines how the ALERT/THERM2 pin functions. The configuration register is set by writing to pointer address 09h and read by reading from pointer address 03h. The MASK bit (bit 7) enables or disables the ALERT pin output if AL/TH = 0. If AL/TH = 1, then the MASK bit has no effect. If MASK is set to ‘0’, the ALERT pin goes low when one of the temperature measurement channels exceeds its high or low limits for the chosen number of consecutive conversions. If the MASK bit is set to ‘1’, the TMP401 retains the ALERT pin status, but the ALERT pin does not go low. The shutdown (SD) bit (bit 6) enables or disables the temperature measurement circuitry. If SD = 0, the TMP401 converts continuously at the rate set in the conversion rate register. When SD is set to ‘1’, the TMP401 immediately stops converting and enters a shutdown mode. When SD is set to ‘0’again, the TMP401 resumes continuous conversions. A single conversion can be started when SD = 1 by writing to the one-shot register. The AL/TH bit (bit 5) controls whether the ALERT pin functions in ALERT mode or THERM2 mode. If AL/TH = 0, the ALERT pin operates as an interrupt pin. In this mode, the ALERT pin goes low after the set number of consecutive out-of-limit temperature measurements occur. If AL/TH = 1, the ALERT/THERM2 pin implements a THERM function (THERM2). In this mode, THERM2 functions similar to the THERM pin except that the local high limit and remote high limit registers are used for the thresholds. THERM2 goes low when either RHIGH or LHIGH is set. The temperature range is set by configuring bit 2 of the configuration register. Setting this bit low configures the TMP401 for the standard measurement range (0°C to +127°C); temperature conversions are stored in standard binary format. Setting bit 2 high configures the TMP401 for the extended measurement range (–55°C to +150°C); temperature conversions are stored in extended binary format (see Table 1). Copyright © 2006–2014, Texas Instruments Incorporated Submit Documentation Feedback 23 Product Folder Links: TMP401
value for this register is 00h. Figure 19 and Table 4 summarize the bits of the configuration register. Figure 19. Configuration Register (Read = 02h, Write = NA, POR = 00h) Table 4. Configuration Register Field Descriptions
7.6.6 Resolution Register
temperature measurement channel. Remote temperature measurement channel resolution is not affected. Table 5 show the resolution bits for the resolution register. must always be set to ‘0’. The power-on reset value of this register is 1Ch. Figure 20. Resolution Register (Read/Write = 1Ah, POR = 1Ch) Table 5. Resolution Register: Local Channel Programmable Resolution
24 Submit Documentation Feedback Copyright © 2006–2014, Texas Instruments Incorporated
7.6.7 Conversion Rate Register
register bits and Table 6 shows the conversion rate options and corresponding current consumption. Figure 21. Conversion Rate (Read = 04h, Write = 0Ah, POR = 08h) Table 6. Conversion Rate Register
7.6.8 Identification Registers
TMP401 returns 55h for the manufacturer code and 11h for the device ID. These registers are read-only.
7.6.9 Consecutive Alert Register
lists the consecutive alert register bits. The consecutive alert bits are shown in Table 7. Figure 22. Consecutive Alert Register (Read/Write = 22h, POR = 81h) Table 7. Consecutive Alert Register function. See the Timeout Function section for a description of this feature.
26 Submit Documentation Feedback Copyright © 2006–2014, Texas Instruments Incorporated
7.6.10 THERM Hysteresis Register
otherwise, the respective temperature comparator does not trip on the measured temperature falling edges. hysteresis value is 10°C, whether the device is operating in the standard or extended mode setting. Figure 23. Therm Hysteresis (Read/Write = 21h, POR = 0Ah) Table 8. Allowable THERM Hysteresis Values
8 Application and Implementation
validate and test their design implementation to confirm system functionality.
8.1 Application Information
diodes that are an integral part of microcontrollers, microprocessors, or FPGAs. range (–40°C to +150°C), diode fault detection, and temperature alert functions.
8.2 Typical Application
cancellation. A 2N3906 PNP is used in this configuration. (2) In most applications, RS is < 1.5 kΩ. (3) In most applications, CDIFF is < 1000 pF. Figure 24. Remote Noise Filtering
8.2.1 Design Requirements
through the pull-up resistors, but not to exceed (V+) + 0.5 V.
28 Submit Documentation Feedback Copyright © 2006–2014, Texas Instruments Incorporated
8.2.2 Detailed Design Procedure
helpful in achieving accurate surface temperature measurement.
8.2.2.1 Filtering
input. Exact values are application-specific.
8.2.3 Application Curves
8.2.3.1 Series Resistance Cancellation
Figure 25. Remote Temperature Error vs Series Resistance Figure 26. Remote Temperature Error vs Series Resistance
8.2.3.2 Differential Input Capacitance
The TMP401 tolerates differential input capacitance of up to 1000 pF with minimal change in temperature error. The effect of capacitance on sensed remote temperature error is illustrated in Figure 27. Figure 27. Remote Temperature Error vs Differential Capacitance
9 Power-Supply Recommendations
power supply affect on the accuracy of the device.
30 Submit Documentation Feedback Copyright © 2006–2014, Texas Instruments Incorporated
www.ti.com SBOS371B –AUGUST 2006– REVISED OCTOBER 2014
10 Layout
10.1 Layout Guidelines
10.1.1 Measurement Accuracy and Thermal Considerations
The temperature measurement accuracy of the TMP401 depends on the remote and local temperature sensor being at the same temperature as the system point being monitored. Clearly, if the temperature sensor is not in good thermal contact with the part of the system being monitored, then there is a delay in the response of the sensor to a temperature change in the system. For remote temperature sensing applications using a substrate transistor (or a small, SOT23 transistor) placed close to the device being monitored, this delay is usually not a concern. The local temperature sensor inside the TMP401 monitors the ambient air around the device. The thermal time constant for the TMP401 is approximately two seconds. This constant implies that if the ambient air changes quickly by 100°C, the TMP401 takes approximately 10 seconds (that is, five thermal time constants) to settle to within 1°C of the final value. In most applications, the TMP401 package is in electrical and therefore thermal contact with the PCB, as well as subjected to forced airflow. The accuracy of the measured temperature directly depends on how accurately the PCB and forced airflow temperatures represent the temperature that the TMP401 is measuring. Additionally, the internal power dissipation of the TMP401 can cause the temperature to rise above the ambient or PCB temperature. The internal power dissipated as a result of exciting the remote temperature sensor is negligible because of the small currents used. For a 5.5-V supply and maximum conversion rate of eight conversions per second, the TMP401 dissipates 1.82 mW (PDIQ = 5.5 V × 330 µA). If both the ALERT/THERM2 and THERM pins are each sinking 1 mA, an additional power of 0.8 mW is dissipated (PDOUT = of 78.8°C/W, causes the junction temperature to rise approximately 0.206°C above the ambient.
10.1.2 Layout Considerations
Remote temperature sensing on the TMP401 measures very small voltages using very small currents; therefore, noise at the IC inputs must be minimized. Most applications using the TMP401 have high digital content, with several clocks and logic level transitions creating a noisy environment. Layout must adhere to the following guidelines: 1. Place the TMP401 as close to the remote junction sensor as possible. 2. Route the D+ and D– traces next to each other and shield them from adjacent signals through the use of ground guard traces; see Figure 28. If a multilayer PCB is used, bury these traces between ground or VDD planes to shield them from extrinsic noise sources. 5-mil PCB traces are recommended. 3. Minimize additional thermocouple junctions caused by copper-to-solder connections. If these junctions are used, make the same number and approximate locations of copper-to-solder connections in both the D+ and D– connections to cancel any thermocouple effects; see Figure 30. 4. Use a 0.1-μF local bypass capacitor directly between the V+ and GND of the TMP401; see Figure 29. Minimize filter capacitance between D+ and D– to 1000 pF or less for optimum measurement performance. This capacitance includes any cable capacitance between the remote temperature sensor and the TMP401. 5. If the connection between the remote temperature sensor and the TMP401 is between 8 inches and 12 feet, use a twisted-wire pair connection. Beyond this distance (up to 100 ft), use a twisted, shielded pair with the shield grounded as close to the TMP401 as possible. Leave the remote sensor connection end of the shield wire open to avoid ground loops and 60-Hz pickup. Copyright © 2006–2014, Texas Instruments Incorporated Submit Documentation Feedback 31 Product Folder Links: TMP401
Figure 28. Example Signal Traces
10.2 Layout Examples
Figure 29. Suggested Bypass Capacitor Placement
32 Submit Documentation Feedback Copyright © 2006–2014, Texas Instruments Incorporated
NOTE: The copper to solder connections must be symmetrical between D+ and D–. Figure 30. Example Layout
SBOS371B – AUGUST 2006– REVISED OCTOBER 2014 www.ti.com
11 Device and Documentation Support
11.1 Trademarks
All trademarks are the property of their respective owners.
11.2 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.3 Glossary
SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
34 Submit Documentation Feedback Copyright © 2006–2014, Texas Instruments Incorporated
Product Folder Links: TMP401
www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TMP401AIDGKR Active Production VSSOP (DGK) | 8 2500 | LARGE T&R Yes NIPDAU | NIPDAUAG Level-2-260C-1 YEAR -40 to 125 BRB TMP401AIDGKR.A Active Production VSSOP (DGK) | 8 2500 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 125 BRB TMP401AIDGKT Obsolete Production VSSOP (DGK) | 8 - - Call TI Call TI -40 to 125 BRB (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 20-Feb-2024 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 20-Feb-2024 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TMP401AIDGKR VSSOP DGK 8 2500 366.0 364.0 50.0 Pack Materials-Page 2
www.ti.com PACKAGE OUTLINE C 6X 0.65 1.95 8X 0.38 0.25 5.05
4.75 TYP
0.15 0.05 0.25 GAGE PLANE 0 -8
1.1 MAX
0.23 0.13 B 3.1 2.9 NOTE 4 A 3.1 2.9 NOTE 3 0.7 0.4 VSSOP - 1.1 mm max heightDGK0008A SMALL OUTLINE PACKAGE 4214862/A 04/2023
0.13 C A B
0.1 C NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-187. PowerPAD is a trademark of Texas Instruments. A 20 DETAIL A TYPICAL SCALE 4.000
www.ti.com EXAMPLE BOARD LAYOUT
0.05 MAX
0.05 MIN
8X (1.4) 8X (0.45) 6X (0.65) (4.4) (R0.05) TYP VSSOP - 1.1 mm max heightDGK0008A SMALL OUTLINE PACKAGE 4214862/A 04/2023 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. 9. Size of metal pad may vary due to creepage requirement. TM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 15X SYMM SYMM SEE DETAILS 15.000 METALSOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METALEXPOSED METAL SOLDER MASK DETAILS NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED
www.ti.com EXAMPLE STENCIL DESIGN 8X (1.4) 8X (0.45) 6X (0.65) (4.4) (R0.05) TYP VSSOP - 1.1 mm max heightDGK0008A SMALL OUTLINE PACKAGE 4214862/A 04/2023 NOTES: (continued) 11. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 12. Board assembly site may have different recommendations for stencil design. TM SOLDER PASTE EXAMPLE SCALE: 15X SYMM SYMM
IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, regulatory or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2025, Texas Instruments Incorporated