TMP103 TI | Alldatasheet
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www.ti.com SBOS545A –FEBRUARY 2011–REVISED MARCH 2011 Low-Power,DigitalTemperatureSensor withTwo-WireInterfaceinWCSP Check forSamples: TMP103 1FEATURES DESCRIPTION The TMP103 isa digitaloutputtemperaturesensorin 234• MultipleDevice Access (MDA): a four-ballwafer chip-scalepackage (WCSP). The– GlobalRead/WriteOperations TMP103 is capable of readingtemperaturesto a
- I2C ™-/SMBus ™-CompatibleInterface resolutionof1°C.
- Resolution:8 Bits The TMP103 featuresa two-wireinterfacethatis
- Accuracy:±1°C Typ (–10°C to+100°C) compatiblewithboth I2C and SMBus interfaces.In addition,the interfacesupports multipledevice• Low QuiescentCurrent: access (MDA) commands thatallowthe master to– 3μA ActiveIQ at0.25Hz communicate with multipledevices on the bus – 1μA Shutdown simultaneously,eliminatingthe need to send individualcommands toeach TMP103 on thebus.• Supply Range: 1.4Vto3.6V
- DigitalOutput Up toeightTMP103s can be tiedtogetherinparallel and easilyread by the host. The TMP103 is• Package: 4-BallWCSP (DSBGA) especially ideal for space-constrained, power-sensitive applications with multipleAPPLICATIONS temperature measurement zones that must be
- Handsets monitored.
- Notebooks The TMP103 is specifiedfor operationover a temperaturerangeof–40°C to+125°C. TYPICAL APPLICATION Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsofTexas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2SMBus isa trademarkofIntel. 3I2C isa trademarkofNXP Semiconductors. 4Allothertrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2011,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.
SBOS545A –FEBRUARY 2011–REVISED MARCH 2011 www.ti.com This integratedcircuitcan be damaged by ESD. Texas Instrumentsrecommends thatallintegratedcircuitsbe handled with appropriateprecautions.Failuretoobserveproperhandlingand installationprocedurescan cause damage. ESD damage can rangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmay be more susceptibletodamage because verysmallparametricchanges couldcause thedevicenottomeet itspublishedspecifications. PACKAGE/ORDERING INFORMATION (1) PACKAGE PACKAGE ORDERING PRODUCT ADDRESS PACKAGE-LEAD DESIGNATOR MARKING NUMBER TMP103AYFFR TMP103A 1110000 DSBGA-4 YFF TA TMP103AYFFT TMP103BYFFR TMP103B 1110001 DSBGA-4 YFF TB TMP103BYFFT TMP103CYFFR TMP103C 1110010 DSBGA-4 YFF TC TMP103CYFFT TMP103DYFFR TMP103D 1110011 DSBGA-4 YFF TD TMP103DYFFT TMP103EYFFR TMP103E 1110100 DSBGA-4 YFF TE TMP103EYFFT TMP103FYFFR TMP103F 1110101 DSBGA-4 YFF TF TMP103FYFFT TMP103GYFFR TMP103G 1110110 DSBGA-4 YFF TG TMP103GYFFT TMP103HYFFR TMP103H 1110111 DSBGA-4 YFF TH TMP103HYFFT (1) Forthemost currentpackage and orderinginformation,see thePackage OptionAddendum attheend ofthisdocument,orvisitthe deviceprodictfolderatwww.ti.com. ABSOLUTE MAXIMUM RATINGS (1) TMP103 UNIT SupplyVoltage 3.6 V InputVoltage(2) –0.3to(V+)+ 0.3 V OperatingTemperature –55 to+150 °C StorageTemperature –60 to+150 °C JunctionTemperature +150 °C Human Body Model (HBM) 2000 V ESD Rating Charged DeviceModel (CDM) 1000 V Machine Model (MM) 200 V (1) Stressesabove theseratingsmay cause permanentdamage. Exposuretoabsolutemaximum conditionsforextendedperiodsmay degradedevicereliability.These arestressratingsonly,and functionaloperationofthedeviceattheseorany otherconditionsbeyond thosespecifiedisnotsupported. (2) InputvoltageratingappliestoallTMP103 inputvoltages.
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www.ti.com SBOS545A –FEBRUARY 2011–REVISED MARCH 2011 THERMAL INFORMATION TMP103 THERMAL METRIC (1) YFF UNITS θJA Junction-to-ambientthermalresistance 160 θJCtop Junction-to-case(top)thermalresistance 75 θJB Junction-to-boardthermalresistance 76 °C/W ψJT Junction-to-topcharacterizationparameter 3 ψJB Junction-to-boardcharacterizationparameter 74 θJCbot Junction-to-case(bottom)thermalresistance N/A (1) Formore informationabouttraditionaland new thermalmetrics,see theIC Package ThermalMetricsapplicationreport,SPRA953 .
ELECTRICAL CHARACTERISTICS
AtTA = +25°C and V+ = +1.4V to+3.6V,unlessotherwisenoted. TMP103 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TEMPERATURE INPUT Range –40 +125 °C Accuracy(TemperatureError) vs Supply ±0.2 ±0.5 °C/V Resolution 1.0 °C DIGITAL INPUT/OUTPUT VIH 0.7(V+) V+ V InputLogicLevels VIL –0.5 0.3(V+) V InputCurrent IIN 0 < VIN < (V+)+ 0.3V 1 μA V+ > 2V,IOL = 2mA 0 0.4 V OutputLogicLevels VOL SDA V+ < 2V,IOL = 2mA 0 0.2(V+) V Resolution 8 Bit ConversionTime 26 35 ms CR1 = 0,CR0 = 0 (default) 0.25 Conv/s CR1 = 0,CR0 = 1 1 Conv/s ConversionModes CR1 = 1,CR0 = 0 4 Conv/s CR1 = 1,CR0 = 1 8 Conv/s TimeoutTime 30 40 ms POWER SUPPLY OperatingSupplyRange +1.4 +3.6 V SerialBus Inactive,CR1 = 0,CR0 = 0 (default),V+ = 1.8V 1.5 3 μA QuiescentCurrent IQ SerialBus Active,SCL Frequency= 400kHz 15 μA SerialBus Active,SCL Frequency= 3.4MHz 85 μA SerialBus Inactive,V+ = 1.8V 0.5 1 μA Shutdown Current ISD SerialBus Active,SCL Frequency= 400kHz 10 μA SerialBus Active,SCL Frequency= 3.4MHz 80 μA TEMPERATURE SpecifiedRange –40 +125 °C OperatingRange –55 +150 °C Copyright© 2011,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3 ProductFolderLink(s):TMP103
SBOS545A –FEBRUARY 2011–REVISED MARCH 2011 www.ti.com PIN CONFIGURATION YFF PACKAGE WCSP-4 (DSBGA-4) (TOP VIEW) PIN DESCRIPTIONS PIN NO. NAME DESCRIPTION A1 V+ Supplyvoltage A2 GND Ground B1 SDA Input/outputdatapin B2 SCL Inputclockpin
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T emperature□( C)/c176 /c45 60 /c45 40 0 40 140 160 I ( /c109A) SD 3.6V□Supply 1.4V□Supply /c45 20 20 60 80 100 120 T emperature□( C)/c176 /c45 60 /c45 20 40 60 160 IQ (/c109A) /c45 40 0 20 80 100 120 140 3.6V□Supply 1.8V□Supply 1.4V□Supply T emperature□( C)/c176 /c45 60 /c45 20 40 60 140 160 Conversion□Time□(ms) 3.6V□Supply 1.4V□Supply /c45 40 20 0 80 100 120 100 Bus□Frequency□(Hz) 1k 10k 100k 1M 10M I ( A) /c109 Q /c45 /c176 55 C+25 C/c176 +125 C/c176 2.0 1.5 1.0 0.5 /c45 0.5 /c45 1.0 /c45 1.5 /c45 2.0 T emperature□( C)/c176 /c45 60 /c45 40 40 60 140 160 T emperature□Error□( C) /c176 /c45 20 200 80 100 120 TMP103 www.ti.com SBOS545A –FEBRUARY 2011–REVISED MARCH 2011 TYPICAL CHARACTERISTICS AtTA = +25°C and V+ = 1.8V,unlessotherwisenoted. QUIESCENT CURRENT vs TEMPERATURE (0.25Conversions per Second) SHUTDOWN CURRENT vs TEMPERATURE Figure1. Figure2. QUIESCENT CURRENT vs BUS FREQUENCY CONVERSION TIME vs TEMPERATURE (Temperatureat3.3VSupply) Figure3. Figure4. TEMPERATURE ERROR vs TEMPERATURE Figure5. Copyright© 2011,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5 ProductFolderLink(s):TMP103
0.01/c109F GND 1SCL 6SDA T o T wo-Wire Controller TMP103 SBOS545A –FEBRUARY 2011–REVISED MARCH 2011 www.ti.com
APPLICATION INFORMATION
GENERAL DESCRIPTION To maintainaccuracyinapplicationsthatrequireair orsurfacetemperaturemeasurement,careshouldbeThe TMP103 isa digitaloutputtemperaturesensorin taken to isolatethe package from ambient aira wafer chip-scalepackage (WCSP) thatisoptimal temperature.forthermalmanagement and thermalprofiling.The TMP103 includes a two-wire interfacethat is POINTER REGISTERcompatiblewithboth I2C and SMBus interfaces.In addition,theTMP103 has thecapabilityofexecuting Figure7 shows the internalregisterstructureof the multipledeviceaccess (MDA) commands thatallow TMP103. The 8-bitPointerRegisterof the deviceis multipleTMP103s to respond to a singleglobalbus used to address a givendata register.The Pointer command. MDA commands reduce communication Registeruses the two LSBs to identifywhich of the time and power in a bus that containsmultiple data registersshould respond to a read or write TMP103 devices.The TMP103 is specifiedover a command. Table 1 identifiesthe bitsof the Pointer temperaturerangeof–40ºC to+125 ºC. Registerbyte.Duringa writecommand, P2 through as a locationor temperaturezone designator.The TMP103 responds to standard I2C/SMBus slave protocolsthatallowtheinternalregisterstobe written toor read from on an individualbasis.The TMP103 alsorespondsto MDA commands thatallowallthe deviceson the bus to be writtento or read from, withouthaving to send the individualaddress and commands toeach device. Pull-upresistorsare requiredon SCL and SDA. A 0.01μF bypass capacitoris also recommended, as shown inFigure6. Figure7. InternalRegisterStructure Table1.PointerRegisterByte P7 P6 P5 P4 P3 P2 P1 P0 0 0 0 0 0 0 RegisterBits Table2.PointerAddressesNOTE: SCL and SDA pinsrequirepull-upresistors. P1 P0 REGISTERFigure6. TypicalConnections 0 0 TemperatureRegister(Read Only) 0 1 ConfigurationRegister(Read/Write)The temperaturesensor in the TMP103 isthe chip itself.Thermalpathsrunthroughthepackage bumps 1 0 TLOW Register(Read/Write) as wellas thepackage.The lowerthermalresistance 1 1 THIGH Register(Read/Write) of metal causes the bumps to providethe primary thermalpath.
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www.ti.com SBOS545A –FEBRUARY 2011–REVISED MARCH 2011 Table3.Temperature RegisterTEMPERATURE REGISTER D7 D6 D5 D4 D3 D2 D1 D0The Temperature Register of the TMP103 is T7 T6 T5 T4 T3 T2 T1 T0configuredas an eight-bit,read-onlyregisterthat storesthe outputof the most recentconversion.A Negativenumbers are representedin binarytwossinglebyte must be read to obtaindata,and is complement format.Followingpower-upor reset,thedescribedinTable3.The dataformatfortemperature Temperature Register reads 0°C untilthe firstissummarized inTable4.One LSB equals1°C. conversioniscomplete. Table4.8-BitTemperature Data Format(1) TEMPERATURE (°C) DIGITAL OUTPUT (BINARY) HEX 128 0111 1111 7F 127 0111 1111 7F 100 0110 0100 64 80 0101 0000 50 75 0100 1011 4B 50 0011 0010 32 25 0001 1001 19 0 0000 0000 00 –1 1111 1111 FF –25 1110 0111 E7 –55 1100 1001 C9 (1) The resolutionfortheADC is1°C/count,where countisequaltothedigitaloutputoftheADC. Forpositivetemperatures(forexample,+50°C): Twos complement isnot performedon positivenumbers. Therefore,simplyconvertthe number to binary code,left-justifiedformat.Denote a positivenumber withMSB = '0'. Example:(+50°C)/(1°C/count)= 50 = 32h = 0011 0010 Fornegativetemperatures(forexample,–25°C): Generatethetwos complement ofa negativenumber by complementingtheabsolutevaluebinarynumber and adding1.Denote a negativenumber withMSB = '1'. Example:(|–25°C|)/(1°C/count)= 25 = 19h = 0001 1001 Twos complement format:1110 0110 + 1 = 1110 0111 Copyright© 2011,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7 ProductFolderLink(s):TMP103
Startup Start□of Conversion Delay (1) 26ms 26ms Measured T emperature THIGH TLOW FH□Bit (Transparent□Mode) Read Read Time Read FL□Bit (Transparent□Mode) FH□Bit (Latch□Mode) FL□Bit (Latch□Mode) TMP103 SBOS545A –FEBRUARY 2011–REVISED MARCH 2011 www.ti.com CONFIGURATION REGISTER The latchbit(LC)intheconfigurationregisterisused CONVERSION RATETable5.Configurationand Power-Up/Reset Format The conversionratebits,CR1 and CR0 locatedinthe ConfigurationRegister,configurethe TMP103 forD7 D6 D5 D4 D3 D2 D1 D0 conversion rates of 8Hz, 4Hz, 1Hz, orID CR1 CR0 FH FL LC M1 M0 0.25Hz (default).The TMP103 has a typical 0 0 0 0 0 0 1 0 conversion time of 26ms. To achieve different conversionrates,the TMP103 performs a single conversionand then powers down and waitsfortheTEMPERATURE WATCHDOG FUNCTION appropriatedelay set by CR1 and CR0. Table 6The TMP103 containsa watchdog functionthat shows thesettingsforCR1 and CR0.monitorsdevicetemperatureand compares theresult tothevaluesstoredinthetemperaturelimitregisters Table6.Conversion Rate Settings(THIGH and TLOW ) inorderto determineifthe device CR1 CR0 CONVERSION RATEtemperature is within these set limits.If the temperatureof the TMP103 becomes greaterthan 0 0 0.25Hz(default) the valueinthe THIGH register,then the flag-highbit 0 1 1Hz (FH) inthe configurationregisterissetto '1'.Ifthe 1 0 4Hz temperaturefallsbelow value in the TLOW register, 1 1 8Hzthentheflag-lowbit(FL)issetto'1'.Ifbothflagbits remain '0',then the temperature is withinthe Afterpower-up or general-callreset,the TMP103temperaturewindow set by the temperaturelimit immediately startsa conversion,as shown inregisters,as shown inFigure8. Figure 9. The firstresultis availableafter26ms (typical).The active quiescent current during conversionis40μA (typicalat+27°C, V+ = 1.8V).The quiescentcurrentduringdelay is 1.0μA (typicalat +27°C, V+ = 1.8V). (1)Delayissetby CR1 and CR0. Figure9. Conversion Start SHUTDOWN MODE (M1 = '0',M0 = '0') Shutdown mode saves maximum power by shutting down all device circuitryother than the serial interface,reducingcurrentconsumptionto typically lessthan 0.5μA. Shutdown mode is enabled when Figure8. Temperature FlagFunctionalDiagram bitsM1 and M0 (intheConfigurationRegister)= '00'. The deviceshutsdown when thecurrentconversion iscompleted.
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www.ti.com SBOS545A –FEBRUARY 2011–REVISED MARCH 2011 Table7.THIGH RegisterONE-SHOT (M1 = '0',M0 = '1') D7 D6 D5 D4 D3 D2 D1 D0The TMP103 featuresa One-Shot Temperature H7 H6 H5 H4 H3 H2 H1 H0Measurement mode. When thedeviceisinShutdown mode, writinga '01'tobitsM1 and M0 startsa single temperatureconversion.Duringthe conversion,bits Table8.TLOW RegisterM1 and M0 read '01'.The device returnsto the D7 D6 D5 D4 D3 D2 D1 D0shutdown state at the completionof the single L7 L6 L5 L4 L3 L2 L1 L0conversion.Afterthe conversion,bitsM1 and M0 read '00'.This featureisusefulforreducingpower consumption in the TMP103 when continuous BUS OVERVIEWtemperaturemonitoringisnotrequired. To addressa specificdevice,a START conditionisCONTINUOUS CONVERSION MODE (M1 = '1') initiated,indicatedby pullingthedataline(SDA) from When theTMP103 isinContinuousConversionmode a hightolow logiclevelwhileSCL ishigh.Allslaves (M1 = '1'),a singleconversionisperformedata rate on the bus shiftin the slaveaddress byte on the determinedby theconversionratebits,CR1 and CR0 risingedge of the clock,withthe lastbitindicating (in the ConfigurationRegister).The TMP103 whethera readorwriteoperationisintended.During performsa singleconversionand thenpowers down the ninthclock pulse,the slave being addressed and waitsforthe appropriatedelaysetby CR1 and responds to the master by generating an CR0. See Table6 forCR1 and CR0 settings. Acknowledgeand pullingSDA low. Data transferis then initiatedand sent over eightTEMPERATURE LIMITREGISTERS clockpulsesfollowedby an Acknowledge Bit.During The THIGH and TLOW registersare used to storethe data transfer,SDA must remain stablewhileSCL is temperature limit thresholds for the TMP103 high,because any change inSDA whileSCL ishigh watchdog function.At the end of each temperature isinterpretedas a START orSTOP signal. measurement, the TMP103 compares the Once alldata have been transferred,the mastertemperatureresultsto each of these limits.Ifthe generatesa STOP conditionindicatedby pullingSDAtemperatureresultisgreaterthantheTHIGH limit,then fromlowtohigh,whileSCL ishigh.theFH bitintheconfigurationregisterissetto'1'.If thetemperatureresultislessthantheTLOW limit,then SERIAL INTERFACEtheFL bitintheconfigurationregisterissetto'1';see Figure8. The TMP103 operatesas a slavedeviceonlyon the two-wirebus and SMBus. Connectionstothebus areTable7 and Table8 describetheformatfortheTHIGH made viatheopen-drainI/OlinesSDA and SCL. Theand TLOW registers.Power-up resetvaluesforTHIGH SDA and SCL pins feature integratedspikeand TLOW are:THIGH = +60°C and TLOW = –10°C. The suppressionfiltersand Schmitttriggersto minimizeformatofthedataforTHIGH and TLOW isthesame as the effectsof input spikes and bus noise.ThefortheTemperatureRegister. TMP103 supportsthe transmissionprotocolforboth fast(1kHz to 400kHz) and high-speed(1kHz to 3.4MHz) modes. Alldatabytesare transmittedMSB first. Copyright© 2011,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9 ProductFolderLink(s):TMP103
SBOS545A –FEBRUARY 2011–REVISED MARCH 2011 www.ti.com SERIAL BUS ADDRESS SLAVE MODE OPERATIONS To communicate withthe TMP103, the master must The TMP103 can operateas a slavereceiverorslave firstaddressslavedevicesviaa slaveaddressbyte. transmitter.As a slavedevice,the TMP103 never The slaveaddress byte consistsof seven address drivestheSCL line. bits,and a directionbitthatindicatesthe intentof executinga readorwriteoperation. SlaveReceiverMode The TMP103 isavailableineightversions,each with The firstbytetransmittedby the master isthe slave a differentslaveaddress,as shown inTable9.These address,with the R/W bitlow. The TMP103 then addresses can be used as eithera locationor a acknowledgesreceptionofa validaddress.The next temperaturezone designator. byte transmittedby the master is the Pointer Register.The TMP103 then acknowledgesreception Table9.Device SlaveAddresses ofthePointerRegisterbyte.The nextbyteiswritten totheregisteraddressedby thePointerRegister.TheTWO-WIRE TEMPERATUREPRODUCT TMP103 acknowledges receptionof the data byte.ADDRESS ZONE The mastercan terminatedatatransferby generatingTMP103A 1110000 Zone1 a START orSTOP condition. TMP103B 1110001 Zone2 TMP103C 1110010 Zone3 SlaveTransmitterMode TMP103D 1110011 Zone4 The firstbytetransmittedby the master isthe slave TMP103E 1110100 Zone5 address, with the R/W bit high. The slave TMP103F 1110101 Zone6 acknowledgesreceptionofa validslaveaddress.The nextbyteistransmittedby the slaveof the registerTMP103G 1110110 Zone7 indicatedby the Pointer Register.The masterTMP103H 1110111 Zone8 acknowledgesreceptionofthedatabyte.The master can terminate data transferby generating aWRITING/READING OPERATION Not-Acknowledgeon receptionof the data byte,or generatinga START orSTOP condition.Accessing a particularregisteron the TMP103 is accomplishedby writingtheappropriatevaluetothe GENERAL CALLPointerRegister.The valueforthePointerRegisteris thefirstbytetransferredaftertheslaveaddressbyte The TMP103 responds to a two-wireGeneral Callwiththe R/W bitlow.Every writeoperationto the address(0000000)iftheeighthbitis'0'.The deviceTMP103 requiresa value forthe PointerRegister acknowledges the General Call address and(seeFigure12). responds to commands in the second byte.Ifthe second byte is 00000110, the TMP103 internalWhen readingfromtheTMP103, thelastvaluestored registersare resettopower-upvalues.The TMP103inthePointerRegisterby a writeoperationisused to does not support the General Address acquiredeterminewhichregisterisreadby a readoperation. command.To change theregisterpointerfora readoperation,a new valuemust be writtento the PointerRegister. HIGH-SPEED (Hs)MODEThis actionis accomplished by issuinga slave operation.The bus continuestooperateinHs-mode untila STOP conditionoccurs on the bus. Upon receivingthe STOP condition,the TMP103 switches the input and output filtersback to the default fast-modeoperation.
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Supply□Voltage TMP103 TMP103 www.ti.com SBOS545A –FEBRUARY 2011–REVISED MARCH 2011 TIMEOUT FUNCTION The TMP103A sends data on the firstbyteand the Up toeightTMP103 devicescan be on thesame bus and respondtoMDA commands; see Table9.MULTIPLE DEVICE ACCESS NOTE: Ifthebus containsan incompletesequence ofThe TMP103 supports MultipleDevice Access TMP103 deviceaddresses,themastermust transmit(MDA), whichallowsthemastertocommunicate with allrequireddummy bytes for the missing devicemultipleTMP103 deviceson the same bus interface addresstoallowfornormalMDA readoperation.Forwith one interfacetransaction.MDA commands example,iftheTMP103A, TMP103B, and TMP103Dconsistofan MDA read address(00000001)and an devicesare on thebus,themastermust transmitanMDA write address (00000000). The device MDA read address followedby fourbytesand fouracknowledgestheMDA addressand respondstothe acknowledges in orderto complete the MDA readcommand accordingly.In orderforMDA to function transaction.correctly,differentproductversionsof the TMP103 must be used inthesystem;see Table9. NOISE MultipleDevice Access Write The TMP103 is a very low-power device and The mastertransmitsan MDA writeaddressfollowed generatesverylow noiseon thesupplybus.Applying by thepointeraddressoftheregistertobe accessed; an RC filtertotheV+ pinoftheTMP103 can further see Table2.Followingthepointer,alloftheTMP103 reduce any noise the TMP103 might propagateto deviceson thebus acknowledgeand waitforthenext othercomponents. R F in Figure10 should be less byteofdatatobe writtentotheaddressedregisters. than5kΩ and C F shouldbe greaterthan10nF. When the data byte is receivedby the TMP103 devices,theystoreand acknowledgethetransmitted byte.The TMP103s store the same data on all deviceson thebus inone transaction;see Figure14. MultipleDevice Access Read Note thatbeforean MDA readtransactioncan begin, themastermust firstsend an MDA writetransaction inordertosettheappropriatepointeraddressofthe registerto be accessed,as statedin the previous section.The mastercan thentransmitan MDA read address followedby a read byte foreach TMP103 used on the bus. For example,ifa TMP103A and TMP103B are used on the same bus and an MDA read addressissent,the addressmust be followed Figure10. Noise Reductionby two bytesofdataand two masteracknowledges. Copyright© 2011,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11 ProductFolderLink(s):TMP103
t(LOW) tR tF t(HDST A) t(HDST A) t(HDDA T) t(BUF) t(SUDA T) t(HIGH) t(SUST A) t(SUSTO) P S S P TMP103 SBOS545A –FEBRUARY 2011–REVISED MARCH 2011 www.ti.com TIMING DIAGRAMS Data Transfer:The number ofdatabytestransferred between a START and a STOP conditionis notThe TMP103 is two-wireand SMBus compatible. limitedand isdeterminedby themasterdevice.Figure 11 to Figure 15 describe the various operationson theTMP103. ParametersforFigure11 Acknowledge: Each receiving device, when aredefinedinTable10.Bus definitionsare: addressed,is obligedto generatean Acknowledge bit.A devicethatacknowledgesmust pulldown theBus Idle:BothSDA and SCL linesremainhigh. SDA lineduringtheAcknowledge clockpulseinsuch a way thattheSDA lineisstablelow duringthehighStartData Transfer:A change in the stateof the periodof the Acknowledge clockpulse.Setup andSDA line,fromhightolow,whiletheSCL lineishigh, holdtimesmust be takenintoaccount.On a masterdefinesa START condition.Each data transferis receive,the terminationof the data transfercan beinitiatedwitha START condition. signaled by the master generating aStop Data Transfer:A change in the stateof the Not-Acknowledge('1')on thelastbytethathas beenSDA linefrom low tohighwhiletheSCL lineishigh transmittedby theslave.definesa STOP condition.Each data transferis terminated with a repeated START or STOP condition. NOTE: P = STOP, S = START. Figure11. Two-Wire Timing Diagram Table10.Timing Diagram Definitions FAST MODE HIGH-SPEED MODE PARAMETER MIN MAX MIN MAX UNIT t(BUF) Bus FreeTime Between STOP and START Condition 600 160 ns HoldtimeafterrepeatedSTART condition.t(HDSTA) 100 100 nsAfterthisperiod,thefirstclockisgenerated. t(SUSTA) Repeated START ConditionSetupTime 100 100 ns t(SUSTO) STOP ConditionSetupTime 100 100 ns t(HDDAT) Data HoldTime 0 0 ns t(SUDAT) Data SetupTime 100 10 ns t(LOW) SCL ClockLow Period,VS > 1.7V 1300 160 ns t(LOW) SCL ClockLow Period,VS < 1.7V 1300 200 ns t(HIGH) SCL ClockHighPeriod 600 60 ns tF Clock/DataFallTime 300 ns tR Clock/DataRiseTime 300 160 ns tR Clock/DataRiseTime forSCLK ≤ 100kHz 1000 ns
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Frame□1□T wo-Wire□Slave□Address□Byte Frame□2□Pointer□Register□Byte Start□By Master ACK□By TMP103 ACK□By TMP103 1 9 1 Frame□3□Data□Byte ACK□By TMP103 D7SDA (Continued) SCL (Continued) D6 D5 D4 D3 D2 D1 D0 SDA SCL 1 1 0 A2(1) A1(1) A0(1) R/W 0 0 0 0 0 0 P1 P0 /c188 /c188 Stop□By Master Frame□1□T wo-Wire□Slave□Address□Byte Frame□2□Pointer□Register□Byte Start□By Master ACK□By TMP103 ACK□By TMP103 Frame□3□T wo-Wire□Slave□Address□Byte Frame□4□Data□Byte□Read□Register Start□By Master ACK□By TMP103 ACK□By Master From TMP103 1 9 1 9 1 9 1 9 SDA SCL 1 1 0 R/W 0 0 0 0 0 0 P1 P0 /c188 /c188 /c188 SDA (Continued) SCL (Continued) 1 1 1 0 (1) (1) (1) (1) A1(1) A0(1) R/W D7 D6 D5 D4 D3 D2 D1 D0 Stop□By Master Stop□By Master TMP103 www.ti.com SBOS545A –FEBRUARY 2011–REVISED MARCH 2011 (1) The valueofA0,A1,and A2 aredeterminedby theTMP103 version;see Table9. Figure12. Two-Wire Timing Diagram forWriteWord Format (1) The valueofA0,A1,and A2 aredeterminedby theTMP103 version;see Table9. Figure13. Two-Wire Timing Diagram forRead Word Format Copyright© 2011,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13 ProductFolderLink(s):TMP103
Frame□1□T wo-Wire□MDA□Write□Address□Byte Frame□2□Pointer□Register□Byte Start□By Master ACK□By TMP103(1) ACK□By TMP103(1) 1 9 1 Frame□3□Data□Byte ACK□By TMP103(1) D7SDA (Continued) SCL (Continued) D6 D5 D4 D3 D2 D1 D0 SDA SCL 0 0 0 0 0 0 R/W 0 0 0 0 0 0 P1 P0 /c188 /c188 Stop□By Master TMP103 SBOS545A –FEBRUARY 2011–REVISED MARCH 2011 www.ti.com (1) AllTMP103 deviceson thebus acknowledgethebyte. Figure14. Two-Wire Timing Diagram MDA WriteWord Format
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Frame□1□T wo-Wire□MDA□Write□Address□Byte Frame□2□Pointer□Register□Byte Start□By Master ACK□By TMP103(1) ACK□By TMP103(1) Frame□3□T wo-Wire□MDA□Read□Address□Byte Frame□4□Data□Byte□Read□Register Start□By Master ACK□By TMP103(1) ACK□By Master (2) From TMP103A(3) 1 9 1 9 1 9 1 9 SDA SCL 0 0 0 R/W 0 0 0 0 0 0 P1 P0 /c188 /c188 /c188 SDA (Continued) SCL (Continued) SDA (Continued) SCL (Continued) 0 0 0 0 0 0 0 0 0 0 R/W D7 D6 D5 D4 D3 D2 D1 D0 Frame□5□Data□Byte□Read□Register Stop□By Master ACK□By Master (2) From TMP103B(3) 1 9 D7 D6 D5 D4 D3 D2 D1 D0 Stop□By Master Frame□6□Data□Byte□Read□Register Stop□By Master ACK□By Master (2) From TMP103C(3) 1 9 D7 D6 D5 D4 D3 D2 D1 D0 TMP103 www.ti.com SBOS545A –FEBRUARY 2011–REVISED MARCH 2011 (1) AllTMP103 deviceson thebus acknowledgethebyte. (2) The mastermust issuean acknowledgeforeach bytereadinordertoreadalloftheTMP103 deviceson thebus. (3) ThreeTMP103 devicesused inthiscase;up toeightdevicescan be used (seeTable9). Figure15. Two-Wire Timing Diagram MDA Read Word Format Using TypicalApplication(FrontPage) Copyright© 2011,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15 ProductFolderLink(s):TMP103
SBOS545A –FEBRUARY 2011–REVISED MARCH 2011 www.ti.com
REVISION HISTORY
NOTE: Page numbers forpreviousrevisionsmay differfrompage numbers inthecurrentversion. Changes from Original(February2011)toRevisionA Page
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www.ti.com 9-Mar-2011 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) TMP103AYFFR ACTIVE DSBGA YFF 4 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TMP103AYFFT ACTIVE DSBGA YFF 4 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TMP103BYFFR ACTIVE DSBGA YFF 4 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TMP103BYFFT ACTIVE DSBGA YFF 4 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TMP103CYFFR ACTIVE DSBGA YFF 4 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TMP103CYFFT ACTIVE DSBGA YFF 4 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TMP103DYFFR ACTIVE DSBGA YFF 4 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TMP103DYFFT ACTIVE DSBGA YFF 4 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TMP103EYFFR ACTIVE DSBGA YFF 4 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TMP103EYFFT ACTIVE DSBGA YFF 4 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TMP103FYFFR ACTIVE DSBGA YFF 4 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TMP103FYFFT ACTIVE DSBGA YFF 4 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TMP103GYFFR ACTIVE DSBGA YFF 4 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TMP103GYFFT ACTIVE DSBGA YFF 4 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TMP103HYFFR ACTIVE DSBGA YFF 4 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TMP103HYFFT ACTIVE DSBGA YFF 4 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM (1) The marketing status values are defined as follows:
www.ti.com 9-Mar-2011 Addendum-Page 2 ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 8-Mar-2011 Pack Materials-Page 1
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TMP103AYFFR DSBGA YFF 4 3000 190.5 212.7 31.8 TMP103AYFFT DSBGA YFF 4 250 190.5 212.7 31.8 TMP103BYFFR DSBGA YFF 4 3000 190.5 212.7 31.8 TMP103BYFFT DSBGA YFF 4 250 190.5 212.7 31.8 TMP103CYFFR DSBGA YFF 4 3000 190.5 212.7 31.8 TMP103CYFFT DSBGA YFF 4 250 190.5 212.7 31.8 TMP103DYFFR DSBGA YFF 4 3000 190.5 212.7 31.8 TMP103DYFFT DSBGA YFF 4 250 190.5 212.7 31.8 TMP103EYFFR DSBGA YFF 4 3000 190.5 212.7 31.8 TMP103EYFFT DSBGA YFF 4 250 190.5 212.7 31.8 TMP103FYFFR DSBGA YFF 4 3000 190.5 212.7 31.8 TMP103FYFFT DSBGA YFF 4 250 190.5 212.7 31.8 TMP103GYFFR DSBGA YFF 4 3000 190.5 212.7 31.8 TMP103GYFFT DSBGA YFF 4 250 190.5 212.7 31.8 TMP103HYFFR DSBGA YFF 4 3000 190.5 212.7 31.8 TMP103HYFFT DSBGA YFF 4 250 190.5 212.7 31.8 PACKAGE MATERIALS INFORMATION www.ti.com 8-Mar-2011 Pack Materials-Page 2
D: Max = E: Max = 0.79 mm, Min = 0.79 mm, Min = 0.73 mm 0.73 mm
D: Max = E: Max = 0.79 mm, Min = 0.79 mm, Min = 0.73 mm 0.73 mm
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