TMC2241ATU+

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Technical content

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI 19-102045; Rev 0; 11/25 © 2025 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. TMC2241 General Description The TMC2241 is a smart, high-voltage stepper driver IC with step and direction control and serial communication interfaces. It combines the industry’s most advanced stepper motor driver based on the 256 microsteps, built- in indexer and two fully integrated 65V, 3.0AMAX H- bridges, plus non-dissipative integrated current sensing (ICS). ADI-Trinamic's sophisticated StealthChop2 chopper ensures absolutely noiseless operation combined with maximum efficiency and best motor torque. High integration, high energy efficiency, and a small form factor enable miniaturized and scalable systems for cost-effective solutions. The complete solution reduces the learning curve to a minimum, while giving best- in- class performance. The H-bridge fie ld-effect transistors (FETs) have very low impedance, resulting in high driving efficiency and minimal heat generated. The typic al total RON (high side + low side) is 0.31Ω. The maximum RMS current per H-bridge is 2A RMS with VS = 24V and 1.7A RMS with V S = 48V supply at room temperature, assuming a four-layer PCB. The permissible continuous current is thermally limited. It depends on the operation duty cycle, and on the thermal characteristics of the application (PCB ground planes, heatsink, and ventilation). The maximum full-scale current per H-bridge is 3A (peak). This current is defined as the maximum current setting of the embedded current drive regulation circuit. The internal overcurrent protection (OCP) adapts to the motor current range to protect the IC and motor, and limits peak current to 5A in the highest setting. The non-dissipative ICS eliminates the bulky external power resistors, resulting in a dramatic space and power saving compared with mainstream applications based on external sense resistors, while providing the same overall accuracy. The TMC2241 features extensive diagnostics and protections such as short protection/OCP, thermal shutdown, and undervoltage lockout (UVLO). During thermal shutdown and UVLO events, the driver is disabled. Furthermore, the TMC2241 provides functions to measure the driver temperature, estimate the motor temperature, and measure one external analog input. The TMC2241 is available in a small TQFN38 5mm x 7mm package with exposed pad.

Applications

• Textile, Sewing Machines, Knitting Machines
• Lab and Factory Automation
• ID Printers/Card Printers
• Liquid Handling, Medical Applications
• Office Automation and Paper Handling
• POS, Massage Chairs
• ATM, Cash Recycler, Bill Validators, Cash Machines
• CCTV, Security
• Pumps and Valve Control
• Heliostat and Antenna Positioning
• Stage Lighting Benefits and Features
• Voltage Range: 4.5V to 65V DC
• Low RON (HS + LS): 0.31Ω Typical (TA = 25°C)
• Current Ratings per H-Bridge (Typical at 25°C):
• 2ARMS (2.8A Sine Peak) at VS = 24V
• 1.7ARMS (2.4A Sine Peak) at VS = 48V
• Fully Integrated Lossless Current Sensing
• Step/Direction (S/D) Interface with MicroPlyer Step Interpolation
• SPI and Single-Wire UART
• Encoder Interface
• Highest Resolution of 256 Microsteps per Full Step
• Flexible Wave Table and Phase Shift to Match Motor
• StealthChop2 Silent Motor Operation
• SpreadCycle Highly Dynamic Motor Control Chopper
• Jerk-Free Combination of StealthChop2 and SpreadCycle
• StallGuard2 and StallGuard4 Sensorless Motor Load Detection
• CoolStep Current Control for Energy Savings up to 75%
• Passive Braking and Freewheeling Mode
• Motor Phase Temperature Estimation
• Chip Temperature Measurement
• General Purpose Analog Input
• Full Protection and Diagnostics
• Overvoltage Protection Output
• Compact 5mm x 7mm TQFN38 Package

TMC2241 65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI 19-102045; Rev 0; 11/25 © 2025 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. TABLE OF CONTENTS

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 3

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 4

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 5

Table 18. IFS Full-Scale RMS Current in Ampere (ARMS) Based on DRV_CONF Bits 1…0 Setting and Different RREF

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 8

Package Information

Land Pattern Number 90-0076 Thermal Resistance, Single Layer Board: Junction to Ambient (θJA) 38°C/W Junction to Case (θJC) 1°C/W Thermal Resistance, Four Layer Board: Junction to Ambient (θJA) 28°C/W Junction to Case (θJC) 1°C/W For the latest package outline information and land patterns (footprints), go to https://www.analog.com/en/design- center/packaging-quality-symbols-footprints/package-index.html. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. layer board. For detailed information on package thermal considerations, refer to https://www.analog.com/en/technical- articles/thermal-characterization-of-ic-packages.html. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational section s of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Electrical Characteristics

100% tested at TA = +25°C. Limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS POWER SUPPLY Supply Voltage Range VS 4.5 65 V Sleep Mode Current Consumption IVS V(SLEEPN) = 0 4 25 μA Quiescent Current Consumption IVS V(SLEEPN) = 1, V(DRV_ENN) = 1 3.5 6 mA 1.8V Regulator Output Voltage VVDD VS = 4.5V 1.8 V

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 9 100% tested at TA = +25°C. Limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS VDD Current Limit IV18LIM 20 mA Charge Pump Voltage VCP VS + 2.7 V Logic I/O Supply Voltage Range VCC_IO 2.2 5.5 V Sleep Mode Current Consumption IVCC_IO V(SLEEPN) = 0 5 10 μA Quiescent Current Consumption IVCC_IO V(SLEEPN) = 1 35 60 μA LOGIC LEVEL INPUTS-OUTPUTS Input Voltage Level - High VIH 0.7 × VCC_IO V Input Voltage Level - Low VIL 0.3 × VCC_IO V Input Hysteresis VHYS 0.15 × VCC_IO V Internal Pullup/Pulldown Resistance RPULL To GND or to VCC_IO 60 100 140 kΩ Input Leakage InLeak Inputs without pullup/pulldown resistance -1 +1 μA Output Logic-Low Voltage VOL ILOAD = 5mA 0.4 V Push-Pull Output LogicHigh Voltage VOH ILOAD = 5mA VCC_IO – 0.4V Open-Drain Output Logic High Leakage Current IOH V(PIN) = 5.5V -1 +1 μA SLEEPN Voltage Level High VIHSLEEPN 0.9 V SLEEPN Voltage Level Low VILSLEEPN 0.6 V SLEEPN Pulldown Input Resistance RPDSLEEPN 0.8 1.5 MΩ OUTPUT SPECIFICATIONS Output ON-Resistance Low Side RONLS Full-scale bits = 10 0.15 0.3 Ω Full-scale bits = 01 0.21 0.4 Output ON-Resistance Low Side RONLS Full-scale bits = 00 0.37 0.75 Ω Output ON-Resistance High Side RONLS 0.16 0.3 Ω Output Leakage ILEAK -10 +10 μA Output Slew Rate SR Slew-rate bits = 00 100 V/μs Slew-rate bits = 01 200 Slew-rate bits = 10 400 Slew-rate bits = 11 800 PROTECTION CIRCUITS Overcurrent Protection Threshold OCP Full-scale bits = 10 5.0 A Full-scale bits = 01 3.33

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 10 100% tested at TA = +25°C. Limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Full-scale bits = 00 1.67 Overcurrent Protection Blanking Time TOCP 0.9 1.5 2.3 μs UVLO Threshold on VS UVLO VS falling 3.75 3.9 4.05 V UVLO Threshold on VS Hysteris UVLOHYS 0.12 V UVLO Threshold on VCC_IO UVLO VCC_IO falling 0.9 1.5 1.95 VCC_IO UVLO Hysteresis UVLOVCCH 100 mV Thermal Protection Threshold Temperature TSD 165 °C Thermal Protection Temperature Hysteresis 20 °C CURRENT REGULATION IREF Pin Resistor Range RREF 12 60 kΩ IREF Output Voltage VREF 0.882 0.9 0.918 V Full-Scale Current Constant KIFS IFS = 1A 11.75 A × kΩ IFS = 2A 24 IFS = 3A 36 Regulation Accuracy DITRIP1 Output current from 7% to 100% FS, RREF = 12kΩ -7 +7 % Phase-to-Phase Current Regulation Mismatch IMATCH Output currents from 7% to 100% FS, RREF = 12kΩ One Sigma 0.7 % FUNCTIONAL TIMINGS SLEEP Time tSLEEP SLEEPN = 0 to OUT_ three state 50 μs Wake-Up Time from Sleep TWAKE SLEEPN = 1 to normal operation 2.5 ms Enable Time TEN Time from DRV_ENN pin falling edge to driver on 1.5 μs Disable Time TEN Time from DRV_ENN pin rising edge to driver off 6 μs CLOCK Internal Clock Frequency fCLKOSC 11.9 12.5 13.2 MHz External Clock Frequency fCLK 8 16 20 MHz External Clock Duty Cycle tCLKL 40 60 % External Clock Detection in Cycles 4 8 External Clock Timeout Detection in Cycles of Internal fCLKOSC 12 16 External Clock Detection Lower Frequency Threshold fCLKLO 4 MHz

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 11 100% tested at TA = +25°C. Limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SPI TIMINGS SCK Valid Before or After Change of CSN tCC tSCK ns CSN High Time tCSH 4 × tSCK ns SCK Low Time tCL 20 ns SCK High Time tCH 20 ns SCK Frequency fSCK VCC_IO = 3V 8 MHz VCC_IO = 2.2V 5 SDI Setup Time Before SCK Rising Edge tDU 10 ns SDI Hold Time After SCK Rising Edge tDH 10 ns Data Out Valid Time After SCK Falling Edge tDO VCC_IO = 3V 33 50 ns VCC_IO = 2.2V 50 80 ns SDI, SCK, and CSN Filter Delay Time tFILT Rising and falling edge 10 ns STEP/DIR TIMINGS Step Frequency fSTEP Dedge = 1 fCLK/4 Dedge = 0 fCLK/8 Fullstep Frequency fFS fCLK/512 STEP High Time tSH tCLK + 20 ns STEP Low Time tSL tCLK + 20 ns DIR/STEP to CLK Setup Time tSU 10 ns DIR/STEP to CLK Hold Time tSH 10 ns DIR to STEP Setup Time tSU 20 ns ENCODER TIMING Encoder Counting Frequency fCNT < 2/3 fCLK fCLK A/B/N Input Low Time tABNL 3 x tCLK + 20 ns A/B/N Input High Time tABNH 3 x tCLK + 20 ns A/B/N Spike Filtering Time tFILTABN Rising and falling edge 3 x CLK ADC/ANALOG INPUT/TEMPERATURE ADC Resolution 12 bit + sign 13 Bit Analog Input Voltage Range VAIN 0 1.25 V Analog Input Leakage IAIN,lEAK -1 +1 uA Analog Input Frequency fAIN Assuming undersampling at AIN is accepted, the AIN input frequency must be lower than the given max. value for a 70 kHz

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 12 100% tested at TA = +25°C. Limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS meaningful ADC conversion for a single ADC channel. Driver Temperature Accuracy TDRIVER ±10 °C Supply Voltage Measurement Accuracy VM = 4.5V -7 VM >= 12V -4 ADC Sample Rate fSAMPLE, ADC 𝑓𝐶𝐿𝐾 2048 Pin Descriptions PIN NAME FUNCTION REF SUPPLY Type 6 AGND Analog Ground. Connect to ground plane. GND 23, 28 PGND Power Ground. Connect to ground plane. GND 21, 25, 26, VS Motor Supply Voltage. Provide filtering capacity near pin with shortest loop to GND plane/exposed pad. Supply 5 VDD1V8 Output of Internal 1.8V Regulator. Attach 2.2µF or larger ceramic capacitor to AGND near to pin for best performance. Supply 18 VCP Charge Pump Voltage. Tie to VS using 1.0µF capacitor. Connect positive end of capacitor close to VS pin to avoid inductive peaks. Analog Output

7 VCC_IO Digital IO supply voltage provided from external source to define circuit IO

level. Required for proper voltage level settings on output pins. Supply

17 CPO Charge Pump Capacitor Output Analog

16 CPI Charge Pump Capacitor Input. Tie to CPO using the VS-rated 22nF capacitor. Analog Output

38 CLK

CLK Input. Tie to GND using short wire for internal clock or supply external clock. Internal clock-fail over circuit protects against loss of external clock signal. VCC_IO Digital Input

1 STEP Step Input VCC_IO Digital

2 DIR Direction input VCC_IO Digital

34 CSN/AD2 SPI chip select input (negative active) (UART_EN = 0) or Address input 2 (+4)

in UART mode (UART_EN = 1). VCC_IO Digital Input (Pullup)

35 SCK/AD1 SPI serial clock input (UART_EN = 0) or address input 1 (+2) in UART mode

(UART_EN = 1). VCC_IO Digital Input (Pullup)

36 SDI/AD0 SPI data input (UART_EN = 0) or address input 0 (+1) in UART mode

(UART_EN = 1). VCC_IO Digital Input (Pullup)

37 SDO/NAO SPI data output (three-state) (UART_EN = 0) or next address output (NAO) in

UART mode (UART_EN = 1). VCC_IO Digital Output 3 IREF Analog Reference Current for Current Scaling. Provide external resistor to GND. VDD_18 Analog Input

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 13 12 UART_EN Interface selection pin. When tied low, the SPI interface is enabled. When tied high, the UART interface is enabled. Integrated pull-down resistor. VCC_IO Digital Input (Pulldown) 9 ENCB Encoder B-channel input. VCC_IO Digital Input (Pullup) 10 ENCA Encoder A-channel input. VCC_IO Digital Input (Pullup) 8 ENCN Encoder N-channel input. VCC_IO Digital Input (Pullup) 11 DRV_ENN Enable Input. The power stage is switched off (all motor outputs floating) when this pin is driven to a high level. VCC_IO Digital Input (Pullup)

13 DIAG0

Diagnostics output DIAG0. Interrupt or STEP output from internal motion controller for external driver. Use external pullup resistor in open drain mode. In system reset state this pin is actively pulled low to indicate reset condition to external controller. VCC_IO Digital Output

14 DIAG1/SW

Diagnostics Output DIAG1. Position compare or DIR output from internal motion controller for external driver. Use external pullup resistor in open-drain mode. Single-wire I/O in UART mode. VCC_IO Digital IO 33 nSLEEP Low active power down input/reset input. Apply a continuous low level to bring the device to sleep mode. SLEEPN has an internal pulldown. If not used, connect to VS or VCC_IO (this is a high voltage pin). Once the IC returns from sleep mode/reset, it must be reconfigured before being used again. Register content is not stored during sleep mode. While reconfiguring the IC, it is advised to still hold the bridge drivers disabled with DRV_ENN. Do not use while at high motor velocity! VS Analog Input (Pulldown)

24 OUT2B Motor Coil B Output 2 VS Analog

22 OUT1B Motor Coil B Output 1 VS Analog

27 OUT2A Motor Coil A Output 2 VS Analog

29 OUT1A Motor Coil A Output 1 VS Analog

Exposed Die Pad. Connect the exposed die pad to a GND plane. Provide as many as possible vias for heat transfer to the GND plane. Serves as the GND pin for power stage and internal circuitry. GND 19, 20, 31, 32 N.C. No Internal Connection. Leave this pin open or tie it to GND for improved cooling. N.C. 15 OV Overvoltage Indicator Output (Open-Drain) with Programmable Threshold Voltage. Attach external MOSFET with load resistor to limit supply voltage. External pullup resistor required. Updated by ADC with 𝑓𝐶𝐿𝐾 2048⁄ . VCC_IO Digital Output (Open- Drain)

4 AIN

General-purpose analog input measured with internal ADC with 𝑓𝐶𝐿𝐾 2048⁄ . Input range 0 to 1.25V. Value available through SPI/UART. VDD_18 Analog Input

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 14 Pin Configurations TMC2241 TQFN Pin Configuration TOP VIEW OUT1A OUT2A VS VS OUT2B PGND CPI OV DIAG1 PGND DIAG0 CPO VCP OUT1B VS VS NC NC NC TMC2241 EXPOSED PAD (EP) = GND 2425262728293031 20212223 SCK/AD1 CLK SDO/NAO SDI/AD0 CSN/AD2 nSLEEP NC DIR VDD18 AIN ENCN ENCA STEP UART_EN IREF AGND VCCIO ENCB DRV_ENN 1 2 4 5 6 73 8 9 10 11 12 TQFN38 (5mm x 7mm)

Figure 1. Block Diagram

operating the motor within the application. Figure 2. Block Diagram with Typical External Components No-noise, high-precision chopper algorithm for inaudible motion and inaudible standstill of the motor. SpreadCycle High-precision cycle-by-cycle current control for highest dynamic movements. StallGuard2 Sensorless stall detection and mechanical load measurement for SpreadCycle.

StallGuard4 Sensorless stall detection and mechanical load measurement for StealthChop. MicroPlyer Microstep interpolator to run at full 256 microstepping with low resolution step input. recovery from equipment malfunctions. on the desired interface selection. rate configuration is required. parameters can be configured through the serial control interfaces. Figure 3. Automatic Motor Current Control at Standstill and Ramp-Up motion, except for the noise generated by ball bearings. settings during the first motion after power-up and further optimizes the settings in subsequent motions. set. StealthChop2 allows high motor dynamics by reacting at once to a change of motor velocity. and smooth performance, SpreadCycle at higher velocity for high dynamics and highest peak velocity at low vibration.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 18 SpreadCycle is an advanced cycle -by-cycle chopper mode. It offers smooth operation and good resonance dampening over a wide range of speed and load. The SpreadCycle chopper scheme automatically integrates and tunes fast decay cycles to guarantee smooth zero-crossing performance. Benefits

• Significantly improved microstepping with low-cost motors.
• Motor runs smooth and quiet.
• Absolutely no standby noise.
• Reduced mechanical resonance improves torque output. StallGuard2/StallGuard4 – Mechanical Load Sensing StallGuard2 and StallGuard4 provide an accurate measurement of the load on the motor. These can be used for stall detection as well as for other uses at loads below those that stall the motor, such as CoolStep load -adaptive current reduction. This gives more information on the drive, allowing functions like sensorless homing and diagnostics of the drive mechanics. While StallGuard2 combines with SpreadCycle chopper, StallGuard4 uses a different principle to combine with StealthChop2. CoolStep – Load Adaptive Current Control CoolStep drives the motor at the optimum current. It uses the StallGuard2 or StallGuard4 load measurement information to adjust the motor current to the minimum amount required in the actual load situation. CoolStep results in energy savings and keeps the components cool. Because it drives the motor with the optimum current, CoolStep increases the motor efficiency compared to standard operations with approximately 50% torque reserve. Benefits
• Highest energy efficiency, power consumption decreased by up to 75%.
• Motor generates less heat.
• Improved mechanical precision.
• Less or no cooling.
• Improved reliability.
• Use of smaller motor is possible, less torque reserve required.
• Less motor noise due to less energy exciting motor resonances. Encoder Interface The TMC2241 provides an encoder interface for external incremental encoders. The encoder can be used for consistency checks on-the-fly between the encoder position and external ramp generator position. A programmable prescaler allows the adaptation of the encoder resolution to the motor resolution. A 32-bit encoder counter is provided. Serial Peripheral Interface (SPI) SPI Datagram Structure The TMC2241 uses 40 -bit SPI datagrams for communication with a microcontroller. Microcontrollers equipped with hardware SPI are typically able to communicate using integer multiples of 8 bits. The TMC2241 can cascade ICs with multiples of 5 bytes in a single chain. It is possible to cascade third -party peripherals with a single byte. For this, dummy bytes must be inserted to achieve a multiple of 5 bytes. The CSN line of the device must stay active (= low) for the complete duration of the datagram transmission. Each datagram sent to the device is composed of an address byte followed by four data bytes. This allows direct 32 -bit data word communication with the register set. Each register is accessed through 32 data bits even if it uses less than 32 data bits. For simplification, each register is specified by a one byte address:
• For a read access, the most significant bit of the address byte is 0.
• For a write access, the most significant bit of the address byte is 1. All registers are readable, most of them are read write, some read only, and some write 1 to clear (example, GSTAT registers).

Table 1. SPI Datagram Structure subsequent read or write access. Hence, multiple registers can be read in a pipelined fashion. SPI_STATUS is a number of eight selected status bits. = 0xA2. For read access, the data bit might have any value (-). So, it can be set to 0. Table 2. SPI Read/Write Example Flow

• ST is a placeholder for the status bits SPI_STATUS.

New status information is latched at the end of each access and is available with the next SPI transfer.

Table 3. SPI_STATUS – Status Flags Transmitted with Each SPI Access in Bits 39 7:4 Don't care Not used in TMC2241. 3 Standstill DRV_STATUS[31] – 1: Signals motor standstill. 2 sg2 DRV_STATUS[24] – 1: Signals StallGuard flag active. 1 Driver_error GSTAT[1] – 1: Signals driver driver error (clear by resetting bit in GSTAT). 0 Reset_flag GSTAT[0] – 1: Signals that a reset occurred (clear by resetting bit in GSTAT).

• SCK – bus clock input
• SDI – serial data input
• SDO – serial data output
• CSN – chip select input (active low) The SPI peripheral is enabled for an SPI transaction by a low on -the-chip select input CSN. Bit transfer is synchronous to the bus clock SCK, with the peripheral latching the data from SDI on the rising edge of SCK and driving data to SDO following the falling edge. The most significant bit is sent first. A minimum of 40 SCK clock cycles is required for a bus transaction with the TMC2241. If more than 40 clocks are driven, the additional bits shifted into SDI are shifted out on SDO after a 40-clock delay through an internal shift register. This can be used for daisy chaining multiple chips. The CSN must be low during the whole bus transaction. When CSN goes high, the contents of the internal shift register are latched into the internal control register and recognized as a command from the SPI controller to the SPI peripheral. If more than 40 bits are sent, only the last 40 bits received before the rising edge of CSN are recognized as the command. SPI Timing The SPI maximum frequency is at 8MHz. SCK is independent from the clock frequency of the system, while the only parameter depending on the clock frequency is the minimum CSN high time. All SPI inputs are internally filtered to avoid triggering on pulses shorter than 10ns. Figure 4 shows the timing parameters of an SPI bus transaction. The Electrical Characteristics table gives the timing values. The SPI uses SPI MODE 3. CSN SCK SDI SDO tCC tCCtCL tCH BIT 39 BIT 38 BIT 0 BIT 39 BIT 38 BIT 0 tDO tZC tDU tDH tCH

Figure 4. SPI Timing Diagram

Table 4. UART Write Access Datagram Structure is transmitted byte wise. The 32-bit data words are transmitted with the highest byte first. baud rate is fCLK/16 due to the required stability of the baud clock. The initial peripheral address NODEADDR is selected by CSN_AD2, SCK_AD1, and SDI_AD0 in the range 0 to 7. means that a high level on SDI (with CSN low and SCK low) increments the NODEADDR setting by one. The communication resets if there is a pause of longer than 63 -bit times between the start bits of two successive bytes. timeout of 12-bit times, for which the data line must be idle. Other errors like wrong CRC are also treated the same way. an abrupt reduction of the baud rate to less than 15% of the previous value is not possible. write accesses. Read accesses do not modify the counter.

Table 5. UART Read Access Request Datagram Structure delay time, after which the first reply byte is sent following a read request. non-addressed node might detect a transmission error upon read access to a different node. Table 6. UART Read Access Reply Datagram Structure times after the last bit is sent. The address %11111111 is reserved for read accesses going to the UART host. A node cannot use this address. containing its own node address. It increases its datagram counter for each correctly received write access datagram.

output driver on the DIAG1/SW and sends its response using the same baud rate. Table 7. TMC2241 UART Interface Signals

• Tie all address pins as well as SDI/AD0 of the first TMC2241 to GND.
• Connect the SDO/NAO output of the first TMC2241 to the next node's address[0] pin (SDI/AD0). Connect further nodes in the same fashion.
• Now, the first node responds to address 0. The following nodes are set to address 1.
• Program the first TMC2241 to its specific node address. Note: Once a node is initialized with its node address, its SDO/NAO output, which is tied to the next node's address[0] pin (SDI/AD0), must be programmed to logic 0 to differentiate the next node from all following nodes.
• Now, the second node is accessible and can get its specific node address. Further nodes can be programmed to their specific node addresses sequentially. NODE #1SDI/AD0 NODE #2SDI/AD0 SDO/ADO DIAG1/SW DIAG1/SW NODE #3SDI/AD0 SDO/ADO DIAG1/SW SDO/ADO +VCC_IO RIDLE HOST CPU WITH UART FIRMWARE SWITCHES TXD TO THREE-STATE FOR RECEIVING TXD RXD RIDLE FORCES STOP BIT LEVEL IN IDLE CONDITION, 3k3 IS SUFFICIENT WITH 14 NODES FOR EXAMPLE.

Figure 5. UART Daisy-Chaining Example Table 8. UART Example for Addressing up to 255 Nodes

Table 9. Fullstep/Half Step Lookup Table Values for Phase A/Phase B Coil Currents 256 microsteps interpolation) up to 256 microsteps (fullstep input to 256 microsteps) are driven for a single-step pulse. detected, the driver automatically switches the motor to holding current IHOLD. Figure 8. MicroPlyer Microstep Interpolation with Rising STEP Frequency (Example: 16 to 256)

microsteps. So, there is a small jump in motor angle between the first and second cycles at the higher rate. vibration at low velocities. mechanical load because it prevents the motor from stalling due to mechanical oscillations, which can occur without load. in Figure 9 shows the tuning procedure. Table 10. Constraints and Requirements for StealthChop2 Autotuning AT#1 and drive back to run current, or set IHOLD to IRUN. EMF is generated and where the full run current can be reached. Hint: A typical range is 60RPM to 300RPM. starting from default value 0. Hint: Determine the best conditions for automatic tuning with the evaluation board. evaluation board. It is recommended to use an initial value for settings PWM_OFS and PWM_GRAD determined per motor type.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 28 Modifying GLOBALSCALER or VS voltage invalidates the result of the automatic tuning process. Motor current regulation cannot compensate significant changes until the next AT#1 phase. Automatic tuning adapts to changed conditions whenever AT#1 and AT#2 conditions are fulfilled in the later operation. StealthChop2 Options To match the motor current to a certain level, the effective PWM voltage is scaled depending on the actual motor velocity. Several additional factors influence the required voltage level to drive the motor at the target current: the motor resistance, its back-EMF (for example, directly proportional to its velocity), as well as the actual level of the supply voltage. Two modes of PWM regulation are provided: the automatic tuning mode (AT) using current feedback (pwm_autoscale = 1, pwm_autograd = 1), and a feed-forward velocity-controlled mode (pwm_autoscale = 0).

100 FULL STEPS IN SUM)

Figure 9. StealthChop2 Automatic Tuning Procedure

regulation is not satisfying in the given operating conditions. It is recommended to use application -specific initial tuning parameters, fitting the motor type and supply voltage. or change of supply voltage. PWM_OFS can be determined initially in the automatic tuning mode. good higher velocity performance vs. dynamic power dissipation. Table 11. Choice of PWM Frequency for StealthChop2 uses a proportional regulator to regulate PWM_SCALE_AUTO to match the motor current to the target current.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 33 PWM_OFS_AUTO and PWM_GRAD_AUTO, respectively, based on PWM_OFS and PWM_GRAD with non -automatic current scaling. The freewheeling option allows going to zero motor current. Lower motor coil current limit for StealthChop2 automatic tuning (pwm_meas_sd_enable = 0): 𝐼𝐿𝑜𝑤𝑒𝑟𝐿𝑖𝑚𝑖𝑡 = 𝑡𝐵𝐿𝐴𝑁𝐾 × 𝑓𝑃𝑊𝑀 × 𝑉𝑆 𝑅𝐶𝑂𝐼𝐿 VS being the motor supply voltage and RCOIL the motor coil resistance. ILOWERLIMIT can be treated as a rule-of-thumb value for the minimum nominal IRUN motor current setting. In case where the lower limit is not sufficient to reach the desired setting, be sure to set pwm_meas_sd_enable = 1. fPWM is the chopper frequency, as determined by setting PWM_FREQ. Example: A motor has a coil resistance of 5Ω, the supply voltage is 24V. With TBL = %01 and PWM_FREQ = %00, tBLANK is 24 clock cycles, fPWM is 2/(1024 clock cycles): 𝐼𝐿𝑂𝑊𝐸𝑅𝐿𝐼𝑀𝐼𝑇 = 24𝑡𝑐𝑙𝑘 × 2 1024𝑡𝐶𝐿𝐾 × 24𝑉 5𝛺 = 24 512 × 24𝑉 5𝛺 = 225𝑚𝐴 This means the motor target current for automatic tuning must be 225mA or more, taking into account all relevant settings. This lower current limit also applies when modifying the motor current through the GLOBALSCALER. Attention: For automatic tuning, a lower coil current limit applies. IRUN ≥ 8: current settings for IRUN below 8 do not work with automatic tuning. ILOWERLIMIT: Depending on the setting of bit pwm_meas_sd_enable (in register PWM_CONF[22]) for automatic tuning, a lower coil current limit applies. The motor current in the automatic tuning phase AT#1 must exceed this lower limit. Calculate ILOWERLIMIT or measure it using a current probe. Setting the motor run-current or hold-current below the lower current limit during operation by modifying IRUN and IHOLD is possible after successful automatic tuning. The lower current limit also limits the capability of the driver to respond to the changes of the GLOBALSCALER. To overcome the restriction by the lower limit, set pwm_meas_sd_enable = 1. This allows the IC to additionally measure coil current in the slow decay phase. Velocity-Based Scaling Velocity-based scaling scales the StealthChop2 amplitude based on the time between every two steps, for example, based on TSTEP, measured in clock cycles. This concept basically does not require a current measurement, because no regulation loop is necessar y. A pure velocity -based scaling is available through programming, only when setting pwm_autoscale = 0. The basic idea is to have a linear approximation of the voltage required to drive the target current into the motor. The stepper motor has a certain coi l resistance, and thus, needs a certain voltage amplitude to yield a target current based on the basic formula I = U/R. With R being the coil resistance, U the supply voltage scaled by the PWM value, the current I results. The initial value for PWM_OFS can be calculated as: 𝑃𝑊𝑀_𝑂𝐹𝑆 = 374 × 𝑅𝐶𝑂𝐼𝐿 × 𝐼𝐶𝑂𝐼𝐿 𝑉𝑆 VS is the motor supply voltage and ICOIL the target RMS current. The effective PWM voltage UPWM (1/SQRT(2) x peak value) results, considering the 8 -bit resolution and 248 sine wave peak for the actual PWM amplitude shown as PWM_SCALE: 𝑈𝑃𝑊𝑀 = 𝑉𝑆 × 𝑃𝑊𝑀_𝑆𝐶𝐴𝐿𝐸 256 × 248 256 × (𝐶𝑆_𝐴𝐶𝑇𝑈𝐴𝐿 + 1 32 ) + 𝑃𝑊𝑀_𝐺𝑅𝐴𝐷 × 𝑃𝑊𝑀_𝑆𝐶𝐴𝐿𝐸 374 With rising motor velocity, the motor generates an increasing back -EMF voltage. The back -EMF voltage is proportional to the motor velocity. It reduces the PWM voltage effective at the coil resistance, and thus, current decreases. The TMC2241 provides a second velocity dependent factor (PWM_GRAD) to compensate for this. The overall effective PWM amplitude (PWM_SCALE_SUM) in this mode is calculated automatically in dependence of the microstep frequency as:

CS_ACTUAL takes into account the actual current scaling, as defined by IHOLD and IRUN, or respectively, by CoolStep. driver or the actual internal frequency. CBEMF is the back-EMF constant of the motor in Volts per radian/second. multiplied by 200 fullsteps for a 1.8° motor. Figure 14. Velocity-Based PWM Scaling (pwm_autoscale = 0) PWM_OFS_AUTO and PWM_GRAD_AUTO.

ICOILNOM is the motor’s rated RMS phase current for the specified holding torque. torque unit is [Nm], where 1Nm = 100Ncm = 1000mNm. current assumes a fullstep position, with two coils operating. For applications requiring high velocity motion, SpreadCycle may bring more stable operation in the upper velocity range. SpreadCycle based on a velocity threshold. With this, StealthChop2 is only active at low velocities. Figure 15. TPWMTHRS for Optional Switching to SpreadCycle As a first step, both chopper principles should be parameterized and optimized individually. low transfer velocity to avoid a jerk at the switching point.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 36 Jerkless Switching to SpreadCycle A jerk occurs when switching at higher velocities because the back -EMF of the motor (which rises with the velocity) causes a phase shift of up to 90° between the motor voltage and motor current. So, when switching at higher velocities between the voltage PWM and current PWM mode, this jerk occurs with increased intensity. A high jerk may even produce a temporary overcurrent condition (depending on the motor coil resistance). At low velocities (example, 1RPM to a few 10RPM), it can be completely neglected for most motors. Therefore, consider the jerk when switching the driver between SpreadCycle and StealthChop2. With automatic switching controlled by TPWMTHRS, the driver can automatically eliminate the jerk using StallGuard4 to determine the phase shift. It applies the same phase shift to SpreadCycle until the velocity falls back below the switching threshold. Set flag SG4_THRS.sg_angle_offset to enable this function. Set TPWMTHRS to zero to work with StealthChop2 only. When enabling the StealthChop2 mode the first time using automatic current regulation, the motor must be at standstill to allow a proper current regulation. When the drive switches to SpreadCycle at a higher velocity, StealthChop2 logic stores the last current regulation setting until the motor returns to a lower velocity again. This way, the regulation has a known starting point when returning to a lower velocity, where StealthChop2 is re-enabled. Therefore, neither the velocity threshold nor the supply vo ltage must be considerably changed during the phase while the chopper is switched to a different mode, because otherwise, the motor might lose steps or the instantaneous current might be too high or too low. A motor stall or a sudden change in the motor velocity may lead to the driver detecting a short circuit or to a state of automatic current regulation, from which it cannot recover. Clear the error flags and restart the motor from zero velocity to recover from this situation. Start the motor from standstill when switching on StealthChop2 the first time and keep it stopped for at least 128 chopper periods to allow StealthChop2 to do the initial standstill current control. Flags in StealthChop2 As StealthChop2 uses voltage mode driving, status flags based on current measurement respond slower, respectively, the driver reacts delayed to sudden changes of back-EMF, like on a motor stall. A motor stall, or abrupt stop of the motion during operation in StealthChop2 can lead to an overcurrent condition. Depending on the previous motor velocity, and on the coil resistance of the motor, it significantly increases motor current for several 10ms. With low velocities, where the back -EMF is just a fraction of the supply voltage, there is no danger of triggering the short detection. Switch the driver stage to the lowest current range (DRV_CONF.current_range) supporting the motor. This automatically adapts the overcurrent threshold in three steps, and thus, reduces peak currents in case of a sudden motor stall. Open Load Flags In StealthChop2 mode, the status information is different compared to the cycle -by-cycle regulated SpreadCycle mode for the flags OLA and OLB.

• If OLA and OLB are not set, the current regulation reaches the nominal current on both coils.
• If OLA and OLB flags are constant, an interrupted motor coil occurs.
• If OLA and OLB are flickering, differences in the motor coil resistance occur, exceeding roughly 5%.
• One or both flags are active, if the current regulation does not succeed in scaling up to the full target current within the last few fullsteps (because no motor is attached or a high velocity exceeds the PWM limit). If desired, do an on -demand open load test using the SpreadCycle chopper as it delivers the safest result. With StealthChop2, PWM_SCALE_SUM can be checked to detect the correct coil resistance. PWM_SCALE_SUM Informs about the Motor State Information about the motor state is available with automatic scaling by reading out PWM_SCALE_SUM. As this parameter reflects the actual voltage required to drive the target current into the motor, it depends on several factors: motor load, coil resistance, supply voltage, and current setting. Therefore, an evaluation of the PWM_SCALE_SUM value allows checking the motor operation point. When reaching the limit (1023), the current regulator cannot sustain the full motor current, for example, due to a permanent or temporary drop in supply voltage. Freewheeling and Passive Braking StealthChop2 provides different options for motor standstill. These options can be enabled by setting the standstill current IHOLD to zero and choosing the desired option using the FREEWHEEL setting. The desired option is enabled after a time period specif ied by TPOWERDOWN and IHOLDDELAY. The current regulation is frozen once the motor target

continuous torque is applied. The following table contains all parameters related to the StealthChop2 chopper mode. Table 12. Parameters Controlling StealthChop2

0 Current regulation always

the value to yield a lower current jerk.

0 Forward-controlled mode

1 Automatic scaling with

Enable automatic tuning of PWM_GRAD_AUTO.

0 Disable, use PWM_GRAD

1 Enable

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 38 PWM_REG User-defined PWM amplitude regulation loop P- coefficient. A higher value leads to a higher adaptation speed when pwm_autoscale = 1. Default = 4 1 … 15 Results in 0.5 to 7.5 steps for PWM_SCALE_AUTO regulator per fullstep. PWM_OFS User-defined PWM amplitude (offset) for velocity- based scaling and initialization value for automatic tuning of PWM_OFFS_AUTO. Default = 0x1D 0 … 255 PWM_OFS = 0 disables linear current scaling based on current setting. PWM_GRAD User-defined PWM amplitude (gradient) for velocity- based scaling and initialization value for automatic tuning of PWM_GRAD_AUTO. Default = 0 0 … 255 PWM_SCALE_SUM Actual PWM scaling as determined by the actual settings. This value is shown in higher precision (10- bit) compared to 8-bit for PWM_GRAD/OFS_AUTO values. Default = 0 0 ... 1023 FREEWHEEL Standstill option when motor current setting is zero (I_HOLD = 0). Only available with StealthChop2 enabled. The freewheeling option makes the motor easily movable, while both coil short options realize a passive brake. Default = 0

0 Normal operation

1 Freewheeling

2 Coil short using LS drivers

3 Coil short using HS drivers

PWM_SCALE _AUTO Read back of the actual StealthChop2 voltage PWM scaling correction, as determined by the current regulator. Shall regulate close to 0 during tuning. Default = 0 -255 … 255 (Read-only) Scaling value is frozen when operating in SpreadCycle. PWM_GRAD _AUTO PWM_OFS _AUTO Allow monitoring of the automatic tuning and determination of initial values for PWM_OFS and PWM_GRAD. Default = 0 0 … 255 (Read-only) TOFF General enable for the motor driver. The actual value does not influence StealthChop2. Default = 0

0 Driver off

1 … 15 Driver enabled TBL Comparator blank time. Choose a setting of 1 or 2 for typical applications. For higher capacitive loads, 3 may be required. Lower settings allow StealthChop2 to regulate down to lower coil current values. Default = 2 0 16 tCLK 1 24 tCLK 2 36 tCLK 3 54 tCLK SpreadCycle and Classic Chopper While StealthChop2 is a voltage -mode PWM -controlled chopper, SpreadCycle is a cycle -by-cycle current control. Therefore, it can react extremely fast to changes in motor velocity or motor load. The currents through both motor coils are controlled using chop pers. The choppers work independent of each other. The following figure shows the different chopper phases.

Figure 16. Typical Chopper Decay Phases coil reaches the target current. The fast decay phase may be terminated by either the comparator or another timer. measured. Blanking is the time when the input to the comparator is masked to block these spikes. noise. A higher frequency reduces current ripple in the motor, but with a too high frequency, magnetic losses may rise. Hint: A chopper frequency in the range of 25kHz to 40kHz gives a good result for most motors when using SpreadCycle. A higher frequency leads to increased switching losses. Table 13. Parameters Controlling SpreadCycle and Classic Constant Off-Time StealthChop2 only, any setting is OK.

0 Chopper off

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 40 Setting this parameter to zero completely disables all driver transistors and the motor can freewheel. Default = 0 TBL Selects the comparator blank time. This time must safely cover the switching event and duration of the ringing. For most applications, a setting of 1 or 2 is good. For highly capacitive loads, for example, when filter networks are used, a setting of 2 or 3 is required. Default = 2 16 tCLK Restriction: Use this setting only in combination with an external clock oscillator <= 8MHz. 24 tCLK Restriction: May be used with internal clock, or if external clock frequency <=13MHz is applied. 2 36 tCLK 3 54 tCLK chm Selecting the chopper mode. Default = 0

0 SpreadCycle

1 Classic constant off-time

The SpreadCycle (patented) chopper algorithm is a precise and simple -to-use chopper mode, which automatically determines the optimum length for the fast decay phase. The SpreadCycle provides superior microstepping quality even with default settings. Several parameters are available to optimize the chopper to the application. Each chopper cycle comprises an on-phase, a slow decay phase, a fast decay phase, and a second slow decay phase. The two slow decay phases and the two blank times per chopper cycle put an upper limit to the chopper frequency. The slow decay phases typicall y make up for about 30% to 70% of the chopper cycle in standstill and are important for low motor and driver power dissipation. Example: Calculation of a starting value for the slow decay time TOFF: Target chopper frequency: 25kHz TOFF = (1kHz/25kHz) × (50/100) × 1/2 = 10µs Assumption: Two slow decay cycles make up for 50% of the overall chopper cycle time. For the TOFF setting, this means: TOFF = (TOFF × fCLK − 24)/32. With a 12MHz clock, this results in TOFF = 3.0, which requires a setting of TOFF = 3. With a 16MHz clock, this results in TOFF = 4.25, which requires a setting of TOFF = 4. Hint: Highest motor velocities sometimes benefit from setting TOFF to 1 or 2 and a short TBL setting. The hysteresis start setting forces the driver to introduce a minimum amount of current ripple into the motor coils. The current ripple must be higher than the current ripple, which is caused by resistive losses in the motor to give the best microstepping results. This allows the chopper to precisely regulate the current for both the rising and falling target current. The time required to introduce the current ripple into the motor coil also reduces the chopper frequency. Therefore, a higher hysteresis sett ing leads to a lower chopper frequency. The motor inductance limits the ability of the chopper to follow a changing motor current. Further, the duration of the on-phase and the fast decay must be longer than the blanking time, because the current comparator is disabled during blanking. It is easiest to find the best setting by starting from a low hysteresis setting (example, HSTRT = 0, HEND = 0) and increasing HSTRT, until the motor runs smoothly at low velocity settings. This can best be checked when measuring the motor current with a current probe. Checking the sine wave shape near the zero transition shows a small ledge between both the half waves in case the hysteresis setting is too small. At medium velocities (example, 100 fullsteps to 400 fullsteps per second), a too low hysteresis setting leads to increased humming and vibration of the motor. A too high hysteresis setting leads to reduced chopper frequency and increased chopper noise but does not yield any benefit for the wave shape. As experiments show, the setting is quite independent of the motor because higher current motors typically also have a lower coil resistance. Therefore, choosing a low to medium default value for the hysteresis (for example, effective hysteresis = 4) normally fits most applications. The setting can be optimized by experimenting with the motor: a too low

setting if this is hard to reach. frequency from reaching the audible range. Figure 17. SpreadCycle Chopper Scheme Showing Coil Current during a Chopper Cycle Table 14. SpreadCycle Mode Parameters Even at HSTRT = 0 and HEND = 0, the TMC2241 sets a minimum hysteresis using analog circuitry.

Figure 18. Classic Constant Off-Time Chopper with Offset Showing Coil Current fast decay phase makes the absolute value of the motor current lower than the target current (see the following figures). makes a larger microstep. Typically, a positive offset setting is required for smoothest operation. Figure 19. Zero Crossing with Classic Chopper and Correction Using Sine Wave Offset Table 15. Parameters Controlling the Constant Off-Time Chopper Mode portion of fast decay for each chopper cycle.

0 Slow decay only

wave offset. A positive offset corrects for zero crossing error.

3 No offset: 0

0 Enable comparator termination

1 End by time only

higher negative value than the actual positive value. scaling as well as the current ramp up and down. Table 16. Parameters Controlling the Motor Current current value set by CoolStep. Identical to IRUN, but for motor in standstill. resistor RREF and CURRENT_RANGE in DRV_CONF. CoolStep or scaling to different situations using IRUN. as any change invalidates StealthChop tuning results. adaption of the driver current to the selected motor. Typically, use the lowest setting fitting the motor. reduction delay per current step in multiples of 218 clocks. current steps are required to reduce hold current.

0 Instant power down to IHOLD

jump on the power supply current. The full-scale current IFS is a peak current setting. The full-scale current is selected with an external reference resistor and two bits in the DRV_CONF register. A standard low-power resistor with 1% accuracy is sufficient. Three different full-scale current ranges can be configured to adapt to different motor sizes and applications. This is needed to benefit from a best possible current control resolution. Therefore, connect a resistor from IREF to GND to set the full-scale chopping current IFS. range based on the external resistor. DRV_CONF register bit setting. external resistor RREF can range between 12kΩ and 60kΩ. This equation gives the RMS motor current per coil.

• CS is IRUN or IHOLD, respectively. IRUN is scaled down by CoolStep.
• 248/256 is the amplitude of the default microstep table (up to 255 may be used with StealthChop only).
• GLOBALSCALER is in the range of 1 to 256 (256 corresponds to a setting of GLOBALSCALER = 0).
• 1/SQRT(2) is the factor to calculate the RMS value for a sine wave shape.

Table 17. IFS Full-Scale Peak Range Settings (Example for RREF = 12kΩ) 11 36 3A 0.31Ω Optimized efficiency and extended operating range up to 3A (FS). 10 36 3A 0.31Ω Optimized efficiency and extended operating range up to 3A (FS). 01 24 2A 0.37Ω Reduced operating range up to 2AFS. When high accuracy at lower current is required. 00 (default) 11.75 1A 0.53Ω Reduced operating range up to 1AFS. When high accuracy at low current is required.

the full-scale current. The resulting maximum RMS current is given in each cell. Table 18. IFS Full-Scale RMS Current in Ampere (ARMS) Based on DRV_CONF Bits The TMC2241 allows the configuration of different chopper modes and modes of operation for optimum motor control.

Table 19. Velocity-Based Mode Control Parameters clocks after the last step pulse. value is (220) - 1 in case of overflow or standstill.

• StealthChop2 PWM mode is enabled, if configured. Default: 0 1048575 Setting to control the upper velocity threshold for operation in StealthChop2. TCOOLTHRS TCOOLTHRS ≥ TSTEP ≥ THIGH:
• StallGuard2 and CoolStep are enabled, if configured.
• StealthChop2 voltage PWM mode is disabled. TCOOLTHRS ≥ TSTEP
• StallGuard2 stall output signal is enabled (if configured) for use with external controller. Default: 0 1048575 Setting to control the lower velocity threshold for operation with CoolStep and StallGuard2. THIGH TSTEP ≤ THIGH:
• CoolStep is disabled (motor runs with normal current scale).
• StealthChop2 voltage PWM mode is disabled.
• If vhighchm is set, the chopper switches to chm = 1 with TFD = 0 (constant off time with slow decay, only).
• Chopper sync is switched off (SYNC = 0).
• If vhighfs is set, the motor operates in fullstep mode and the stall detection is switched over to fullstep stall detection. Default: 0 1048575 Setting to control the upper threshold for operation with CoolStep and StallGuard2 as well as optional high velocity step mode. small_ hysteresis Hysteresis for step frequency comparison based on TSTEP (lower velocity threshold) and (TSTEP × 15/16) – 1, respectively, (TSTEP × 31/32) - 1 (upper velocity threshold). Default: 0 0 Hysteresis is 1/16. 1 Hysteresis is 1/32. vhighfs This bit enables switching to fullstep, when VHIGH is exceeded. Switching takes place only at 45° position. The fullstep target current uses the current value from the microstep table at the 45° position. Default: 0 0 No switch to fullstep. 1 Fullstep at high velocities. vhighchm 0 No change of chopper mode.

operation to avoid doubling of the chopper frequency. thresholds). Switch from off to on state while in standstill only.

0 No StealthChop2

1 StealthChop2 active if configured

threshold (SGTHRS) such that SG_RESULT reaches 0 (or near to 0) when the motor is overloaded/stalls. AND INDICATES DANGER OF STALL. Figure 21. Function Principle of StallGuard2

Table 20. StallGuard2-Related Parameters

0 Indifferent value

0 Standard mode

1 Filtered mode

specific motor type and operating conditions is interactive tuning in the actual application.

• Operate the motor at the normal operation velocity, supply voltage, and current setting for the application and monitor SG_RESULT.
• Apply slowly increasing mechanical load to the motor. If the motor stalls before SG_RESULT reaches zero, decrease SGT. If SG_RESULT reaches zero before the motor stalls, increase SGT. A good SGT starting value is zero. SGT is signed. So, it can have negative or positive values.
• Now enable sg_stop and make sure the motor is safely stopped whenever it is stalled. Increase SGT if the motor is stopped before a stall occurs. Restart the motor by disabling sg_stop or by clearing event_stop_sg in the RAMP_STAT register (write to clear).
• The optimum setting is reached when SG_RESULT is between 0 and roughly 100 at increasing load shortly before the motor stalls, and SG_RESULT increases by 100 or more without load. SGT in most cases can be tuned for a certain motion velocity or a velocity r ange. Make sure the setting works reliably in a certain range (example, 80% to 120% of desired velocity) and also under extreme motor conditions (lowest and highest applicable temperature). Optional procedure allowing automatic tuning of SGT: The basic idea behind the SGT setting is a factor, which compensates the StallGuard measurement for resistive losses inside the motor. At standstill and very low velocities, resistive losses are the main factor for the balance of energy in the motor, because mechanical power is zero or near to zero. This way, SGT can be set to an optimum at near zero velocity. This algorithm is especially useful for tuning SGT within the application to give the best result independent of environment conditions, motor stray, etc.
• Operate the motor at low velocity < 10 RPM (that is, a few to a few fullsteps per second) and target operation current and supply voltage. In this velocity range, there is not much dependence of SG_RESULT on the motor load, because the motor does not generate significant back-EMF. Therefore, mechanical load does not make a big difference on the result.
• Switch on sfilt. Now increase SGT starting from 0 to a value, where SG_RESULT starts rising. With a high SGT, SG_RESULT rises to the maximum value. Reduce again to the highest value, where SG_RESULT stays at 0. Now the SGT value is set as sensibly as possible. When the SG_RESULT is increasing at higher velocities, there is useful stall detection.

• SG_RESULT goes to zero when the motor stalls. Set TCOOLTHRS to match the lower velocity threshold, where StallGuard delivers a good result to use sg_stop. The upper velocity for the stall detection with this setting is determined by the velocity where the motor back -EMF approaches the supply voltage and the motor current starts dropping when further increasing velocity. The system clock frequency affects SG_RESULT. An external crystal-stabilized clock should be used for applications that demand the highest performance. The power supply voltage also affects SG_RESULT. So, tighter regulation results in more accurate values. SG_RESULT measurement has a high resolution, and there are a few ways to enhance its accuracy, as described in the following sections. Variable Velocity Limits TCOOLTHRS and THIGH The SGT setting chosen as a result of the previously described SGT tuning can be used for a certain velocity range. Outside this range, a stall may not be detected safely, and CoolStep might not give the optimum result. In many applications, operation at or near a single operation point is used most of the time and a single setting is sufficient. The driver provides a lower and an upper velocity threshold to match this. The stall detection is disabled outside the determined operation point, for example, during acceleration phases preceding a sensorless homing procedure when setting TCOOLTHRS to a matching value. An upper limit can be specified by THIGH. The velocity limits VHIGH and VCOOLTHRS are determined by the settings THIGH and TCOOLTHRS. In some applications, a velocity dependent tuning of the SGT value can be expedient, using a small number of support points and linear interpolation. BACK EMF REACHES SUPPLY VOLTAGE OPTIMUM SGT SETTING MOTOR RPM (FOR A 200 FULLSTEP MOTOR) StallGuard2 READING AT NO LOAD 100 200 300 400 500 600 700 800 900 1000 0 0 50 100 150 200 250 300 350 400 450 500 550 600 LOWER LIMIT FOR STALL DETECTION GOOD OPERATING RANGE WITH SINGLE SGT SETTING

Figure 22. Example: Optimum SGT Setting and StallGuard2 Reading with an Example Motor varying motor currents, especially at low currents. For these motors, check the current dependency for the best result. as motor efficiency is reduced. of the unit -to-unit variation in StallGuard2 measurements results from manufacturing tolerances in motor construction.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 51 stallGuard2 measurement error = +/- max.(1, |SGT|) StallGuard2 Update Rate and Filter The StallGuard2 measurement value SG_RESULT is updated with each fullstep of the motor. This is enough to safely detect a stall because a stall always means the loss of four fullsteps. In a practical application, especially when using CoolStep, a more precise measurement might be more important than an update for each fullstep because the mechanical load never changes instantaneously from one step to the next. For these applications, the sfilt bit enables a filtering function over four load measurements. The filter should always be enabled when high-precision measurement is required. It compensates for variations in motor construction, for example, due to misalignment of the phase A to phase B magnets. The filter should be disabled when a rapid response to i ncreasing load is required and for best results of sensorless homing using StallGuard. Detecting a Motor Stall For best stall detection, work without StallGuard2 filtering (sfilt = 0). To safely detect a motor stall, the stall threshold must be determined using a specific SGT setting. Therefore, the maximum load must be determined, which the motor can drive without stalling. At the same time, monitor the SG_RESULT value at this load, for example, some value within the range 0 to 100. The stall threshold should be a value safely within the operating limits for parameter stray. The response at an SGT setting at or near 0 gives some idea on the quality of the signal: check the SG_RESULT value without load and with maximum load. These should show a difference of at least 100 or a few 100, which are largely compared to the offset. If the SGT value is set in a way that a r eading of 0 occurs at maximum motor load, the stall can be automatically detected to issue a motor stop. In the moment of the step resulting in a step loss, the lowest reading is visible. After the step loss , the motor vibrates and shows a higher SG_RESULT reading. Homing with StallGuard2 The homing of a linear drive requires moving the motor into the direction of a hard stop. As StallGuard2 needs a certain velocity to work (as set by TCOOLTHRS), make sure the start point is far enough away from the hard stop to provide the distance required for the acceleration phase. After setting up SGT, start a motion in the direction of the hard stop and activate the stop on stall function (set sg_stop in SW_MODE). The stop condition also is indicated by the flag StallGuard in DRV_STATUS. After setting up new motion parameters to prevent the motor from restarting right away, StallGuard2 can be disabled, or the motor can be re -enabled by reading RAMP_STAT. The read and clear function of the event_stop_sg flag in RAMP_STAT restart the motor after the expir ation of TZEROWAIT in case the motion parameters are not modified. Limits of StallGuard2 Operation StallGuard2 does not operate reliably at extreme motor velocities: Very low motor velocities (for many motors, less than 1Rps) generate a low back -EMF and make the measurement unstable and dependent on environment conditions (temperature, etc.). The automatic tuning procedure described earlier compensates for this. Other conditions also lead to extreme settings of SGT and poor response of the measurement value SG_RESULT to the motor load. Very high motor velocities, in which the full sinusoidal current is not driven into the motor coils, also leads to poor response. These velocities are typically characterized by the motor back-EMF reaching the supply voltage. StallGuard4 Load Measurement StallGuard4 is optimized for operation with StealthChop2, while its predecessor StallGuard2 works with SpreadCycle. Anyway, the function is similar: both deliver a load value, going from a high value at low load, and to a low value at high load. While StallGuard2 is tuned to show a “0” reading for stall detection, StallGuard4 uses a comparison value to trigger stall detection, rather than shifting the measurement result by applying an offset. StallGuard4 provides an accurate measurement of the load on the motor and can be used for stall detection, load estimation, as well as CoolStep load -adaptive current reduction. The StallGuard4 measurement value changes linearly over a wide range of load, v elocity, and current settings, as shown in the following figure. When approaching maximum motor load, the value goes down to a motor -specific lower value. This corresponds to a load angle of 90° between the magnetic field of the coils and magnets in the rotor. This also is the most energy-efficient point of operation for the motor. To use StallGuard4, check the sensitivity of the motor at border conditions. Attention: Unlike with TMC2240 and TMC5240, SG4_THRS covers the full 9-bit range of SG4_RESULT by doubling the value of SG4_THRS for comparison.

Figure 23. StallGuard4 Mode of Operation Table 21. StallGuard4-Related Parameters

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 53 sg4_filt_en 0: Unfiltered operation, SG4_RESULT updates with each fullstep 1: Filtered operation, SG4_IND_0...3 available, SG4_RESULT gives the average of last four SG4_IND_x measurements. 0: Filter off 1: Filtered operation, SG4_IND values available sg_angle_offset This flag enables optimized switching between StealthChop2 and SpreadCycle by using the SG4_RESULT to determine the phase lag in StealthChop2 and compensate for the phase jump when switching from voltage-controlled to current- controlled operation in SpreadCycle. The phase offset is stored and is subtracted again when switching back to StealthChop2. 0: No angle correction 1: Optimized switching between StealthChop2 and SpreadCycle. Tuning StallGuard4 The StallGuard4 value SG4_RESULT is affected by motor -specific characteristics and application -specific demands on load, coil current, and velocity. Therefore, the easiest way to tune the StallGuard4 threshold SG4_THRS for a specific motor type and operating conditions is interactive tuning in the actual application. The initial procedure for tuning StallGuard SG4_THRS is as follows:

• Operate the motor at the normal operation velocity for the application and monitor SG4_RESULT.
• Apply slowly increasing mechanical load to the motor. Check the lowest value of SG4_RESULT before the motor stalls. Use this value as starting value for SG4_THRS (apply half of the value).
• Now, monitor the StallGuard output signal through the DIAG output (also set TCOOLTHRS to match the lower velocity limit for operation) and stop the motor when a pulse is seen on the respective output. Make sure the motor is safely stopped whenever it is stalled. Increase SG4_THRS if the motor is stopped before a stall occurs.
• The optimum setting is reached when a stall is safely detected and leads to a pulse at DIAG in the moment where the stall occurs. SG4_THRS in most cases can be tuned for a certain motion velocity or a velocity range. Make sure the setting works reliablly in a certain range (for example, 80% to 120% of the desired velocity) and under extreme motor conditions (lowest and highest applicable temperature). DIAG is pulsed by StallGuard, when SG4_RESULT falls below 2 × SG4_THRS. It is only enabled in StealthChop2 mode, and when TCOOLTHRS ≥ TSTEP > TPWMTHRS. The external motion controller should react to a single pulse by stopping the motor, if desired. Set TCOOLTHRS to match the lower velocity threshold where StallGuard delivers a good result. SG4_RESULT measurement has a high resolution, and there are a few ways to enhance its accuracy, as described in the following sections. StallGuard4 Update Rate The StallGuard4 measurement value SG4_RESULT is updated with each fullstep of the motor. This is enough to safely detect a stall because a stall always means the loss of four fullsteps. StallGuard4 provides two options for measurement:
• sg4_filt_en = 0: A single measurement, updated after each fullstep, and valid for each one fullstep. This measurement allows quickest reaction to load variations, as SG4_RESULT is fully updated with each zero transmission of a coil voltage. Therefore, it is optimum for stall detection with a hard obstacle.
• sg4_filt_en = 1: In this mode, four individual signals are generated: SG4_IND_0 upon falling 0-transition of the cosine wave (coil A), SG4_IND_1 upon rising 0-transition of the cosine wave, SG4_IND_2 upon falling 0-transition of the sine wave (coil B), and SG4_IND_3 upon rising 0 -transition of the sine wave. The actual value for SG4_RESULT is the mean value of all four measurements, updated once each fullstep. With this, each fullstep has an influence of 25% only on the overall result. This mode is perfect for detecting soft obstacles, or for usage of CoolStep on imprecise motors. In filtered mode, sensitivity to a sudden load increase (hard motor blockage) is reduced.

SG4_RESULT rather than comparing to a fixed threshold. This rules out certain effects that influence the absolute value. response. These velocities are typically characterized by the motor back-EMF exceeding the supply voltage. the chopper mode being used) must be tuned before use. A single tuning does not cover all operating points. CoolStep is controlled by several parameters, but two are critical for understanding how it works. Table 22. CoolStep Critical Parameters

0 Disable CoolStep

Figure 24 shows the operating regions of CoolStep.

• The black line represents the SG_RESULT measurement value.
• The blue line represents the mechanical load applied to the motor.
• The red line represents the current into the motor coils. When the load increases, SG_RESULT falls below SEMIN × 32, and CoolStep increases the current. When the load decreases, SG_RESULT rises above (SEMIN + SEMAX + 1) × 32, and the current is reduced.

Figure 24. CoolStep Adapts Motor Current to the Load Table 23. CoolStep Additional Parameters and Status Information lower threshold as set by SEMIN. decrement of the motor current. by scaling the IRUN current setting. reduction down to 25% is desired. Lower velocity threshold for switching on CoolStep. VCOOLTHRS identical to VMAX. where StallGuard2/StallGuard4 gives a stable result. like switching to fullstepping.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 56 Tuning CoolStep Before tuning CoolStep in conjunction with SpreadCycle, first tune the StallGuard2 threshold level SGT, which affects the range of the load measurement value SG_RESULT. CoolStep uses SG_RESULT to operate the motor near the optimum load angle of +90°. In co njunction with StealthChop2, CoolStep uses SG4_RESULT. In this mode, the leveling is done through SEMIN. The current increment speed is specified in SEUP, and the current decrement speed is specified in SEDN. They can be tuned separately because they are triggered by different events that may need different responses. The encodings for these parameters allow the coil currents to be increased much more quickly than decreased, because crossing the lower threshold is a more serious event that may require a faster response. If the response is too slow, the motor may stall. In contrast, a slow response to crossing the upper threshold does not risk anything more serious than missing an opportunity to save power. CoolStep operates between limits controlled by the current scale parameter IRUN and the seimin bit. Response Time For fast response to increasing motor load, use a high current increment step SEUP. If the motor load changes slowly, a lower current increment step can be used to avoid motor oscillations. If the filter controlled by sfilt is enabled, the measurement rate and regulation speed are cut by a factor of four. Advice: The most common and beneficial use is to adapt CoolStep for operation at the typical system target operation velocity and to set the velocity thresholds accordingly. As acceleration and decelerations normally can be quick, these require the full motor current, while they have only a small contribution to the overall power consumption due to their short duration. Low Velocity and Standby Operation Because CoolStep is not able to measure the motor load in standstill and at very low RPM, a lower velocity threshold is provided in the ramp generator. It should be set to an application-specific default value. Below this threshold, the normal current setting through IRUN, respectively, IHOLD is valid. An upper threshold is provided by the VHIGH setting. The velocity limits VHIGH and VCOOLTHRS are determined by the settings THIGH and TCOOLTHRS. Both thresholds can be set as a result of the StallGuard2 and StallGuard4 tuning process. Diagnostic Outputs The DIAG outputs deliver a position compare signal to allow the exact triggering of external logic, and an interrupt signal to trigger the software to certain conditions. Either an open drain (active low) output signal can be chosen (default, GCONF register, bit diag0_int_pushpull = 0), or an active high push -pull output signal (GCONF register, bit diag0_int_pushpull = 1). When using the open drain output, multiple driver output signals can be ORed. An external pullup resistor in the range 4.7kΩ to 100kΩ is required. DIAG0 also is driven low upon a reset condition. However the end of the reset condition cannot be determined by monitoring DIAG0 in this configuration, because the event_pos_reached flag also is active upon reset, and thus, the pin stays activel y low after the reset condition. To safely determine a reset condition, monitor the reset flag by SPI or read out any register to confirm the chip is powered up. For more flexibility, an additional register DIAG_CONF is added to the TMC2241. Setting bits in this register enables free assignment of signals independently for each diagnostic output DIAG0/1.

Figure 25. Diagnostic Outputs Configuration Options

• Microstepping – extremely improved with low cost motors.
• Motor – runs smooth and quiet.
• Torque – reduced mechanical resonances yield improved torque.
• Low frequency motor noise - reduced by adapting the sine and cosine wave shift for the actual motor's manufacturing tolerance. Microstep Table To minimize the required memory and the amount of data to be programmed, only a quarter of the wave is stored. The internal microstep table maps the microstep wave from 0° to 90°. It is symmetrically extended to 360°. When reading out the table, the 10 -bit microstep counter MSCNT addresses the fully extended wave table. The table is stored in an incremental fashion, using each one bit per entry. Therefore, only 256 bits (ofs00 to ofs255) are required to store the quarter wave. These bits are mapped to eight 32-bit registers. Each ofs bit controls the addition of an inclination Wx or Wx + 1 when advancing one step in the table. When Wx is 0, a 1 bit in the table at the actual microstep position means “add one” when advancing to the next microstep. As the wave can have a higher inclination than 1, the base inclinations Wx can be programmed to -1, 0, 1, or 2 using up to four flexible programmable segments within the quarter wave. This way, even a negative inclination can be realized. The four inclination segments are controlled by the position registers X1

1 goes from X1 to X2-1 with its base inclination controlled by W1, etc. the best possible resolution while leaving headroom for the hysteresis-based chopper to add an offset. Figure 26. LUT Programming Example Two registers control the starting values of the tables.

• As the starting value at zero is not necessarily 0 (it can be 1 or 2), it can be programmed into the starting point register START_SIN.
• Similarly, the start of the second wave for the second motor coil must be stored in START_SIN90. This register stores the resulting table entry for a phase shift of 90° for a two-phase motor. To adapt for motor tolerances, the phase shift can be modified f rom 90° (256 microsteps) to anywhere between 45° and 135° by adding a microstep offset in the range of -127 to +127 (register OFFSET_SIN90). Motor tolerance requires moderate adaptations to a few 10 steps (maximum). The required correction offset can be fo und using StallGuard4 individual values SG4_IND and trimming the offset until both coils give a symmetrical result.

Figure 27. Shifting the Cosine Wave through OFFSET_SIN90 If phase A value is > phase B value, increment OFFSET_SIN90, otherwise decrement. Repeat until best match is found. +17, use START_SIN90 = 246. START_SIN is always 0.

the encoder gives this signal once for each revolution.

• Option 1: Check ENC_LATCH for change. It starts up with 0, and shows the encoder count where the N -event occurred, after starting motion for the first time. For consecutive rotations, it shows increased/decreased values, and thus, always changes.
• Option 2: Check for the interrupt output active and read the flag only following the active interrupt output. The DIAG0 pin must be configured for the interrupt lines using the bit diag0_nint_step from the GCONF register. Some encoders require a validation of the N signal by a certain configuration of A and B polarity. This can be controlled by the pol_A and pol_B flags in the ENCMODE register. For example, when both pol_A and pol_B are set, an active N - event is only accepted during a high polarity of both A and B channels. For clearing the encoder position ENC_POS with the next active N-event, set clr_enc_x = 1 and clr_once = 1, or clr_cont = 1. A B t POSITION -4 -3 -2 -1 0 5 64321 7 N

Figure 28. Outline of ABN Signals of an Incremental Encoder of the signals A, B, and N consider active low and active high signals found with different types of encoders. register ENC_LATCH always stores the actual encoder position on an N signal event.

• Encoder factor of 1.0: ENC_CONST = 0x0001.0x0000 = FACTOR.FRACTION
• Encoder factor of -1.0: ENC_CONST = 0xFFFF.0x0000. This is the two’s complement of 0x00010000. It equals (216 - (FACTOR + 1)) × (216 - FRACTION).
• Decimal mode encoder factor 25.6: 00025.6000 = 0x0019.0x1770 = FACTOR.DECIMALS (DECIMALS = first four digits of fraction)
• Decimal mode encoder factor -25.6: (216 – (25 + 1)) × (10000 - 6000) = (216 – 26) × (4000) = 0xFFE6.0x0FA0
• A negative encoder constant is calculated using the following equation: (216 - (FACTOR + 1)) × (10000 - DECIMALS)

• USC = 256 microsteps
• FSC = 200 fullstep motor
• Factor = FSC x USC/encoder resolution

Table 24. Encoder Example Settings for a 200 Fullstep Motor with 256 Microsteps Exact match with decimal setting. 1000 51.2 Exact match with decimal setting. 4000 12.8 Exact match with decimal setting. (in case StealthChop2 is in use). The reset and sleep mode are controlled with the SLEEPN pin. A short pulse on SLEEPN with a duration >30µs results in a chip reset (also visible at the diagnostics outputs). Very short pulses < 30µs are filtered out and do not have an effect on operation. If SLEEPN is kept at GND, the IC goes into low-power standby state (sleep mode). All internal supplies are switched off. After power-up or leaving sleep mode and reset condition, the registers must be reconfigured. While reconfiguring the IC, it is advised to still hold the bridge drivers disabled with DRV_ENN. If not used, connect to VS or VCC_IO (this is a high-voltage pin).

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 62 Protections and Driver Diagnostics The TMC2241 drivers supply a complete set of diagnostic and protection capabilities, like short -to-GND protection and undervoltage detection. A detection of an open load condition allows testing if a motor coil connection is interrupted. See the DRV_STATUS register table for details. Besides the status flags, the TMC2241 allows measurement and readout of the chip temperature as well as feedback on the motor phase winding temperature. For improved system reliability and overall circuit protection, the TMC2241 contains an overvoltage comparator and a trigger output OV to control external switches in terms of excessive supply voltage increase. Overcurrent Protection Overcurrent protection (OCP) protects the device against short circuits to the rails (supply voltage and ground) and between the outputs (OUT1A, OUT2A, OUT1B, OUT, and 2B). The OCP threshold depends on the selected full -scale current range or see the Electrical Characteristics table for the respective threshold values. The full-scale range is selected with the CURRENT_RANGE parameter in the DRV_CONF register. If the output current is greater than the OCP threshold for longer than the deglitch time (blanking time), then an OCP event is detected. When an OCP event is detected, the H-bridge is immediately disabled. The short protection tries thrice before a fault flag (s2ga, s2gb, ss 2vsa, and s2vsb in DRV_STATUS register) is set and the bridge is continuously disabled. The device is still alive and allows for configuration and status readout. To re-enable the power bridge, the DRV_ENN pin must be cycled. Another option is to disable the power bridge with TOFF = 0 in CHOPCONF and re-enable the bridges with TOFF > 0. Thermal Protection and Shutdown The TMC2241 has an internal thermal protection. If the die temperature exceeds 165°C (typical value), a fault indication as a fault flag (ot in DRV_STATUS) is raised and the driver is three -stated until the junction temperature drops below approximately 145°C (typical value). After that, the driver is re-enabled. In addition, the TMC2241 supports ADC-based configurable thermal prewarning levels. This can be configured in the register OTW_OV_VTH using the parameter OVERTEMPPREWARNING_VTH. The ADC senses the chip average temperature, while the driver stages may be at a much higher temperature. This is only to specify that the TMC2241 can go into thermal shutdown and the prewarning may not be asserted, even if it is set at a low temperature. Heat is mainly generated by the motor driver stages, and at increased voltage, by the internal voltage regulator. Most critical situations, where the driver MOSFETs can be overheated, are avoided when enabling the short-to-GND protection. For many applicat ions, the overtemperature prewarning indicates an abnormal operation situation and can be used to initiate user warning or power reduction measures like motor current reduction. The thermal shutdown is just an emergency measure and temperature rising to the shutdown level should be prevented by design. Temperature Measurement The TMC2241 offers functions to measure the internal chip temperature as well as the motor temperature. These diagnostic functions can be helpful in applications to monitor the chip or PCB temperature and the motor temperature development over time to increase system robustness or gather additional information for predictive maintenance. Chip Temperature Measurement Besides the overtemperature prewarning and overtemperature flags, the chip temperature itself can be determined using the ADC_TEMP parameter in the ADC_TEMP register. The final temperature in degree Celsius can be calculated using the following formula: 𝑇𝐸𝑀𝑃[℃] = 𝐴𝐷𝐶𝑇𝐸𝑀𝑃 − 2038 7.7

cycle depends on the phase resistance of the motor. and monitor changes in the motor temperature over time. This measurement is preferably done during motor standstill or slow movements. Typically, the motor temperature does not change quickly. a high velocity, or when the motor stalls. This voltage is fed back to the supply rails by the driver output stage. be substantial, so that the power capacitors and circuit consumption are not sufficient to keep the supply within its limits. To protect the driver as well as connected circuitry, the TMC2241 has an overvoltage detection and protection mechanism. The supply voltage is permanently monitored with the internal ADC. The OV output pin shows the actual state of the overvoltage monitor. The OV output pin is an open-drain pin. Figure 29 shows an example of a brake chopper circuit. Take special care if the device is put into sleep mode (SLEEPN = LOW). In this case, OV is floating. Figure 29. Brake Chopper Circuit Example

Once a short condition is safely detected, the corresponding driver bridge is switched off, and the s2ga or s2gb flag is set. network of external components may be involved. Therefore, short circuits should basically be avoided. Table 25. Overcurrent Protection Thresholds Based on the Full-Scale Current flag. In motor standstill, open load cannot be measured as the coils might eventually have zero current. The TMC2241 features an UVLO protection for VS, VCC_IO, and the charge pump. The UVLO condition on VS is triggered below 4.05V (max). The UVLO condition on VCC_IO is triggered below 1.95V (max). actively set to 1 to clear it. The chip has internal ESD protection on every pin. at least 1µF on the positive voltage supply (VS pins). This is not protection against the hot plugging of a motor. The TMC2241 offers an external analog input AIN, which is continuously sampled with the internal ADC. The ADC sample value can be read out from the parameter ADC_AIN in the register ADC_VSUPPLY_AIN. conditions and provide additional feedback on the system state.

a typical frequency of 12.5MHz. When an external clock is available, a frequency of 8MHz to 20MHz is recommended for optimum performance. The required minimum and maximum duty cycle of the clock signal is defined in the Electrical Characteristics. Especially at clock frequencies close to 20MHz, the clock's duty cycle requirements must be satisfied. Make sure the clock source supplies clean CMOS output logic levels and steep slopes when using a high clock frequency. The external clock input is enabled as soon as an external clock is provided at the CLK pin. Reading out bit ext_clk in the register IOIN gives feedback on which clock source is currently in use (1 = external clock). probe on one motor coil is a good aid to find the best settings.

255 FOR DELAYED

Figure 30. Quick Configuration Guide for Current Setting

0 TO VMAX

Figure 31. Quick Configuration Guide for StealthChop2 Configuration

Figure 32. Quick Configuration Guide for SpreadCycle

Figure 33. Quick Configuration Guide for CoolStep with StealthChop2

Figure 34. Quick Configuration Guide for CoolStep with SpreadCycle

This section gives some general information on the register map. The Register Map section gives details on all the registers and their content.

• All registers are reset to 0 upon power up, unless otherwise noted.

Table 26. Overview of Register Map

• Global configuration
• Global status flags
• Interface configuration
• I/O signal configuration Velocity Dependent Driver Feature Control Register Set This register set offers registers for:
• Driver current control
• Setting thresholds for CoolStep operation
• Setting thresholds for different chopper modes Direct Mode Registers This register group offers registers used for the direct coil current control mode. Encoder Register Set The encoder register set offers all registers needed for proper ABN encoder operation. ADC Registers This register group offers registers to control and read the internal ADC. Motor Driver Register Set This register set offers registers for:
• Setting/reading out microstep table and counter
• Chopper and driver configuration
• CoolStep and StallGuard configuration
• Reading out StallGuard values and driver error flags

connections. Connect the VDD1V8 filtering capacitor directly to the VDD1V8 pin. Figure 35. Standard Application Circuit information for the layout example. should only be used in low supply voltage applications like 14V and below.

depending on their energy. Especially, plastic housings and belt drive systems tend to cause ESD events of several kV. application PCB circuitry, and thus, reduce electromagnetic emission. Figure 36. Simple ESD Enhancement device (SMD) inductivities conduct full motor coil current and must be selected accordingly.

Figure 37. Extended Motor Output Protection

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 74 Register Map GCR Register Overview Shows all related registers of the GCR block ADDRESS AND NAME FIELDS MSB (TOP LEFT) TO LSB (BOTTOM RIGHT) 0x00 GCR.GCONF direct_mode stop_enable small_ hysteresis diag1_ pushpull diag0_ pushpull diag1_ onstate diag1_index diag1_stall diag0_stall diag0_otpw diag0_error shaft multistep_filt en_pwm_ mode fast_ standstill 0x01 GCR.GSTAT vm_uvlo register_ reset uv_cp drv_err reset 0x02 GCR.IFCNT IFCNT 0x03 GCR.NODECONF SENDDELAY NODEADDR 0x04 GCR.IOIN VERSION SILICON_RV ADC_ERR EXT_CLK EXT_RES_ DET OUTPUT COMP_B1_ COMP_A1_ COMP_B COMP_A reserved UART_EN ENCN DRV_ENN ENCA ENCB DIR STEP 0x07 GCR.DIAG_CONF diag1_ overvoltage diag1_ev_n diag1_index diag1_stall diag1_otpw diag1_error diag0_ overvoltage diag0_ev_n diag0_index diag0_stall diag0_otpw diag0_error 0x0A GCR.DRV_CONF SLOPE_CONTROL CURRENT_RANGE

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 75 ADDRESS AND NAME FIELDS MSB (TOP LEFT) TO LSB (BOTTOM RIGHT) 0x0B GCR.GLOBAL_SCALER GLOBALSCALER 0x10 VDR.IHOLD_IRUN IRUNDELAY IHOLDDELAY IRUN IHOLD 0x11 VDR.TPOWERDOWN TPOWERDOWN 0x12 VDR.TSTEP TSTEP[19:16] TSTEP[15:8] TSTEP[7:0] 0x13 VDR.TPWMTHRS TPWMTHRS[19:16] TPWMTHRS[15:8] TPWMTHRS[7:0] 0x14 VDR.TCOOLTHRS TCOOLTHRS[19:16] TCOOLTHRS[15:8] TCOOLTHRS[7:0] 0x15 VDR.THIGH THIGH[19:16] THIGH[15:8] THIGH[7:0] 0x2D DMR.DIRECT_MODE DIRECT_ COIL_B[8] DIRECT_COIL_B[7:0] DIRECT_ COIL_A[8] DIRECT_COIL_A[7:0] 0x38 ER.ENCMODE enc_sel_ decimal clr_enc_x pos_neg_edge clr_once clr_cont ignore_AB pol_N pol_B pol_A

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 76 ADDRESS AND NAME FIELDS MSB (TOP LEFT) TO LSB (BOTTOM RIGHT) 0x39 ER.X_ENC X_ENC[31:24] X_ENC[23:16] X_ENC[15:8] X_ENC[7:0] 0x3A ER.ENC_CONST ENC_CONST[31:24] ENC_CONST[23:16] ENC_CONST[15:8] ENC_CONST[7:0] 0x3B ER.ENC_STATUS n_event 0x3C ER.ENC_LATCH ENC_LATCH[31:24] ENC_LATCH[23:16] ENC_LATCH[15:8] ENC_LATCH[7:0] 0x50 ADC_Registers.ADC_ VSUPPLY_AIN ADC_AIN[12:8] ADC_AIN[7:0] ADC_VSUPPLY[12:8] ADC_VSUPPLY[7:0] 0x51 ADC_Registers.ADC_ TEMP RESERVED[12:8] RESERVED[7:0] ADC_TEMP[12:8] ADC_TEMP[7:0] 0x52 ADC_Registers.OTW_ OV_VTH OVERTEMPPREWARNING_VTH[12:8] OVERTEMPPREWARNING_VTH[7:0] OVERVOLTAGE_VTH[12:8] OVERVOLTAGE_VTH[7:0] 0x60 MDR.MSLUT_0 MSLUT_0[31:24] MSLUT_0[23:16] MSLUT_0[15:8] MSLUT_0[7:0] 0x61 MDR.MSLUT_1 MSLUT_1[31:24] MSLUT_1[23:16] MSLUT_1[15:8] MSLUT_1[7:0]

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 77 ADDRESS AND NAME FIELDS MSB (TOP LEFT) TO LSB (BOTTOM RIGHT) 0x62 MDR.MSLUT_2 MSLUT_2[31:24] MSLUT_2[23:16] MSLUT_2[15:8] MSLUT_2[7:0] 0x63 MDR.MSLUT_3 MSLUT_3[31:24] MSLUT_3[23:16] MSLUT_3[15:8] MSLUT_3[7:0] 0x64 MDR.MSLUT_4 MSLUT_4[31:24] MSLUT_4[23:16] MSLUT_4[15:8] MSLUT_4[7:0] 0x65 MDR.MSLUT_5 MSLUT_5[31:24] MSLUT_5[23:16] MSLUT_5[15:8] MSLUT_5[7:0] 0x66 MDR.MSLUT_6 MSLUT_6[31:24] MSLUT_6[23:16] MSLUT_6[15:8] MSLUT_6[7:0] 0x67 MDR.MSLUT_7 MSLUT_7[31:24] MSLUT_7[23:16] MSLUT_7[15:8] MSLUT_7[7:0] 0x68 MDR.MSLUTSEL W3 W2 W1 W0 0x69 MDR.MSLUTSTART OFFSET_SIN90 START_SIN90 START_SIN 0x6A MDR.MSCNT MSCNT[9:8] MSCNT[7:0]

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 78 ADDRESS AND NAME FIELDS MSB (TOP LEFT) TO LSB (BOTTOM RIGHT) 0x6B MDR.MSCURACT CUR_A[8] CUR_A[7:0] CUR_B[8] CUR_B[7:0] 0x6C MDR.CHOPCONF diss2vs diss2g dedge intpol MRES TPFD vhighchm vhighfs TBL[1] TBL[0:0] chm disfdcc fd3 HEND_OFFSET[3:1] HEND_ OFFSET[0:0 HSTRT_TFD210 TOFF 0x6D MDR.COOLCONF sfilt sgt seimin sedn semax seup semin 0x6F MDR.DRV_STATUS stst olb ola s2gb s2ga otpw ot stallguard CS_ACTUAL fsactive stealth s2vsb s2vsa SG_RESULT[9:8] SG_RESULT[7:0] 0x70 MDR.PWMCONF PWM_LIM PWM_REG pwm_dis_ reg_stst pwm_meas_ sd_enable FREEWHEEL pwm_ autograd pwm_ autoscale PWM_FREQ PWM_GRAD PWM_OFS 0x71 MDR.PWM_SCALE PWM_ SCALE_ AUTO[8] PWM_SCALE_AUTO[7:0] PWM_SCALE_SUM[9:8] PWM_SCALE_SUM[7:0] 0x72 MDR.PWM_AUTO PWM_GRAD_AUTO PWM_OFS_AUTO 0x74 MDR.SG4_THRS sg4_thrs_shl sg_angle_ offset sg4_filt_en SG4_THRS

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 79 ADDRESS AND NAME FIELDS MSB (TOP LEFT) TO LSB (BOTTOM RIGHT) 0x75 MDR.SG4_RESULT SG4_RESULT[9:8] SG4_RESULT[7:0] 0x76 MDR.SG4_IND SG4_IND_3 SG4_IND_2 SG4_IND_1 SG4_IND_0 0x00: GCR.GCONF Global Configuration Flags BITS AND NAME TYPE AND RESET DESCRIPTION [16] direct_mode RW 0x0 Enable direct motor phase current control using serial interface. 0: NORMAL_MODE Normal operation 1: DIRECT_MODE Motor coil currents and polarity directly programmed using serial interface: Register DIRECT_MODE(0x2D) specifies signed coil A current (bits 8..0) and coil B current (bits 24..16). In this mode, the current is scaled by the IHOLD setting. Velocity-based current regulation of StealthChop2 is not available in this mode. The automatic StealthChop2 current regulation works only for low stepper motor velocities. [15] stop_enable RW 0x0 Motor hard stop function enable. 0: NORMAL Normal operation 1: EM_STOP Emergency stop: ENCA stops the sequencer when tied high (no steps are executed by the sequencer, motor goes to standstill state). [14] small_hysteresis RW 0x0 0: HYST_1_16 Hysteresis for step frequency comparison is 1/16. 1: HYST_1_32 Hysteresis for step frequency comparison is 1/32 [13] diag1_pushpull RW 0x0 DIAG1 output type configuration. 0: OPEN_DRAIN DIAG1 is open collector output (active low). 1: PUSH_PULL Enable DIAG1 push pull output (active high). [12] diag0_pushpull RW 0x0 DIAG0 output type configuration. 0: OPEN_DRAIN DIAG0_SW is open collector output (active low). 1: PUSH_PULL Enable DIAG0_SW push pull output (active high). [10] diag1_onstate RW 0x0 DIAG1 output configuration. 0: DISABLED Disable DIAG1active on chopper on. 1: ONSTATE diag1_onstate. Enable DIAG1 active when chopper is on (for the coil in the second half of the fullstep).

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 80 BITS AND NAME TYPE AND RESET DESCRIPTION [9] diag1_index RW 0x0 DIAG1 output configuration. 0: DISABLED Disable DIAG1 active on index position. 1: INDEX diag1_index. Enable DIAG1 active on index position (microstep lookup table position 0). [8] diag1_stall RW 0x0 DIAG1 output configuration. 0: DISABLED diag1_stall. Motor stallnot indicated at DIAG1. 1: STALL_1 diag1_stall. Enable DIAG1 active on motor stall (set TCOOLTHRS before using this feature). [7] diag0_stall RW 0x0 DIAG0 output configuration. 0: DISABLED diag0_stall. Motor stallnot indicated at DIAG0 1: STALL_0 diag0_stall. Enable DIAG0 active on motor stall (set TCOOLTHRS before using this feature). [6] diag0_otpw RW 0x0 DIAG0 output configuration. 0: DISABLED Disable DIAG0 active on driver over temperature prewarning. 1: OTPW Enable DIAG0 active on driver over temperature prewarning (otpw). [5] diag0_error RW 0x0 DIAG0 output configuration. DIAG0 always shows the reset-status, that is, it is active low during reset condition. 0: DISABLED Disable DIAG0 active on driver errors. 1: ERROR Enable DIAG0 active on driver errors: Overtemperature (ot), short-to-GND (s2g), undervoltage chargepump (uv_cp). [4] shaft RW 0x0 Change motor direction/direction sign. 0: DIR Default motor direction 1: DIR_INV Inverse motor direction [3] multistep_filt RW 0x0 Enable step input filtering for StealthChop2. 0: FILT_DIS Step input filtering disabled. 1: FILT_EN Enable step input filtering for StealthChop2 optimization with external step source (default = 1). [2] en_pwm_mode RW 0x0 Enable the StealthChop2 mode. 0: SPREADCYCLE No StealthChop2 1: STEALTHCHOP StealthChop2 voltage PWM-mode enabled (depending on velocity thresholds). Switch from off to on state while in standstill and at IHOLD = nominal IRUN current only. [1] fast_standstill RW 0x0 Timeout for step execution until standstill detection. 0: STST_2_20 Normal time: 2^20 clocks 1: STST_2_18 Short time: 2^18 clocks

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 81 0x01: GCR.GSTAT Global Status Flags (Rewrite with ‘1’ bit to clear respective flags). BITS AND NAME TYPE AND RESET DESCRIPTION [4] vm_uvlo RW, W1C 0x1 1: VM undervoltage occured since last reset. (Hint: Is active after initial bootup. Clear flag after bootup to detect fault when device is operating). 0: OPERATIONAL Normal operation 1: VM_UVLO_DET VM undervoltage is detected since last reset. [3] register_reset RW, W1C 0x1 Hint: IS active after initial bootup. Clear flag after bootup to detect regmap reset when device is operating. 0: OPERATIONAL Normal operation 1: REG_RES_DET Indicates the registermap is reset. All registers are cleared to reset values. [2] uv_cp RW, W1C 0x1 Charge pump undervoltage condition flag. (Hint: Is active after initial bootup. Clear flag after bootup to detect fault when device is operating) #type=COW 0: OPERATIONAL Normal operation 1: UV_CP_DET Indicates an undervoltage on the charge pump. The driver is disabled during undervoltage. This flag is latched for information. [1] drv_err RW, W1C 0x0 Driver error flag #type=COW 0: OPERATIONAL Normal operation 1: DRV_DIS_DET Indicates, the driver is shut down due to overtemperature or short circuit detection. Read DRV_STATUS for details. The flag can only be cleared when the temperature is below the limit again. [0] reset RW, W1C 0x1 Reset flag (hint: is active after initial bootup. Clear flag after bootup to detect device is reset during operation) #type=COW 0: NO_RESET Normal operation 1: RESET_DET Indicates the IC is reset. 0x02: GCR.IFCNT Interface Transmission Counter This register is incremented with each successful UART interface write access. It can be read out to check the serial transmission for lost data. Read accesses do not change the content. Disabled in SPI operation. The counter wraps around from 255 to 0. BITS AND NAME TYPE AND RESET DESCRIPTION [7:0] IFCNT R, unsigned 0x00 Interface transmission counter. This register is incremented with each successful UART interface write access. It can be read out to check the serial transmission for lost data. Read accesses do not change the content. Disabled in SPI operation. The counter wraps around from 255 to 0.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 82 0x03: GCR.NODECONF BITS AND NAME TYPE AND RESET DESCRIPTION [11:8] SENDDELAY RW 0x0 SWUART programmable response delay after read request. 0: BIT_T_8 8-bit times (not allowed with multiple nodes) 2: BIT_T_24 3 × 8-bit times 4: BIT_T_40 5 × 8-bit times 6: BIT_T_56 7 × 8-bit times 8: BIT_T_72 9 × 8-bit times 10: BIT_T_88 11 × 8-bit times 12: BIT_T_104 13 × 8-bit times 14: BIT_T_120 15 × 8-bit times [7:0] NODEADDR RW, unsigned 0x00 NODEADDR: These eight bits set the address of unit for the UART interface. The address is incremented by one up to seven, as defined by SDI, SCK, CSN. CSN, SCK, and SDI. 000: +0 001: +1 010: +2 011: +3 100: +4 101: +5 110: +6 111: +7 Range: 0 to 254 (do not increment beyond 254). 0x04: GCR.IOIN Reads the state of all input pins available and returns IC revision in highest byte. BITS AND NAME TYPE AND RESET DESCRIPTION [31:24] VERSION R, unsigned 0x00 0x40 = first version of the IC. Identical numbers mean full digital compatibility. [18:16] SILICON_RV R, unsigned 0x0 Silicon revision number [15] ADC_ERR R 0x0 1: Signals the ADC is not working correctly. Do not utilize ADC-features. ADC is stuck in configuration mode and very likely does not receive an ACK_OUT. [14] EXT_CLK R 0x0 0: The internal oscillator is used for generating the clock-signal (12.5 MHz). 1: The external oscillator is used for generating the clock-signal. 0: INT_OSC Uses internal 12.5 MHz oscillator. 1: EXT_OSC External clock is detected and used. [13] EXT_RES_DET R 0x0 External reference resistor detection. Check to see if IREF current through the resistor is provided and the device is operational. 0: REF_RES_FAULT No resistor detected. 1: REF_RES_DET Normal operation

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 83 BITS AND NAME TYPE AND RESET DESCRIPTION [12] OUTPUT RW 0x1 Output polarity of SDO pin when UART is enabled using pin UART_EN. Its main purpose is to use SDO as NAO next address output signal for chain addressing of multiple ICs. Attention: reset value is 1 for use as NAO to next IC in single-wire chain. 0: NAO_LOW SDO/NAO is set to low logic level. 1: NAO_HI SDO/NAO is set to high logic level. [11] COMP_B1_B2 R 0x0 COMP_B1_B2 (StallGuard4 comparator B, for IC test) [10] COMP_A1_A2 R 0x0 COMP_A1_A2 (StallGuard4 comparator A, for IC test) [9] COMP_B R 0x0 COMP_B (chopper comparator B, for IC test) [8] COMP_A R 0x0 COMP_A (chopper comparator A, for IC test) [7] reserved R 0x0 [6] UART_EN R 0x0 1 = UART interface is enabled 0: LOW UART_EN is logic level low 1: HIGH UART_EN is logic level high [5] ENCN R 0x0 N-channel state 0: LOW ENC_N is logic level low 1: HIGH ENC_N is logic level high [4] DRV_ENN R 0x0 Driver disabled/enabled state. 0: LOW DRV_ENN is logic level low 1: HIGH DRV_ENN is logic level high [3] ENCA R 0x0 A-channel state 0: LOW ENCA is logic level low. 1: HIGH ENCB is logic level high. [2] ENCB R 0x0 B-channel state 0: LOW ENCB is logic level low. 1: HIGH ENCB is logic level high. [1] DIR R 0x0 State of pin DIR 0: LOW DIR pin is logic level low. 1: HIGH DIR pin is logic level high. [0] STEP R 0x0 State of pin STEP 0: LOW STEP pin is logic level low. 1: HIGH STEP pin is logic level high.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 84 0x07: GCR.DIAG_CONF BITS AND NAME TYPE AND RESET DESCRIPTION [27] diag1_overvoltage RW 0x0 Maps OV pin to DIAG1 0: DISABLED Disabled 1: ENABLED OV enabled on DIAG1 [26] diag1_ev_n RW 0x0 Map N event to DIAG1 0: DISABLED Disabled 1: ENABLED N event enabled on DIAG1 [19] diag1_index RW 0x0 Map index signal to DIAG1 0: DISABLED Disabled 1: ENABLED Index pulse mapped to DIAG1 [18] diag1_stall RW 0x0 Map StallGuard signal SG to DIAG1 0: DISABLED Disabled 1: ENABLED Stall information mapped to DIAG1 [17] diag1_otpw RW 0x0 Map OTPW (overtemperature prewarning) to DIAG1 0: DISABLED Disabled 1: ENABLED OTPW enabled on DIAG1 [16] diag1_error RW 0x0 Map driver error condition to DIAG1 0: DISABLED Disabled 1: ENABLED Error condition enabled on DIAG1 [11] diag0_overvoltage RW 0x0 Maps OV pin to DIAG0 0: DISABLED Disabled 1: ENABLED OV enabled on DIAG0 [10] diag0_ev_n RW 0x0 Map N event to DIAG0 0: DISABLED Disabled 1: ENABLED N event enabled on DIAG0 [3] diag0_index RW 0x0 Map index signal to DIAG0 0: DISABLED Disabled 1: ENABLED Index pulse mapped to DIAG0 [2] diag0_stall RW 0x0 Map StallGuard signal SG to DIAG0. Will be enabled after reaching TCOOLTHRS. 0: DISABLED Disabled 1: ENABLED Stall information mapped to DIAG0 [1] diag0_otpw RW 0x0 Map OTPW (overtemperature pre-warning) to DIAG0 0: DISABLED Disabled 1: ENABLED OTPW enabled on DIAG0 [0] diag0_error RW 0x0 Map driver error condition to DIAG0 0: DISABLED Disabled 1: ENABLED Error condition enabled on DIAG0

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 85 0x0A: GCR.DRV_CONF BITS AND NAME TYPE AND RESET DESCRIPTION [5:4] SLOPE_CONTROL RW 0x0 Slope Control Setting 0: SC_100V_US 100V/μs 1: SC_200V_US 200V/μs 2: SC_400V_US 400V/μs 3: SC_800V_US 800V/μs [1:0] CURRENT_RANGE RW 0x0 This setting allows a basic adaptation of the drivers RDSon current sensing to the motor current range. Select the lowest fitting range for best current precision. The value is the peak current setting. 0: CR_1A 1A 1: CR_2A 2A 2: CR_3A 3A 3: CR_3A_RED 3A 0x0B: GCR.GLOBAL_SCALER BITS AND NAME TYPE AND RESET DESCRIPTION [7:0] GLOBALSCALER RW, unsigned 0x00 Global scaling of motor current. This value is multiplied to the current scaling to adapt a drive to a certain motor type. This value should be chosen before tuning other settings, because it also influences chopper hysteresis. This value is just intended for finetuning the motor current. 0: Full scale (or write 256) 1 … 31: Not allowed for operation 32 … 255: 32/256 … 255/256 of maximum current. Hint: Values >128 recommended for best results.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 86 0x10: VDR.IHOLD_IRUN BITS AND NAME TYPE AND RESET DESCRIPTION [27:24] IRUNDELAY RW 0x4 Controls the number of clock cycles for motor power-up after start is detected. 0: instant power up 1…15: Delay per current increment step in multiple of IRUNDELAY × 512 clocks. 0: INSTANT Instant jump to IRUN on start of a motion. 1: DELAY_512 Delay of 512 × t_clk per current increment. 2: DELAY_1024 Delay of 1024 × t_clk per current increment. 3: DELAY_1536 Delay of 1536 × t_clk per current increment. 4: DELAY_2048 Delay of 2048 × t_clk per current increment. 5: DELAY_2560 Delay of 2560 × t_clk per current increment. 6: DELAY_3072 Delay of 3072 × t_clk per current increment. 7: DELAY_3584 Delay of 3584 × t_clk per current increment. 8: DELAY_4096 Delay of 4096 × t_clk per current increment. 9: DELAY_4608 Delay of 4608 × t_clk per current increment. 10: DELAY_5120 Delay of 5120 × t_clk per current increment. 11: DELAY_5632 Delay of 5632 × t_clk per current increment. 12: DELAY_6144 Delay of 6144 × t_clk per current increment. 13: DELAY_6656 Delay of 6656 × t_clk per current increment. 14: DELAY_7168 Delay of 7168 × t_clk per current increment. 15: DELAY_7680 Delay of 7680 × t_clk per current increment. [19:16] IHOLDDELAY RW 0x1 Controls the number of clock cycles for motor power down after a motion as soon as standstill is detected ( stst =1) and TPOWERDOWN has expired. The smooth transition avoids a motor jerk upon power down. 0: Instant power down 1..15: Delay per current reduction step in multiples of 2^18 clocks 0: INSTANT Instant reduction to IHOLD current after TPOWERDOWN has expired. 1: DELAY_1_218 One decrement every 2^18 × t_clk 2: DELAY_2_218 One decrement every 2 × 2^18 × t_clk 3: DELAY_3_218 One decrement every 3 × 2^18 × t_clk 4: DELAY_4_218 One decrement every 4 × 2^18 × t_clk 5: DELAY_5_218 One decrement every 5 × 2^18 × t_clk 6: DELAY_6_218 One decrement every 6 × 2^18 × t_clk 7: DELAY_7_218 One decrement every 7 × 2^18 × t_clk 8: DELAY_8_218 One decrement every 8 × 2^18 × t_clk 9: DELAY_9_218 One decrement every 9 × 2^18 × t_clk 10: DELAY_10_218 One decrement every 10 × 2^18 × t_clk 11: DELAY_11_218 One decrement every 11 × 2^18 × t_clk 12: DELAY_12_218 One decrement every 12 × 2^18 × t_clk 13: DELAY_13_218 One decrement every 13 × 2^18 × t_clk 14: DELAY_14_218 One decrement every 14 × 2^18 × t_clk 15: DELAY_15_218 One decrement every 15 × 2^18 × t_clk [12:8] IRUN RW, unsigned 0x1F Motor run current (0 = 1/32…31 = 32/32) Hint: Choose sense resistors in a way that normal IRUN is 16 to 31 for best microstep performance. [4:0] IHOLD RW, unsigned 0x08 Standstill current (0 = 1/32…31 = 32/32) In combination with StealthChop2 mode, setting IHOLD = 0 allows to choose freewheeling or coil short circuit for motor stand still.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 87 0x11: VDR.TPOWERDOWN BITS AND NAME TYPE AND RESET DESCRIPTION [7:0] TPOWERDOWN RW, unsigned 0x0A TPOWERDOWN sets the delay time after standstill ( stst ) of the motor to motor current power down. Time range is about 0 seconds to 4 seconds. Attention: A minimum setting of 2 is required to allow the automatic tuning of StealthChop2 PWM_OFFS_AUTO. Reset default = 10 0x12: VDR.TSTEP BITS AND NAME TYPE AND RESET DESCRIPTION [19:0] TSTEP R, unsigned 0x00000 Actual measured time between two 1/256 microsteps derived from the step input frequency in units of 1/fCLK. Measured value is (2^20)-1 in case of overflow or standstill. All TSTEP related thresholds use a hysteresis of 1/16 of the compare value to compensate for jitter in the clock or the step frequency. The flag small_hysteresis modifies the hysteresis to a smaller value of 1/32. ( Txxx × 15/16) - 1 or ( Txxx × 31/32) - 1 is used as a second compare value for each comparison value. This means the lower switching velocity equals the calculated setting, but the upper switching velocity is higher as defined by the hysteresis setting. 0x13: VDR.TPWMTHRS BITS AND NAME TYPE AND RESET DESCRIPTION [19:0] TPWMTHRS RW, unsigned 0x00000 This is the upper velocity for StealthChop2 voltage PWM mode. TSTEP ≥ TPWMTHRS StealthChop2 PWM mode is enabled, if configured.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 88 0x14: VDR.TCOOLTHRS BITS AND NAME TYPE AND RESET DESCRIPTION [19:0] TCOOLTHRS RW, unsigned 0x00000 This is the lower threshold velocity for switching on smart energy CoolStep and StallGuard feature. (unsigned) Set this parameter to disable CoolStep at low speeds, where it cannot work reliably. The stall output signal is enabled when exceeding this velocity. It is disabled again once the velocity falls below this threshold. TCOOLTHRS ≥ TSTEP ≥ THIGH : CoolStep is enabled, if configured. TCOOLTHRS ≥ TSTEP Stall output signal (DIAG0/1) is enabled, if configured. 0x15: VDR.THIGH BITS AND NAME TYPE AND RESET DESCRIPTION [19:0] THIGH RW, unsigned 0x00000 This velocity setting allows velocity-dependent switching into a different chopper mode and fullstepping to maximize torque. (unsigned) The stall detection feature is switched off for 2 to 3 electrical periods whenever passing the THIGH threshold to compensate for the effect of switching modes. TSTEP ≤ THIGH: CoolStep is disabled (motor runs with normal current scale). StealthChop2 voltage PWM mode is disabled. If vhighchm is set, the chopper switches to chm = 1 with TFD = 0 (constant off time with slow decay only). If vhighfs is set, the motor operates in fullstep mode and the stall detection is switched over to fullstep mode stall detection. 0x2D: DMR.DIRECT_MODE BITS AND NAME TYPE AND RESET DESCRIPTION [24:16] DIRECT_COIL_B RW, signed 0x000 When direct mode in GCONF is selected: Signed coil B current [8:0] DIRECT_COIL_A RW, signed 0x000 When direct mode in GCONF is selected: Signed coil A current

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 89 0x38: ER.ENCMODE BITS AND NAME TYPE AND RESET DESCRIPTION [10] enc_sel_decimal RW 0x0 Encoder prescaler mode selection 0: BINARY Encoder prescaler divisor binary mode: counts ENC_CONST(fractional part)/65536. 1: DECIMAL Encoder prescaler divisor decimal mode: counts in ENC_CONST(fractional part)/10000. [8] clr_enc_x RW 0x0 Encoder latch configuration 0: KEEP Upon N event, X_ENC becomes latched to ENC_LATCH only. 1: CLEAR Latch and additionally clear encoder counter X_ENC at N- event. [7:6] pos_neg_edge RW 0x0 N channel event sensitivity 0: HIGH_ACTIVE N channel event is active during an active N event level. 1: RISING_EDGE N channel is valid upon active going N event. 2: FALLING_EDGE N channel is valid upon inactive going N event. 3: BOTH_EDGES N channel is valid upon active going and inactive going N event. [5] clr_once RW 0x0 Position latch configuration 0: OFF Disabled 1: LATCH_ONCE Latch or latch and clear X_ENC on the next N event following the write access. [4] clr_cont RW 0x0 Position latch configuration 0: OFF Disabled 1: LATCH_CONT Always latch or latch and clear X_ENC upon an N event (once per revolution, it is recommended to combine this setting with edge sensitive N event). [3] ignore_AB RW 0x0 N event configuration 0: N_AB_MATCH An N event occurs only when polarities given by pol_N, pol_A, and pol_B match. 1: N_AB_IGNORED Ignore A and B polarity for N channel event [2] pol_N RW 0x0 Defines active polarity of N 0: LOW_ACTIVE Low active 1: HIGH_ACTIVE High active [1] pol_B RW 0x0 Required B polarity for an N channel event 0: NEG Negative polarity 1: POS Positive polarity [0] pol_A RW 0x0 Required A polarity for an N channel event 0: NEG Negative polarity 1: POS Positive polarity

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 90 0x39: ER.X_ENC BITS AND NAME TYPE AND RESET DESCRIPTION [31:0] X_ENC RW, signed 0x00000000 Actual encoder position (signed) 0x3A: ER.ENC_CONST BITS AND NAME TYPE AND RESET DESCRIPTION [31:0] ENC_CONST RW, signed 0x00010000 Accumulation constant (signed) 16-bit integer part, 16-bit fractional part X_ENC accumulates +/- ENC_CONST / (2^16 × X_ENC ) (binary) or +/- ENC_CONST / (10^4 × X_ENC ) (decimal) ENCMODE bit enc_sel_decimal switches between decimal and binary setting. Use the sign to match rotation direction! Binary: ± [µsteps/2^16] ±(0 … 32767.999847) Decimal: Reset default = 1.0 ( = 65536) 0x3B: ER.ENC_STATUS Encoder status information BITS AND NAME TYPE AND RESET DESCRIPTION [0] n_event RW, W1C 0x0 An N event is detected since last clearing this bit. #type=COW 0: NO_EVENT No event 1: EVENT_DETECTED Event detected. To clear the status bit, write with a 1-bit at the corresponding position. 0x3C: ER.ENC_LATCH BITS AND NAME TYPE AND RESET DESCRIPTION [31:0] ENC_LATCH R, unsigned 0x00000000 Encoder position X_ENC latched on N event.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 91 0x50: ADC_Registers.ADC_VSUPPLY_AIN BITS AND NAME TYPE AD RESET DESCRIPTION [28:16] ADC_AIN R, signed 0x0000 Value of voltage at AIN pin in integer. Update rate: each 2048 clocks [12:0] ADC_VSUPPLY R, signed 0x0000 Actual value of voltage on VS (filtered with low pass filter). Update rate: each 2048 clocks 0x51: ADC_Registers.ADC_TEMP BITS AND NAME TYPE AND RESET DESCRIPTION [28:16] RESERVED R, unsigned 0x0000 [12:0] ADC_TEMP R, signed 0x0000 Actual temperature (filtered with low pass filter) Udate rate: each 2048 clocks 0x52: ADC_Registers.OTW_OV_VTH BITS AND NAME TYPE AND RESET DESCRIPTION [28:16] OVERTEMPPREWARNING_V TH RW, unsigned 0x0B92 Overtemperature warning threshold register: ADC_TEMP >= OVERTEMPPREWARNING_VTH Overtemperatureprewarning is triggered. (Reset: 0xB92 equals 120°C). [12:0] OVERVOLTAGE_VTH RW, unsigned 0x0F25 Overvoltage threshold for output OV. Default: 38V, 36 V equals 1.125 V at ADC inputs.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 92 0x60: MDR.MSLUT_0 Microstep table entries 0…31 BITS AND NAME TYPE AND RESET DESCRIPTION [31:0] MSLUT_0 RW, unsigned 0xAAAAB554 Each bit gives the difference between entry x and entry x + 1 when combined with the corresponding MSLUTSEL W bits: 0: W = %00: -1 %01: +0 %10: +1 %11: +2 1: W = %00: +0 %01: +1 %10: +2 %11: +3 This is the differential coding for the first quarter of a wave. Start values for CUR_A and CUR_B are stored for MSCNT position 0 in START_SIN and START_SIN90. ofs31, ofs30, …, ofs01, ofs00 ofs255, ofs254, …, ofs225, ofs224 Reset default = sine wave table 0x61: MDR.MSLUT_1 Microstep table entries 32…63 BITS AND NAME TYPE AND RESET DESCRIPTION [31:0] MSLUT_1 RW, unsigned 0x4A9554AA Each bit gives the difference between entry x and entry x + 1 when combined with the corresponding MSLUTSEL W bits: 0: W = %00: -1 %01: +0 %10: +1 %11: +2 1: W = %00: +0 %01: +1 %10: +2 %11: +3 This is the differential coding for the first quarter of a wave. Start values for CUR_A and CUR_B are stored for MSCNT position 0 in START_SIN and START_SIN90. ofs31, ofs30, …, ofs01, ofs00 ofs255, ofs254, …, ofs225, ofs224 Reset default = sine wave table

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 93 0x62: MDR.MSLUT_2 Microstep table entries 64…95 BITS AND NAME TYPE AND RESET DESCRIPTION [31:0] MSLUT_2 RW, unsigned 0x24492929 Each bit gives the difference between entry x and entry x + 1 when combined with the corresponding MSLUTSEL W bits: 0: W = %00: -1 %01: +0 %10: +1 %11: +2 1: W = %00: +0 %01: +1 %10: +2 %11: +3 This is the differential coding for the first quarter of a wave. Start values for CUR_A and CUR_B are stored for MSCNT position 0 in START_SIN and START_SIN90. ofs31, ofs30, …, ofs01, ofs00 ofs255, ofs254, …, ofs225, ofs224 Reset default = sine wave table 0x63: MDR.MSLUT_3 Microstep table entries 96…127 BITS AND NAME TYPE AND RESET DESCRIPTION [31:0] MSLUT_3 RW, unsigned 0x10104222 Each bit gives the difference between entry x and entry x + 1 when combined with the corresponding MSLUTSEL W bits: 0: W = %00: -1 %01: +0 %10: +1 %11: +2 1: W = %00: +0 %01: +1 %10: +2 %11: +3 This is the differential coding for the first quarter of a wave. Start values for CUR_A and CUR_B are stored for MSCNT position 0 in START_SIN and START_SIN90. ofs31, ofs30, …, ofs01, ofs00 ofs255, ofs254, …, ofs225, ofs224 Reset default = sine wave table

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 94 0x64: MDR.MSLUT_4 Microstep table entries 128…159 BITS AND NAME TYPE AND RESET DESCRIPTION [31:0] MSLUT_4 RW, unsigned 0xFBFFFFFF Each bit gives the difference between entry x and entry x + 1 when combined with the corresponding MSLUTSEL W bits: 0: W = %00: -1 %01: +0 %10: +1 %11: +2 1: W = %00: +0 %01: +1 %10: +2 %11: +3 This is the differential coding for the first quarter of a wave. Start values for CUR_A and CUR_B are stored for MSCNT position 0 in START_SIN and START_SIN90. ofs31, ofs30, …, ofs01, ofs00 ofs255, ofs254, …, ofs225, ofs224 Reset default = sine wave table 0x65: MDR.MSLUT_5 Microstep table entries 160…191 BITS AND NAME TYPE AND RESET DESCRIPTION [31:0] MSLUT_5 RW, unsigned 0xB5BB777D Each bit gives the difference between entry x and entry x + 1 when combined with the corresponding MSLUTSEL W bits: 0: W = %00: -1 %01: +0 %10: +1 %11: +2 1: W = %00: +0 %01: +1 %10: +2 %11: +3 This is the differential coding for the first quarter of a wave. Start values for CUR_A and CUR_B are stored for MSCNT position 0 in START_SIN and START_SIN90. ofs31, ofs30, …, ofs01, ofs00 ofs255, ofs254, …, ofs225, ofs224 Reset default = sine wave table

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 95 0x66: MDR.MSLUT_6 Microstep table entries 192…223 BITS AND NAME TYPE AND RESET DESCRIPTION [31:0] MSLUT_6 RW, unsigned 0x49295556 Each bit gives the difference between entry x and entry x + 1 when combined with the corresponding MSLUTSEL W bits: 0: W = %00: -1 %01: +0 %10: +1 %11: +2 1: W = %00: +0 %01: +1 %10: +2 %11: +3 This is the differential coding for the first quarter of a wave. Start values for CUR_A and CUR_B are stored for MSCNT position 0 in START_SIN and START_SIN90. ofs31, ofs30, …, ofs01, ofs00 ofs255, ofs254, …, ofs225, ofs224 Reset default = sine wave table 0x67: MDR.MSLUT_7 Microstep table entries 224…255 BITS AND NAME TYPE AND RESET DESCRIPTION [31:0] MSLUT_7 RW, unsigned 0x00404222 Each bit gives the difference between entry x and entry x + 1 when combined with the corresponding MSLUTSEL W bits: 0: W = %00: -1 %01: +0 %10: +1 %11: +2 1: W = %00: +0 %01: +1 %10: +2 %11: +3 This is the differential coding for the first quarter of a wave. Start values for CUR_A and CUR_B are stored for MSCNT position 0 in START_SIN and START_SIN90. ofs31, ofs30, …, ofs01, ofs00 ofs255, ofs254, …, ofs225, ofs224 Reset default = sine wave table

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 96 0x68: MDR.MSLUTSEL BITS AND NAME TYPE AND RESET DESCRIPTION [31:24] RW, unsigned 0xFF LUT segment 1 start. The sine wave lookup table can be divided into up to four segments using an individual step width control entry Wx. The segment borders are selected by X1, X2, and X3. Segment 0 goes from 0 to X1 -1. Segment 1 goes from X1 to X2 -1. Segment 2 goes from X2 to X3 -1. Segment 3 goes from X3 to 255. For defined response, the values shall satisfy: 0< X1 < X2 < X3 [23:16] RW, unsigned 0xFF LUT segment 1 start. The sine wave look up table can be divided into up to four segments using an individual step width control entry Wx. The segment borders are selected by X1, X2, and X3. Segment 0 goes from 0 to X1 -1. Segment 1 goes from X1 to X2 -1. Segment 2 goes from X2 to X3 -1. Segment 3 goes from X3 to 255. For defined response, the values shall satisfy: 0< X1 < X2 < X3 [15:8] RW, unsigned 0x80 LUT segment 1 start. The sine wave look up table can be divided into up to four segments using an individual step width control entry Wx. The segment borders are selected by X1, X2, and X3. Segment 0 goes from 0 to X1 -1. Segment 1 goes from X1 to X2 -1. Segment 2 goes from X2 to X3 -1. Segment 3 goes from X3 to 255. For defined response, the values shall satisfy: 0< X1 < X2 < X3 [7:6] RW 0x1 LUT width select from ofs(X3) to ofs255. Width control bit coding W0 … W3: %00: MSLUT entry 0, 1 select: -1, +0 %01: MSLUT entry 0, 1 select: +0, +1 %10: MSLUT entry 0, 1 select: +1, +2 %11: MSLUT entry 0, 1 select: +2, +3 0: W3_SUB1_ADD0 Current MSLUT entry 0 (1): -1 (+0) to sinewave. 1: W3_ADD0_ADD1 Current MSLUT entry 0 (1): +0 (+1) to sinewave. 2: W3_ADD1_ADD2 Current MSLUT entry 0 (1): +1 (+2) to sinewave. 3: W3_ADD2_ADD3 Current MSLUT entry 0 (1): +2 (+3) to sinewave.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 97 BITS AND NAME TYPE AND RESET DESCRIPTION [5:4] RW 0x1 LUT width select from ofs(X2) to ofs(X3-1). Width control bit coding W0 … W3: %00: MSLUT entry 0, 1 select: -1, +0 %01: MSLUT entry 0, 1 select: +0, +1 %10: MSLUT entry 0, 1 select: +1, +2 %11: MSLUT entry 0, 1 select: +2, +3 0: W2_SUB1_ADD0 Current MSLUT entry 0 (1): -1 (+0) to sinewave. 1: W2_ADD0_ADD1 Current MSLUT entry 0 (1): +0 (+1) to sinewave. 2: W2_ADD1_ADD2 Current MSLUT entry 0 (1): +1 (+2) to sinewave. 3: W2_ADD2_ADD3 Current MSLUT entry 0 (1): +2 (+3) to sinewave. [3:2] RW 0x1 LUT width select from ofs(X1) to ofs(X2-1). Width control bit coding W0 … W3: %00: MSLUT entry 0, 1 select: -1, +0 %01: MSLUT entry 0, 1 select: +0, +1 %10: MSLUT entry 0, 1 select: +1, +2 %11: MSLUT entry 0, 1 select: +2, +3 0: W1_SUB1_ADD0 Current MSLUT entry 0 (1): -1 (+0) to sinewave. 1: W1_ADD0_ADD1 Current MSLUT entry 0 (1): +0 (+1) to sinewave. 2: W1_ADD1_ADD2 Current MSLUT entry 0 (1): +1 (+2) to sinewave. 3: W1_ADD2_ADD3 Current MSLUT entry 0 (1): +2 (+3) to sinewave. [1:0] RW 0x2 LUT width select from ofs00 to ofs(X1-1) Width control bit coding W0 … W3: %00: MSLUT entry 0, 1 select: -1, +0 %01: MSLUT entry 0, 1 select: +0, +1 %10: MSLUT entry 0, 1 select: +1, +2 %11: MSLUT entry 0, 1 select: +2, +3 0: W0_SUB1_ADD0 Current MSLUT entry 0 (1): -1 (+0) to sinewave. 1: W0_ADD0_ADD1 Current MSLUT entry 0 (1): +0 (+1) to sinewave. 2: W0_ADD1_ADD2 Current MSLUT entry 0 (1): +1 (+2) to sinewave. 3: W0_ADD2_ADD3 Current MSLUT entry 0 (1): +2 (+3) to sinewave. 0x69: MDR.MSLUTSTART Start values are transferred to the microstep registers CUR_A and CUR_B whenever the reference position MSCNT = 0 is passed. BITS AND NAME TYPE AND RESET DESCRIPTION [31:24] OFFSET_SIN90 RW, unsigned 0x00 Signed offset for cosine wave ±127 microsteps. Adapt START_SIN90 to match the microstep wave table at position MSCNT = 0. [23:16] START_SIN90 RW, unsigned 0xF7 START_SIN90 gives the absolute value for cosine wave microstep table entry at MSCNT = 0 (table position 256 + OFFSET_SIN90). [7:0] START_SIN RW, unsigned 0x00 START_SIN gives the absolute value at microstep table entry 0.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 98 0x6A: MDR.MSCNT BITS AND NAME TYPE AND RESET DESCRIPTION [9:0] MSCNT R, unsigned 0x000 Microstep counter. Indicates actual position in the microstep table for CUR_B. CUR_A uses an offset of 256 (two-phase motor). Hint: Move to a position where MSCNT is zero before reinitializing MSLUTSTART or MSLUT and MSLUTSEL. 0x6B: MDR.MSCURACT BITS AND NAME TYPE AND RESET DESCRIPTION [24:16] CUR_A R, signed 0x0F7 Actual microstep current for motor phase A (cosine wave) as read from MSLUT (not scaled by current). [8:0] CUR_B R, signed 0x000 Actual microstep current for motor phase B (sine wave) as read from MSLUT (not scaled by current). 0x6C: MDR.CHOPCONF BITS AND NAME TYPE AND RESET DESCRIPTION [31] diss2vs RW 0x0 Short-to-supply protection disable 0: 0 Short to VS protection is on. 1: 1 Short to VS protection is disabled. [30] diss2g RW 0x0 Short-to-GND protection disable 0: 0 Short-to-GND protection is on. 1: 1 Short-to-GND protection is disabled. [29] dedge RW 0x0 Enable double edge step pulses 0: 0 Disabled 1: 1 Enable step impulse at each step edge to reduce step frequency requirement. [28] intpol RW 0x1 The actual microstep resolution (MRES) is extrapolated to 256 microsteps for smoothest motor operation. 0: DISABLED No interpolation 1: ENABLED Interpolates to 256 microsteps

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 99 BITS AND NAME TYPE AND RESET DESCRIPTION [27:24] MRES RW 0x0 Microstep resolution selection. %0000: Native 256 microstep setting. Normally, use this setting with the internal motion controller. %0001 … %1000: 128, 64, 32, 16, 8, 4, 2, FULLSTEP Reduced microstep resolution. The resolution gives the number of microstep entries per sine quarter wave. The driver automatically uses microstep positions, which result in a symmetrical wave, when choosing a lower microstep resolution. Step width = 2^(MRES) [microsteps] 0: RES_256 256 steps per fullstep 1: RES_128 128 steps per fullstep 2: RES_64 64 steps per fullstep 3: RES_32 32 steps per fullstep 4: RES_16 16 steps per fullstep 5: RES_8 8 steps per fullstep 6: RES_4 4 steps per fullstep 7: RES_HS 2 steps per fullstep 8: RES_FS Fullstep [23:20] TPFD RW, unsigned 0x4 Passive fast decay time TPFD allows dampening of motor mid-range resonances. Passive fast decay time setting controls duration of the fast decay phase inserted after bridge polarity change NCLK = 128 × TPFD %0000: Disable %0001 … %1111: 1 … 15 [19] vhighchm RW 0x0 High velocity chopper mode This bit enables switching to chm = 1 and fd = 0 when VHIGH is exceeded. This way, a higher velocity can be achieved. Can be combined with vhighfs = 1. If set, the TOFF setting automatically is doubled during a high velocity operation to avoid doubling of the chopper frequency. 0: CTOFF_THIGH_DIS Disabled 1: CTOFF_THIGH_EN Switch to constant TOFF chopper when reaching THIGH. [18] vhighfs RW 0x0 High velocity fullstep selection This bit enables switching to fullstep when VHIGH is exceeded. Switching takes place only at 45° position. The fullstep target current uses the current value from the microstep table at the 45° position. 0: FS_THIGH_DIS Disabled 1: FS_THIGH_EN Switches from microstep to fullstep on reaching THIGH.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 100 BITS AND NAME TYPE AND RESET DESCRIPTION [16:15] TBL RW 0x2 TBL blank time setting. Sets comparator blank time in numbers of clock cycles. Hint: 24 or 36 clocks are recommended for most applications. Restriction for TBL = 0x0 : Use only in combination with external clock oscillator <= 8MHz. Restriction for TBL = 0x1 : May be used with internal clock, or if external clock frequency <= 13MHz is applied. 0: TBL_16 16 clocks 1: TBL_24 24 clocks 2: TBL_36 36 clocks 3: TBL_48 48 clocks [14] chm RW 0x0 Chopper mode selection. This is only effective if en_pwm_mode is set to 0 or TSTEP < TPWMTHRS. 0: SPREADCYCLE Standard mode (SpreadCycle) 1: CLASSIC_CHOP Constant off time with fast decay time. Fast decay time is also terminated when the negative nominal current is reached. Fast decay is after on time. [12] disfdcc RW 0x0 Fast decay mode for chm = 1 0: DISABLED Enables current comparator usage for termination of the fast decay cycle. 1: ENABLED Disables current comparator usage for termination of the fast decay cycle. [11] fd3 RW 0x0 TFD[3] With chm = 1: MSB of fast decay time setting TFD 0: TFD3_0 MSB of TFD setting: 0 1: TFD3_1 MSB of TFD setting: 1 [10:7] HEND_OFFSET RW, unsigned 0x2 With chm =0: HEND hysteresis low value %0000 … %1111: Hysteresis is -3, -2, -1, 0, 1, …, 12. (1/512 of this setting adds to current setting). This is the hysteresis value used for the hysteresis chopper. Wwith chm =1: OFFSET sine wave offset %0000 … %1111: This is the sine wave offset and 1/512 of the value is added to the absolute value of each sine wave entry.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 101 BITS AND NAME TYPE AND RESET DESCRIPTION [6:4] HSTRT_TFD210 RW, unsigned 0x5 With chm =0: HSTRT hysteresis start value added to HEND. %000 … %111: Add 1, 2, …, 8 to hysteresis low value HEND. (1/512 of this setting adds to current setting). Attention: Effective HEND + HSTRT ≤ 16. Hint: Hysteresis decrement is done each 16 clocks. With chm =1: TFD [2..0] fast decay time setting. Fast decay time setting (MSB: fd3): %0000 … %1111: Fast decay time setting TFD with NCLK = 32 × TFD (%0000: slow decay only) [3:0] TOFF RW 0x0 TOFF off time and driver enable Off time setting controls duration of slow decay phase NCLK = 24 + 32 × TOFF %0000: Driver disable, all bridges off %0001: 1 – use only with TBL ≥ 2 %0010 … %1111: 2 … 15 0: DRIVER_OFF Driver disabled and all bridges off. 1: TOFF_56 Slow decay phase duration: 56 × t_clk. Use with TBL >= 2. 2: TOFF_88 Slow decay phase duration: 88 × tclk. 3: TOFF_120 Slow decay phase duration: 120 × tclk. 4: TOFF_152 Slow decay phase duration: 152 × tclk. 5: TOFF_184 Slow decay phase duration: 184 × tclk. 6: TOFF_216 Slow decay phase duration: 216 × tclk. 7: TOFF_248 Slow decay phase duration: 248 × tclk. 8: TOFF_280 Slow decay phase duration: 280 × tclk. 9: TOFF_312 Slow decay phase duration: 312 × tclk. 10: TOFF_344 Slow decay phase duration: 344× tclk. 11: TOFF_376 Slow decay phase duration: 376 × tclk. 12: TOFF_408 Slow decay phase duration: 408 × tclk. 13: TOFF_440 Slow decay phase duration: 440 × tclk. 14: TOFF_472 Slow decay phase duration: 472 × tclk. 15: TOFF_504 Slow decay phase duration: 504 × tclk. 0x6D: MDR.COOLCONF BITS AND NAME TYPE NAD RESET DESCRIPTION [24] sfilt RW 0x0 StallGuard2 filter enable 0: FILT_DISABLED Standard mode, high time resolution for StallGuard. 1: FILT_ENABLED Filtered mode, StallGuard signal updated for each four fullsteps only to compensate for motor pole tolerances.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 102 BITS AND NAME TYPE NAD RESET DESCRIPTION [22:16] sgt RW, unsigned 0x00 StallGuard2 threshold value This signed value controls StallGuard2 level for stall output and sets the optimum measurement range for readout. A lower value gives a higher sensitivity. Zero is the starting value working with most motors. -64 to +63: A higher value makes StallGuard2 less sensitive and requires more torque to indicate a stall. [15] seimin RW 0x0 Minimum current for smart current control 0: IRUN_DIV2 1/2 of current setting (IRUN) (when used with StealthChop requires IRUN ≥ 16). 1: IRUN_DIV4 1/4 of current setting (IRUN) (when used with StealthChop requires IRUN ≥ 28). [14:13] sedn RW 0x0 Current down step speed %00: For each 32 StallGuard2 values, decrease by one. %01: For each 8 StallGuard2 values, decrease by one. %10: For each 2 StallGuard2 values, decrease by one. %11: For each StallGuard2 value, decrease by one. 0: STEP_DOWN_EACH_ For each 32 StallGuard2/StallGuard4 values, decrease by one. 1: STEP_DOWN_EACH_ For each 8 StallGuard2/StallGuard4 values, decrease by one. 2: STEP_DOWN_EACH_ For each 2 StallGuard2/StallGuard4 values, decrease by one. 3: STEP_DOWN_EACH_ For each StallGuard2/StallGuard4 values, decrease by one. [11:8] semax RW, unsigned 0x0 StallGuard2 hysteresis value for smart current control If the StallGuard2 result is equal to or above (SEMIN + SEMAX + 1) × 32, the motor current is decreased to save energy. %0000 … %1111: 0 … 15 [6:5] seup RW 0x0 Current up step width Current increment steps per measured StallGuard2 value. 0: STEP_UP_1 1 increment per Stallguard2/4 value. 1: STEP_UP_2 2 increments per Stallguard2/4 value. 2: STEP_UP_4 4 increments per Stallguard2/4 value. 3: STEP_UP_8 8 increments per Stallguard2/4 value. [3:0] semin RW, unsigned 0x0 Minimum StallGuard2 value for smart current control and smart current enable. If the StallGuard2 result falls below SEMIN × 32, the motor current is increased to reduce motor load angle. %0000: smart current control CoolStep off %0001 … %1111: 1 … 15

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 103 0x6F: MDR.DRV_STATUS BITS AND NAME TYPE AND RESET DESCRIPTION [31] stst R 0x0 Standstill indicator This flag indicates motor standstill in each operation mode. This occurs 2^(20) clocks after the last step pulse. 0: INACTIVE Motor moving 1: ACTIVE Motor in standstill [30] olb R 0x0 Open load indicator phase B. Hint: This is just an informative flag. The driver takes no action upon it. False detection may occur in fast motion and standstill. Check during slow motion only. 0: OPERATIONAL Normal operation 1: OPEN_LOAD Open load detected on phase B. [29] ola R 0x0 Open load indicator phase A 0: OPERATIONAL Normal operation 1: OPEN_LOAD Open load detected on phase A. Hint: This is just an informative flag. The driver takes no action upon it. False detection may occur in fast motion and standstill. Check during slow motion only. [28] s2gb R 0x0 Short-to-ground indicator phase B 0: OPERATIONAL Normal operation 1: ERROR Short-to-GND detected on phase B. The driver is disabled. The flags stay active until the driver is disabled by software (TOFF = 0) or by the ENN input. [27] s2ga R 0x0 Short-to-ground indicator phase A 0: OPERATIONAL Normal operation 1: ERROR Short-to-GND detected on phase A. The driver is disabled. The flags stay active until the driver is disabled by software (TOFF = 0) or by the ENN input. [26] otpw R 0x0 Overtemperature prewarning flag 0: INACTIVE Normal operation 1: ACTIVE Overtemperature prewarning threshold is exceeded. The overtemperature prewarning flag is common for both bridges. [25] ot R 0x0 Overtemperature flag 0: OPERATIONAL Normal operation 1: ERROR Overtemperature limit is reached. Drivers are disabled until the IC has cooled down. The overtemperature flag is common for both bridges. [24] stallguard R 0x0 StallGuard2/StallGuard4 status 0: INACTIVE Normal operation 1: ACTIVE Motor stall detected by StallGuard2 (in SpreadCycle operation), respectively, by StallGuard4 (in StealthChop2 operatoin) or DcStep stall (in DcStep mode).

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 104 BITS AND NAME TYPE AND RESET DESCRIPTION [20:16] CS_ACTUAL R, unsigned 0x00 Actual motor current/smart energy current Actual current control scaling for monitoring smart energy current scaling controlled through settings in register COOLCONF or for monitoring the function of the automatic current scaling. [15] fsactive R 0x0 Full step active indicator 0: USTEP Microstepping active 1: FSTEP Indicates the driver has switched to fullstep, as defined by chopper mode settings and velocity thresholds. [14] stealth R 0x0 StealthChop2 indicator 0: SPREADCYCLE_CTO FF StealthChop2 not active. 1: STEALTHCHOP Driver operates in StealthChop2 mode. [13] s2vsb R 0x0 Short-to-supply indicator phase B. The driver is disabled. The flags stay active until the driver is disabled by software (TOFF = 0) or by the DRV_ENN input. 0: OPERATIONAL No error 1: ERROR Short-to-supply detected on phase B.The driver is disabled. [12] s2vsa R 0x0 Short-to-supply indicator phase A. The driver is disabled. The flags stay active until the driver is disabled by software (TOFF = 0) or by the DRV_ENN input. 0: OPERATIONAL No error 1: ERROR Short-to-supply detected on phase A. The driver is disabled. [9:0] SG_RESULT R, unsigned 0x000 StallGuard2 result, respectively, StallGuard4 result (depending on actual chopper mode), respectively, PWM on time for coil A in standstill with SpreadCycle for motor temperature detection. Mechanical load measurement: The StallGuard2/4 result gives a means to measure mechanical motor load. A higher value means lower mechanical load. For StallGuard2, a value of 0 signals highest load. With optimum SGT setting, this is an indicator for a motor stall. The stall detection compares SG_RESULT to 0 to detect a stall. SG_RESULT is used as a base for CoolStep operation by comparing it to a programmable upper and a lower limit. It is not applicable in StealthChop2 mode. StallGuard2 works best with microstep operation. Temperature measurement during SpreadCycle mode: In standstill, no StallGuard2 result can be obtained. SG_RESULT shows the chopper on-time for motor coil A instead. Move the motor to a determined microstep position at a certain current setting to get an estimation of motor temperature by reading the chopper on-time. As the motor heats up, its coil resistance rises and the chopper on-time increases. For StallGuard4 specifics, see SG4_RESULT.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 105 0x70: MDR.PWMCONF BITS AND NAME TYPE AND RESET DESCRIPTION [31:28] PWM_LIM RW, unsigned 0xC PWM automatic scale amplitude limit when switching on. Limit for PWM_SCALE_AUTO when switching back from SpreadCycle to StealthChop2. This value defines the upper limit for bits 7 to 4 of the automatic current control when switching back. It can be set to reduce the current jerk during mode change back to StealthChop2. It does not limit PWM_GRAD or PWM_GRAD_AUTO offset. (Default = 12) [27:24] PWM_REG RW, unsigned 0x4 Regulation loop gradient User-defined maximum PWM amplitude change per half wave when using pwm_autoscale =1. (1…15): 1: 0.5 increments (slowest regulation) 2: 1 increment 3: 1.5 increments 4: 2 increments (reset default) ) 8: 4 increments ... 15: 7.5 increments (fastest regulation) [23] pwm_dis_reg_stst RW 0x0 1= Disable current regulation when motor is in standstill and current is reduced (less than IRUN). This option eliminates any regulation noise during standstill. 0: CTRL_ACTIVE Current regulation active 1: CTRL_INACTIVE Disable current regulation when motor is in standstill and current is reduced (less than IRUN). This option eliminates any regulation noise during standstill. [22] pwm_meas_sd_enable RW 0x0 Slow decay phase low side current measurement control. 0: DISABLED Slow decay low side measurement disabled. 1: ENABLED Uses slow decay phases on low side to measure the motor current to reduce the lower current limit. [21:20] FREEWHEEL RW 0x0 Allows different standstill modes. Standstill option when motor current setting is zero ( I_HOLD =0). 0: NORMAL Normal operation 1: FREEWHEEL Freewheeling 2: LS_SHORT Coil shorted using LS drivers 3: HS_SHORT Coil shorted using HS drivers

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 106 BITS AND NAME TYPE AND RESET DESCRIPTION [19] pwm_autograd RW 0x1 PWM automatic gradient adaptation 0: FIXED Fixed value for PWM_GRAD (PWM_GRAD_AUTO = PWM_GRAD). 1: AUTO Automatic tuning (only with pwm_autoscale=1) (reset default) PWM_GRAD_AUTO is initialized with PWM_GRAD while pwm_autograd = 0 and is optimized automatically during motion. Preconditions PWM_OFS_AUTO is automatically initialized. This requires standstill at IRUN for >130ms to a) detect standstill b) wait > 128 chopper cycles at IRUN, and c) regulate PWM_OFS_AUTO so that -1 PWM_SCALE_AUTO motor running and 1.5 × PWM_OFS_AUTO × (IRUN+1)/32 PWM_SCALE_SUM PWM_OFS_AUTO × (IRUN+1)/32and PWM_SCALE_SUM Time required for tuning PWM_GRAD_AUTO is about 8 fullsteps per change of ±1. Also enables use of reduced chopper frequency for tuning PWM_OFS_AUTO. [18] pwm_autoscale RW 0x1 PWM automatic amplitude scaling 0: USER User-defined feed-forward PWM amplitude. The current settings IRUN and IHOLD have no influence! The resulting PWM amplitude (limited to 0…255) is: PWM_OFS × ((CS_ACTUAL+1)/32) + PWM_GRAD × 256/TSTEP. 1: AUTO Enable automatic current control (reset default) [17:16] PWM_FREQ RW 0x0 PWM frequency selection. 0: FCLK_2DIV1024 fPWM = 2/1024 fCLK 1: FCLK_2DIV683 fPWM = 2/683 fCLK 2: FCLK_2DIV512 fPWM = 2/512 fCLK 3: FCLK_2DIV410 fPWM = 2/410 fCLK [15:8] PWM_GRAD RW, unsigned 0x00 Velocity-dependent gradient for PWM amplitude: PWM_GRAD × 256/TSTEP This value is added to PWM_OFS to compensate for the velocity- dependent motor back-EMF. Use PWM_GRAD as initial value for automatic scaling to speed up the automatic tuning process. To do this, set PWM_GRAD to the determined, application-specific value, with pwm_autoscale = 0. Only afterwards, set pwm_autoscale =1. Enable StealthChop2 when finished. Hint: After initial tuning, the required initial value can be read out from PWM_GRAD_AUTO.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 107 BITS AND NAME TYPE AND RESET DESCRIPTION [7:0] PWM_OFS RW, unsigned 0x1D User-defined PWM amplitude offset (0 to 255) related to full motor current ( CS_ACTUAL =31) in standstill. (Reset default = 30) Use PWM_OFS as initial value for automatic scaling to speed up the automatic tuning process. To do this, set PWM_OFS to the determined, application-specific value, with pwm_autoscale = 0. Only afterwards, set pwm_autoscale =1. Enable StealthChop2, when finished. PWM_OFS = 0 disables scaling down the motor current below a motor- specific lower measurement threshold. This setting should only be used under certain conditions, that is, when the power supply voltage can vary up and down by a factor of two or more. It prevents the motor going out of regulation, but it also prevents power down below the regulation limit. PWM_OFS > 0 allows automatic scaling to low PWM duty cycles even below the lower regulation threshold. This allows low (standstill) current settings based on the actual (hold) current scale (register IHOLD_IRUN). 0x71: MDR.PWM_SCALE Results of StealthChop2 amplitude regulator. These values can be used to monitor automatic PWM amplitude scaling (255 = max. voltage). BITS AND NAME TYPE AND RESET DESCRIPTION [24:16] PWM_SCALE_AUTO R, unsigned 0x000 [9:0] PWM_SCALE_SUM R, unsigned 0x000 value is used for scaling the values CUR_A and CUR_B read from the sine wave table. 1023: maximum duty cycle. This value is extended by two bits [1,0] for higher precision of duty cycle read out. Bits 9..2 correspond to the 8-bit values in other PWM duty cycle related registers. 0x72: MDR.PWM_AUTO These automatically generated values can be read out to determine a default/power -up setting for PWM_GRAD and PWM_OFS. BITS AD NAME TYPE AND RESET DESCRIPTION [23:16] PWM_GRAD_AUTO R, unsigned 0x00 Automatically determined gradient value [7:0] PWM_OFS_AUTO R, unsigned 0x00 Automatically determined offset value

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 108 0x74: MDR.SG4_THRS BITS AND NAME TYPE AND RESET DESCRIPTION [10] sg4_thrs_shl RW 0x0 1: SG4_THRS value is multiplied by two internally. [9] sg_angle_offset RW 0x1 1: Automatic phase shift compensation based on StallGuard4, when switching from StealthChop2 to SpreadCycle controlled using TPWMTHRS. 0: DISABLE No compensation for phaseshift. 1: ENABLE Compensates phaseshift (preferred) [8] sg4_filt_en RW 0x0 Enables the SG4 filter. 1: SG4_RESULT is the average of SG4_IND_0,_1,_2,_3 0: SG4_RESULT uses only SG4_IND_0 0: FILT_DISABLE Disable SG4 filter 1: FILT_ENABLE Enable SG4 filter [7:0] SG4_THRS RW, unsigned 0x00 Detection threshold for stall. The StallGuard4 value SG4_RESULT is compared to this threshold. A stall is signaled with: SG4_RESULT ≤ SG4_THRS SG4_THRS covers half of the possible SG4_RESULT range. 0x75: MDR.SG4_RESULT BITS AND NAME TYPE AND RESET DESCRIPTION [9:0] SG4_RESULT R, unsigned 0x000 StallGuard result for StallGuard4, only. SG4_RESULT is updated with each fullstep, independent of TCOOLTHRS and SG4THRS. A higher value signals a lower motor load and more torque headroom. Intended for StealthChop2 mode only. Bits 9 and 0 always show 0. Scaling to 10-bit is for compatibility to StallGuard2. 0x76: MDR.SG4_IND BITS AND NAME TYPE AND RESET DESCRIPTION [31:24] SG4_IND_3 R, unsigned 0x00 When SG4_filt_en = 1: Displays SG4 measurement 3 used as filter input. [23:16] SG4_IND_2 R, unsigned 0x00 When SG4_filt_en = 1: Displays SG4 measurement 2 used as filter input. [15:8] SG4_IND_1 R, unsigned 0x00 When SG4_filt_en = 1: Displays SG4 measurement 1 used as filter input. [7:0] SG4_IND_0 R, unsigned 0x00 Displays SG4 measurement When SG4_filt_en = 1: Displays SG4 measurement 0 used as filter input.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241 www.analog.com Analog Devices | 109

Ordering Information

PART NUMBER TEMPERATURE RANGE PIN-PACKAGE TMC2241ATU+ -40°C to +125°C 38 TQFN - 5mm x 7mm TMC2241ATU+T -40°C to +125°C 38 TQFN - 5mm x 7mm + Denotes a lead(Pb)-free/RoHS-compliant package. T Denotes tape-and-reel.

65V 2ARMS Smart Integrated Stepper Driver with S/D and SPI TMC2241

Revision History

0 11/25 Initial release — Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. All Analog Devices products contained herein are subject to release and availability. w w w . a n a l o g . c o m Analog Devices | 110