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/c109 Product Folder Sample & Buy T echnical Documents Tools & Software Support & Community TLV700 SLVSA00E –SEPTEMBER 2009–REVISED APRIL 2015 TLV700200-mA,Low-IQ, Low-DropoutRegulatorforPortableDevices
1 Features 3 Description
The TLV700 series of low-dropout (LDO) linear 1• Very Low Dropout: regulators are low quiescent current devices with– 43 mV at IOUT = 50 mA, VOUT = 2.8 V excellent line and load transient performance. These – 85 mV at IOUT = 100 mA, VOUT = 2.8 V LDOs are designed for power-sensitive applications. A precision bandgap and error amplifier provides– 175 mV at IOUT = 200 mA, VOUT = 2.35 V overall 2% accuracy. Low output noise, very high• 2% Accuracy power-supply rejection ratio (PSRR), and low dropout
- Low IQ: 31 μA voltage make this series of devices ideal for most battery-operated handheld equipment. All device• Available in Fixed-Output Voltages from 1.2 V to versions have thermal shutdown and current limit for4.8 V safety.• High PSRR: 68 dB at 1 kHz Furthermore, these devices are stable with an• Stable With Effective Capacitance of 0.1 μF(1) effective output capacitance of only 0.1 μF. This• Thermal Shutdown and Overcurrent Protection feature enables the use of cost-effective capacitors
- Available in 1.5-mm × 1.5-mm SON-6, SOT23-5, that have higher bias voltages and temperature and SC-70 Packages derating. The devices regulate to specified accuracy with no output load.(1) See the Input and Output Capacitor Requirements. The TLV700 series of LDOs are available in 1.5-mm 2 Applications × 1.5-mm SON-6, SOT-5, and SC70 packages.
- Wireless Handsets Device Information(1)
- Smart Phones, PDAs PART NUMBER PACKAGE BODY SIZE (NOM)
- ZigBee® Networks SC70 (5) 2.00 mm × 1.25 mm
- Bluetooth® Devices TL700xx SOT (5) 2.90 mm × 1.60 mm
- Li-Ion Operated Handheld Products WSON (6) 1.50 mm × 1.50 mm
- WLAN and Other PC Add-on Cards (1) For all available packages, see the orderable addendum at the end of the data sheet. Typical Application Circuit An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
SLVSA00E –SEPTEMBER 2009–REVISED APRIL 2015 www.ti.com Table of Contents
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision D (October 2012) to Revision E Page
- Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Changes from Revision C (July 2011) to Revision D Page Changes from Revision B (December, 2010) to Revision C Page Changes from Revision A (April, 2010) to Revision B Page
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Product Folder Links: TLV700
www.ti.com SLVSA00E –SEPTEMBER 2009–REVISED APRIL 2015 Copyright © 2009–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TLV700
(1) IN GND EN OUT N/C (1) IN GND EN 3 4 EN N/C (1) N/C (1) IN GND OUT TLV700 SLVSA00E –SEPTEMBER 2009–REVISED APRIL 2015 www.ti.com
5 Pin Configuration and Functions
(1) No connection. Pin Functions PIN I/O DESCRIPTION NAME WSON SC70 SOT Input pin. A small, 1-μF ceramic capacitor is recommended from this pin to ground IN 1 1 1 I to assure stability and good transient performance. See Input and Output Capacitor Requirements for more details. GND 2 2 2 — Ground pin Enable pin. Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V EN 6 3 3 I puts the regulator into shutdown mode and reduces operating current to 1 μA, nominal. NC 4, 5 4 4 — No connection. This pin can be tied to ground to improve thermal dissipation. Regulated output voltage pin. A small, 1-μF ceramic capacitor is needed from this OUT 3 5 5 O pin to ground to assure stability. See Input and Output Capacitor Requirements for more details.
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Product Folder Links: TLV700
www.ti.com SLVSA00E –SEPTEMBER 2009–REVISED APRIL 2015
6 Specifications
6.1 Absolute Maximum Ratings
over operating junction temperature range (unless otherwise noted) (1) MIN MAX UNIT VIN –0.3 6 Voltage VEN –0.3 6(2) V VOUT –0.3 6 Maximum output current IOUT Internally limited Output short-circuit duration Indefinite Operating junction, TJ –55 150 Temperature °C Storage, Tstg –55 150 (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) VEN absolute maximum rating is VIN + 0.3 V or 6 V, whichever is less.
6.2 ESD Ratings
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V(ESD) Electrostatic discharge VCharged device model (CDM), per JEDEC specification JESD22-C101, ±500all pins(2) (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT VIN 2 5.5 V VOUT 1.2 4.8 V IOUT 0 200 mA
6.4 Thermal Information
THERMAL METRIC(1) DCK [SC70] DDC [SOT] DSE [WSON] UNIT
5 PINS 5 PINS 6 PINS
RθJA Junction-to-ambient thermal resistance 307.6 235.9 321.3 RθJC(top) Junction-to-case (top) thermal resistance 79.1 61.9 207.9 RθJB Junction-to-board thermal resistance 93.7 54 281.5 °C/W ψJT Junction-to-top characterization parameter 1.3 0.8 42.4 ψJB Junction-to-board characterization parameter 92.8 53.4 284.8 RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a 142.3 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Copyright © 2009–2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: TLV700
SLVSA00E –SEPTEMBER 2009–REVISED APRIL 2015 www.ti.com
6.5 Electrical Characteristics
At VIN = VOUT(nom) + 0.3 V or 2 V (whichever is greater); IOUT = 10 mA, VEN = 0.9 V, COUT = 1 μF, and TJ = –40°C to +125°C, unless otherwise noted. Typical values are at TJ = 25°C. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIN Input voltage range 2 5.5 V VOUT DC output accuracy –40°C ≤ TJ ≤ +125°C –2% 2% VOUT(nom) + 0.3 V ≤ VIN ≤ 5.5 V,ΔVOUT(ΔVIN) Line regulation 1 5 mVIOUT = 10 mA ΔVOUT(ΔIOUT) Load regulation 0 mA ≤ IOUT ≤ 200 mA 1 15 mV VIN = 0.98 × VOUT(nom), IOUT = 50 mA, 43VOUT = 2.8 V VIN = 0.98 × VOUT(nom), IOUT = 100 mA,VDO Dropout voltage(1) 85 mVVOUT = 2.8 V VIN = 0.98 × VOUT(nom), IOUT = 200 mA, 175 250VOUT = 2.35 V ICL Output current limit VOUT = 0.9 × VOUT(nom) 220 860 mA IOUT = 0 mA 31 55 IGND Ground pin current μA IOUT = 200 mA, VIN = VOUT + 0.5 V 270 VEN ≤ 0.4 V, VIN = 2 V 400 nA ISHDN Ground pin current (shutdown) VEN ≤ 0.4 V, 2 V ≤ VIN ≤ 4.5 V 1 2 μA VIN = 2.3 V, VOUT = 1.8 V,PSRR Power-supply rejection ratio 68 dBIOUT = 10 mA, f = 1 kHz BW = 100 Hz to 100 kHz,Vn Output noise voltage 48 μVRMSVIN = 2.3 V, VOUT = 1.8 V, IOUT = 10 mA tSTR Start-up time(2) COUT = 1 μF, IOUT = 200 mA 100 μs VEN(high) Enable pin high (enabled) 0.9 VIN V VEN(low) Enable pin low (disabled) 0 0.4 V IEN Enable pin current VIN = VEN = 5.5 V 0.04 0.5 μA UVLO Undervoltage lockout VIN rising 1.9 V Shutdown, temperature increasing 160 Tsd Thermal shutdown temperature °C Reset, temperature decreasing 140 TJ Operating junction temperature –40 125 °C (1) VDO is measured for devices with VOUT(nom) ≥ 2.35 V. (2) Start-up time = time from EN assertion to 0.98 × VOUT(nom).
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Product Folder Links: TLV700
40 C/c45
6.6 Typical Characteristics
VEN = VIN, COUT = 1 μF, unless otherwise noted. Typical values are at TJ = 25°C. Figure 1. TLV70018 Line Regulation Figure 2. TLV70018 Line Regulation Figure 3. TLV70018 Load Regulation Figure 4. Dropout Voltage vs Input Voltage Figure 5. Dropout Voltage vs Output Current, VOUT = 4.8 V Figure 6. TLV70018 Output Voltage vs Temperature
VEN = VIN, COUT = 1 μF, unless otherwise noted. Typical values are at TJ = 25°C. Figure 8. TLV70018 Ground Pin Current vs LoadFigure 7. TLV70018 Ground Pin Current vs Input Voltage Figure 9. TLV70018 Ground Pin Current vs Temperature Figure 10. TLV70018 Shutdown Current vs Input Voltage Figure 11. TLV70018 Power-Supply Ripple Rejection vs Figure 12. TLV70018 Power-Supply Ripple Rejection vs
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VEN = VIN, COUT = 1 μF, unless otherwise noted. Typical values are at TJ = 25°C. Figure 19. TLV70018 Line Transient Response Figure 20. TLV70018 VIN Ramp-Up, Ramp-Down Response
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TLV700xx□Series TLV700 www.ti.com SLVSA00E –SEPTEMBER 2009–REVISED APRIL 2015
7 Detailed Description
7.1 Overview
The TLV700 series of LDO linear regulators are low quiescent current devices with excellent line and load transient performance. These LDOs are designed for power-sensitive applications. A precision bandgap and error amplifier provides overall 2% accuracy. Low output noise, very high PSRR, and low dropout voltage make this series of devices ideal for most battery-operated handheld equipment. All device versions have integrated thermal shutdown, current limit, and undervoltage lockout (UVLO).
7.2 Functional Block Diagram
7.3 Feature Description
7.3.1 Internal Current Limit
The TLV700 internal current limit helps to protect the regulator during fault conditions. During current limit, the output sources a fixed amount of current that is largely independent of the output voltage. In such a case, the output voltage is not regulated, and is VOUT = ICL × RLOAD. The PMOS pass transistor dissipates (VIN – VOUT) × ICL until thermal shutdown is triggered and the device turns off. As the device cools down, it is turned on by the internal thermal shutdown circuit. If the fault condition continues, the device cycles between current limit and thermal shutdown. See Thermal Protection for more details. The PMOS pass element in the TLV700 has a built-in body diode that conducts current when the voltage at OUT exceeds the voltage at IN. This current is not limited, so if extended reverse voltage operation is anticipated, external limiting to 5% of the rated output current is recommended.
7.3.2 Shutdown
The enable pin (EN) is active high. The device is enabled when voltage at EN pin goes above 0.9 V. The device is turned off when the EN pin is held at less than 0.4 V. When shutdown capability is not required, EN can be connected to the IN pin. Copyright © 2009–2015, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: TLV700
7.3.3 Dropout Voltage
behaves as a resistor in dropout. As with any linear regulator, PSRR and transient response are degraded as (VIN – VOUT) approaches dropout. This effect is shown in Figure 12 in Typical Characteristics.
7.3.4 Undervoltage Lockout (UVLO)
The TLV700 uses a UVLO circuit to keep the output shut off until internal circuitry is operating properly.
7.4 Device Functional Modes
7.4.1 Normal Operation
- The input voltage is greater than the nominal output voltage added to the dropout voltage.
- The output current is less than the current limit.
- The input voltage is greater than the UVLO voltage.
7.4.2 Dropout Operation
the LDO. Line or load transients in dropout may result in large output voltage deviations. Table 1 lists the conditions that lead to the different modes of operation. Table 1. Device Functional Mode Comparison
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8 Application and Implementation
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.2 Typical Application
Figure 21 shows a typical application circuit. Figure 21. Typical Application Circuit
8.2.1 Design Requirements
Table 2 lists the design parameters. Table 2. Design Parameters
8.2.2 Detailed Design Procedure
8.2.2.1 Input and Output Capacitor Requirements
variation in value and equivalent series resistance (ESR) over temperature. However, the TLV700 is designed to be stable with an effective capacitance of 0.1 μF or larger at the output. smaller footprint capacitors that have higher derating in size- and space-constrained applications.
source. If source impedance is more than 2 Ω, a 0.1-μF input capacitor may be necessary to ensure stability.
8.2.2.2 Transient Response
but increases the duration of the transient response.
8.2.3 Application Curves
Figure 23. TLV70018 Line Transient ResponseFigure 22. TLV70018 Load Transient Response
9 Power Supply Recommendations
start-up or load transient events.
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10 Layout
10.1 Layout Guidelines
pin of the device. High ESR capacitors may degrade PSRR performance.
10.2 Layout Examples
Figure 24. Layout Example for the DCK and DDC Package Figure 25. Layout Example for the DSE Package
10.3 Thermal Protection
protection is triggered; use worst-case loads and signal conditions. the highest expected ambient temperature and worst-case load.
P =□(V V ) I/c45 /c180D IN OUT OUT TLV700 SLVSA00E –SEPTEMBER 2009–REVISED APRIL 2015 www.ti.com Thermal Protection (continued) The internal protection circuitry of the TLV700 has been designed to protect against overload conditions. The protection circuitry was not intended to replace proper heatsinking. Continuously running the TLV700 into thermal shutdown degrades device reliability.
10.4 Power Dissipation
The ability to remove heat from the die is different for each package type, presenting different considerations in the PCB layout. The PCB area around the device that is free of other components moves the heat from the device to the ambient air. Performance data for JEDEC low and high-K boards are given in Thermal Information. Using heavier copper increases the effectiveness in removing heat from the device. The addition of plated through-holes to heat-dissipating layers also improves heatsink effectiveness. Power dissipation depends on input voltage and load conditions. Power dissipation (PD) is equal to the product of the output current and the voltage drop across the output pass element, as shown in Equation 1. (1)
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Product Folder Links: TLV700
11 Device and Documentation Support
11.1 Device Support
11.1.1 Development Support
11.1.1.1 Evaluation Modules
- TLV70033EVM-503
- TLV70018EVM-503
- TLV70028EVM-463 These EVMs can be requested at the Texas Instruments website through the product folders or purchased directly from the TI eStore.
11.1.1.2 Spice Models
11.1.2 Device Nomenclature
Table 3. Ordering Information(1) TLV700xx yyyz XX is nominal output voltage (for example, 28 = 2.8 V). YYY is the package designator. Z is tape and reel quantity (R = 3000, T = 250). device product folder at www.ti.com. (2) Output voltages from 1.2 V to 4.8 V in 50-mV increments are available. Contact factory for details and availability.
11.2 Documentation Support
11.2.1 Related Documentation
- Using the TLV700xxEVM-463 Evaluation Module, SLUU390
- Using the TLV700xxEVM-503 Evaluation Module, SLUU391
11.3 Trademarks
Bluetooth is a registered trademark of Bluetooth SIG. ZigBee is a registered trademark of the ZigBee Alliance. All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
during storage or handling to prevent electrostatic damage to the MOS gates.
11.5 Glossary
This glossary lists and explains terms, acronyms, and definitions.
SLVSA00E –SEPTEMBER 2009–REVISED APRIL 2015 www.ti.com
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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Product Folder Links: TLV700
www.ti.com 14-Jan-2016 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples TLV70012DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 ODT TLV70012DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 ODT TLV70012DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 ODO TLV70012DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 ODO TLV70012DSER ACTIVE WSON DSE 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 NH TLV70012DSET ACTIVE WSON DSE 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 NH TLV70013DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 SAH TLV70013DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 SAH TLV70015DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 ODU TLV70015DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 ODU TLV70015DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 ODP TLV70015DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 ODP TLV70015DSER ACTIVE WSON DSE 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 NJ TLV70015DSET ACTIVE WSON DSE 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 NJ TLV70018DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 ODV TLV70018DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 ODV TLV70018DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 ODK
www.ti.com 14-Jan-2016 Addendum-Page 2 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples TLV70018DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 ODK TLV70018DSER ACTIVE WSON DSE 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 NK TLV70018DSET ACTIVE WSON DSE 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 NK TLV70019DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 SCJ TLV70019DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 SCJ TLV70022DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 SCI TLV70022DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 SCI TLV70025DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 QTP TLV70025DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 QTP TLV70025DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 DAU TLV70025DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 DAU TLV70025DSER ACTIVE WSON DSE 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 QY TLV70025DSET ACTIVE WSON DSE 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 QY TLV70028DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 ODW TLV70028DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 ODW TLV70028DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 ODL TLV70028DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 ODL TLV70028DSER ACTIVE WSON DSE 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 NL
www.ti.com 14-Jan-2016 Addendum-Page 3 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples TLV70028DSET ACTIVE WSON DSE 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 NL TLV70029DSER ACTIVE WSON DSE 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 QJ TLV70029DSET ACTIVE WSON DSE 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 QJ TLV70030DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 ODR TLV70030DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 ODR TLV70030DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 ODM TLV70030DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 ODM TLV70030DSER ACTIVE WSON DSE 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 NP TLV70030DSET ACTIVE WSON DSE 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 NP TLV70031DSER ACTIVE WSON DSE 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 C4 TLV70031DSET ACTIVE WSON DSE 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 C4 TLV70032DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 SCH TLV70032DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 SCH TLV70033DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 ODS TLV70033DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 ODS TLV70033DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 ODN TLV70033DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 ODN TLV70033DSER ACTIVE WSON DSE 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 NR
www.ti.com 14-Jan-2016 Addendum-Page 4 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples TLV70033DSET ACTIVE WSON DSE 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 NR TLV70036DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 SCG TLV70036DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 SCG TLV70036DSER ACTIVE WSON DSE 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 UG TLV70036DSET ACTIVE WSON DSE 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 UG (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width.
www.ti.com 14-Jan-2016 Addendum-Page 5 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2016 Pack Materials-Page 1
(mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2016 Pack Materials-Page 2
(mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2016 Pack Materials-Page 3
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV70012DCKR SC70 DCK 5 3000 180.0 180.0 18.0 TLV70012DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TLV70012DCKT SC70 DCK 5 250 202.0 201.0 28.0 TLV70012DCKT SC70 DCK 5 250 180.0 180.0 18.0 TLV70012DDCR SOT DDC 5 3000 195.0 200.0 45.0 TLV70012DDCR SOT DDC 5 3000 406.0 348.0 63.0 TLV70012DDCT SOT DDC 5 250 202.0 201.0 28.0 TLV70012DDCT SOT DDC 5 250 195.0 200.0 45.0 TLV70012DSER WSON DSE 6 3000 202.0 201.0 28.0 TLV70012DSET WSON DSE 6 250 202.0 201.0 28.0 TLV70013DDCR SOT DDC 5 3000 202.0 201.0 28.0 TLV70013DDCT SOT DDC 5 250 223.0 270.0 35.0 TLV70015DCKR SC70 DCK 5 3000 180.0 180.0 18.0 TLV70015DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TLV70015DCKT SC70 DCK 5 250 180.0 180.0 18.0 TLV70015DCKT SC70 DCK 5 250 202.0 201.0 28.0 TLV70015DDCR SOT DDC 5 3000 195.0 200.0 45.0 TLV70015DDCR SOT DDC 5 3000 223.0 270.0 35.0 TLV70015DDCT SOT DDC 5 250 195.0 200.0 45.0 TLV70015DDCT SOT DDC 5 250 223.0 270.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2016 Pack Materials-Page 4
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV70015DSER WSON DSE 6 3000 202.0 201.0 28.0 TLV70015DSET WSON DSE 6 250 202.0 201.0 28.0 TLV70018DCKR SC70 DCK 5 3000 180.0 180.0 18.0 TLV70018DCKR SC70 DCK 5 3000 203.0 203.0 35.0 TLV70018DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TLV70018DCKT SC70 DCK 5 250 203.0 203.0 35.0 TLV70018DCKT SC70 DCK 5 250 180.0 180.0 18.0 TLV70018DCKT SC70 DCK 5 250 202.0 201.0 28.0 TLV70018DDCR SOT DDC 5 3000 195.0 200.0 45.0 TLV70018DDCR SOT DDC 5 3000 223.0 270.0 35.0 TLV70018DDCT SOT DDC 5 250 195.0 200.0 45.0 TLV70018DDCT SOT DDC 5 250 223.0 270.0 35.0 TLV70018DSER WSON DSE 6 3000 202.0 201.0 28.0 TLV70018DSER WSON DSE 6 3000 203.0 203.0 35.0 TLV70018DSET WSON DSE 6 250 202.0 201.0 28.0 TLV70019DDCR SOT DDC 5 3000 195.0 200.0 45.0 TLV70019DDCT SOT DDC 5 250 195.0 200.0 45.0 TLV70022DDCR SOT DDC 5 3000 195.0 200.0 45.0 TLV70022DDCT SOT DDC 5 250 195.0 200.0 45.0 TLV70025DCKR SC70 DCK 5 3000 203.0 203.0 35.0 TLV70025DCKR SC70 DCK 5 3000 180.0 180.0 18.0 TLV70025DCKT SC70 DCK 5 250 203.0 203.0 35.0 TLV70025DCKT SC70 DCK 5 250 180.0 180.0 18.0 TLV70025DDCR SOT DDC 5 3000 223.0 270.0 35.0 TLV70025DDCR SOT DDC 5 3000 195.0 200.0 45.0 TLV70025DDCT SOT DDC 5 250 223.0 270.0 35.0 TLV70025DDCT SOT DDC 5 250 195.0 200.0 45.0 TLV70025DSER WSON DSE 6 3000 202.0 201.0 28.0 TLV70025DSER WSON DSE 6 3000 203.0 203.0 35.0 TLV70025DSET WSON DSE 6 250 202.0 201.0 28.0 TLV70025DSET WSON DSE 6 250 203.0 203.0 35.0 TLV70028DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TLV70028DCKR SC70 DCK 5 3000 180.0 180.0 18.0 TLV70028DCKT SC70 DCK 5 250 202.0 201.0 28.0 TLV70028DCKT SC70 DCK 5 250 180.0 180.0 18.0 TLV70028DDCR SOT DDC 5 3000 195.0 200.0 45.0 TLV70028DDCR SOT DDC 5 3000 223.0 270.0 35.0 TLV70028DDCT SOT DDC 5 250 195.0 200.0 45.0 TLV70028DDCT SOT DDC 5 250 223.0 270.0 35.0 TLV70028DSER WSON DSE 6 3000 205.0 200.0 33.0 TLV70028DSER WSON DSE 6 3000 202.0 201.0 28.0 TLV70028DSET WSON DSE 6 250 205.0 200.0 33.0 TLV70028DSET WSON DSE 6 250 202.0 201.0 28.0 TLV70029DSER WSON DSE 6 3000 202.0 201.0 28.0 PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2016 Pack Materials-Page 5
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV70029DSET WSON DSE 6 250 202.0 201.0 28.0 TLV70030DCKR SC70 DCK 5 3000 180.0 180.0 18.0 TLV70030DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TLV70030DCKR SC70 DCK 5 3000 203.0 203.0 35.0 TLV70030DCKT SC70 DCK 5 250 180.0 180.0 18.0 TLV70030DCKT SC70 DCK 5 250 203.0 203.0 35.0 TLV70030DCKT SC70 DCK 5 250 202.0 201.0 28.0 TLV70030DDCR SOT DDC 5 3000 195.0 200.0 45.0 TLV70030DDCR SOT DDC 5 3000 223.0 270.0 35.0 TLV70030DDCT SOT DDC 5 250 223.0 270.0 35.0 TLV70030DDCT SOT DDC 5 250 195.0 200.0 45.0 TLV70030DSER WSON DSE 6 3000 202.0 201.0 28.0 TLV70030DSET WSON DSE 6 250 202.0 201.0 28.0 TLV70031DSER WSON DSE 6 3000 202.0 201.0 28.0 TLV70031DSET WSON DSE 6 250 202.0 201.0 28.0 TLV70032DDCR SOT DDC 5 3000 202.0 201.0 28.0 TLV70032DDCT SOT DDC 5 250 223.0 270.0 35.0 TLV70033DCKR SC70 DCK 5 3000 180.0 180.0 18.0 TLV70033DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TLV70033DCKT SC70 DCK 5 250 202.0 201.0 28.0 TLV70033DCKT SC70 DCK 5 250 180.0 180.0 18.0 TLV70033DDCR SOT DDC 5 3000 223.0 270.0 35.0 TLV70033DDCR SOT DDC 5 3000 195.0 200.0 45.0 TLV70033DDCT SOT DDC 5 250 195.0 200.0 45.0 TLV70033DDCT SOT DDC 5 250 223.0 270.0 35.0 TLV70033DSER WSON DSE 6 3000 202.0 201.0 28.0 TLV70033DSER WSON DSE 6 3000 205.0 200.0 33.0 TLV70033DSET WSON DSE 6 250 202.0 201.0 28.0 TLV70033DSET WSON DSE 6 250 205.0 200.0 33.0 TLV70036DDCR SOT DDC 5 3000 202.0 201.0 28.0 TLV70036DDCT SOT DDC 5 250 223.0 270.0 35.0 TLV70036DSER WSON DSE 6 3000 202.0 201.0 28.0 TLV70036DSET WSON DSE 6 250 202.0 201.0 28.0 PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2016 Pack Materials-Page 6
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