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/c109 EN N/C N/C IN GND OUT TLV700xx□DSE 1,5-mm□x□1,5-mm□SON (TOP□VIEW) TLV700xxDDC TSOT23-5 (TOP□VIEW) OUT N/C IN GND EN TLV700xx□DCK SC70-5□PACKAGE (TOP□VIEW) OUT N/C IN GND EN 3 4 TLV700xx www.ti.com SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 200-mA,Low-IQ,Low-DropoutRegulatorforPortableDevices 1FEATURES DESCRIPTION The TLV700xx seriesof low-dropout(LDO) linear 234• Very Low Dropout: regulatorsare low quiescentcurrentdevices with– 43 mV atIOUT = 50 mA, VOUT = 2.8V excellentlineand loadtransientperformance.These – 85 mV atIOUT = 100 mA, VOUT = 2.8V LDOs are designedforpower-sensitiveapplications. A precisionbandgap and erroramplifierprovides– 175 mV atIOUT = 200 mA, VOUT = 2.35V overall2% accuracy.Low outputnoise,very high• 2% Accuracy power-supplyrejectionratio(PSRR), and low dropout
- Low IQ :31 μA voltagemake thisseriesof devicesidealformost battery-operatedhandheld equipment. All device• AvailableinFixed-OutputVoltagesfrom 1.2V versionshave thermalshutdown and currentlimitforto4.8V safety.• High PSRR: 68 dB at1 kHz Furthermore,these devices are stable with an• StablewithEffectiveCapacitanceof0.1μF(1) effectiveoutputcapacitanceof only 0.1 μF. This• Thermal Shutdown and OvercurrentProtection featureenablesthe use of cost-effectivecapacitors
- Availablein1,5-mm × 1,5-mm SON-6, SOT23-5, that have higher bias voltagesand temperature and SC-70 Packages derating.The devicesregulateto specifiedaccuracy withno outputload.(1) See theInputand OutputCapacitorRequirementsinthe 1,5-mm x 1,5-mm SON-6, TSOT23-5, and SC-70 APPLICATIONS packages.
- WirelessHandsets space
- Smart Phones, PDAs space
- MP3 Players
- ZigBee® Networks
- Bluetooth® Devices
- Li-IonOperated Handheld Products
- WLAN and Other PC Add-on Cards TypicalApplicationCircuit(Fixed-Voltage Versions) Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsofTexas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2Bluetoothisa registeredtrademarkofBluetoothSIG. 3ZigBeeisa registeredtrademarkoftheZigBeeAlliance. 4Allothertrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2009–2011,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.
SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 www.ti.com This integratedcircuitcan be damaged by ESD. Texas Instrumentsrecommends thatallintegratedcircuitsbe handled with appropriateprecautions.Failuretoobserveproperhandlingand installationprocedurescan cause damage. ESD damage can rangefromsubtleperformancedegradationtocompletedevicefailure.Precisionintegratedcircuitsmay be more susceptibletodamage because verysmallparametricchanges couldcause thedevicenottomeet itspublishedspecifications. ORDERING INFORMATION (1) PRODUCT VOUT (2) TLV700 xx yyy z XX isnominaloutputvoltage(forexample,28 = 2.8V). YYY isthepackage designator. Z istapeand reelquantity(R = 3000,T = 250). (1) Forthemost currentpackage and orderinginformationsee thePackage OptionAddendum attheend ofthisdocument,orvisitthe deviceproductfolderatwww.ti.com. (2) Outputvoltagesfrom1.2V to4.8V in50-mV incrementsareavailable.Contactfactoryfordetailsand availability. ABSOLUTE MAXIMUM RATINGS (1) AtTJ = –40°C to+125°C (unlessotherwisenoted).AllvoltagesarewithrespecttoGND. PARAMETER TLV700xx UNIT Inputvoltagerange,VIN –0.3to+6.0 V Enablevoltagerange,VEN –0.3to+6.0(2) V Outputvoltagerange,VOUT –0.3to+6.0 V Maximum outputcurrent,IOUT Internallylimited Outputshort-circuitduration Indefinite Totalcontinuouspower dissipation,PDISS See DissipationRatingsTable Human body model (HBM) 2 kV ESD rating Charged devicemodel (CDM) 500 V Operatingjunctiontemperaturerange,TJ –55 to+150 °C Storagetemperaturerange,TSTG –55 to+150 °C (1) Stressesabove theseratingsmay cause permanentdamage. Exposuretoabsolutemaximum conditionsforextendedperiodsmay degradedevicereliability.These arestressratingsonly,and functionaloperationofthedeviceattheseorany otherconditionsbeyond thosespecifiedisnotimplied. (2) VEN absolutemaximum ratingisVIN + 0.3V or6.0V,whicheverisless. DISSIPATION RATINGS DERATING FACTOR BOARD PACKAGE R θJC R θJA ABOVE TA = +25°C TA < +25°C TA = +70°C TA = +85°C Low-K (1) DCK 165°C/W 395°C/W 2.5mW/ °C 250 mW 140 mW 100 mW High-K(2) DCK 165°C/W 315°C/W 3.2mW/ °C 320 mW 175 mW 130 mW High-K(2) DSE 67°C/W 180°C/W 4.55mW/ °C 555 mW 305 mW 222 mW Low-K(1) DDC 90°C/W 280°C/W 3.6mW/ °C 360 mW 200 mW 145 mW High-K(2) DDC 90°C/W 200°C/W 5.0mW/ °C 500 mW 275 mW 200 mW (1) The JEDEC low-K(1s)boardused toderivethisdatawas a 3-inch× 3-inch,two-layerboardwith2-ouncecoppertraceson topofthe board. (2) The JEDEC high-K(2s2p)boardused toderivethisdatawas a 3-inch× 3-inch,multilayerboardwith1-ounceinternalpower and groundplanesand 2-ouncecoppertraceson topand bottomoftheboard.
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www.ti.com SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011
ELECTRICAL CHARACTERISTICS
AtVIN = VOUT(Typ) + 0.3V or2.0V (whicheverisgreater);IOUT = 10 mA, VEN = 0.9V,C OUT = 1.0μF,and TJ = –40°C to +125°C, unlessotherwisenoted.TypicalvaluesareatTJ = +25°C. space PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIN Inputvoltagerange 2.0 5.5 V VOUT DC outputaccuracy –40°C ≤ TJ ≤ +125°C –2 +2 % VOUT(NOM) + 0.3V ≤ VIN ≤ 5.5V,ΔVO /ΔVIN Lineregulation 1 5 mVIOUT = 10 mA ΔVO /ΔIOUT Load regulation 0 mA ≤ IOUT ≤ 200 mA 1 15 mV VIN = 0.98× VOUT(NOM) ,IOUT = 50 mA, 43 mVVOUT = 2.8V VIN = 0.98× VOUT(NOM) ,IOUT = 100 mA,VDO Dropoutvoltage(1) 85 mVVOUT = 2.8V VIN = 0.98× VOUT(NOM) ,IOUT = 200 mA, 175 250 mVVOUT = 2.35V ICL Outputcurrentlimit VOUT = 0.9× VOUT(NOM) 220 860 mA IOUT = 0 mA 31 55 μA IGND Ground pincurrent IOUT = 200 mA, VIN = VOUT + 0.5V 270 μA VEN ≤ 0.4V,VIN = 2.0V 400 nA ISHDN Ground pincurrent(shutdown) VEN ≤ 0.4V,2.0V ≤ VIN ≤ 4.5V 1 2 μA VIN = 2.3V,VOUT = 1.8V,PSRR Power-supplyrejectionratio 68 dBIOUT = 10 mA, f= 1 kHz BW = 100 Hz to100 kHz,VN Outputnoisevoltage 48 μVRMSVIN = 2.3V,VOUT = 1.8V,IOUT = 10 mA tSTR Startuptime(2) C OUT = 1.0μF,IOUT = 200 mA 100 μs VEN(HI) Enablepinhigh(enabled) 0.9 VIN V VEN(LO) Enablepinlow(disabled) 0 0.4 V IEN Enablepincurrent VIN = VEN = 5.5V 0.04 0.5 μA UVLO Undervoltagelockout VIN rising 1.9 V Shutdown,temperatureincreasing +160 °C TSD Thermalshutdowntemperature Reset,temperaturedecreasing +140 °C TJ Operatingjunctiontemperature –40 +125 °C (1) VDO ismeasured fordeviceswithVOUT(NOM) ≥ 2.35V. (2) Startuptime= timefromEN assertionto0.98× VOUT(NOM) . Copyright© 2009–2011,Texas InstrumentsIncorporated 3
TLV700xx□Series TLV700xx SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 www.ti.com FUNCTIONAL BLOCK DIAGRAM Figure1. TLV700xx
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(1) IN GND EN 3 4 OUT N/C (1) IN GND EN EN N/C (1) N/C (1) IN GND OUT TLV700xx www.ti.com SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 PIN CONFIGURATIONS DDC PACKAGE DCK PACKAGETSOT23-5 SC70-5(TOP VIEW) (TOP VIEW) DSE PACKAGE SON-6 (TOP VIEW) (1) No connection. PIN DESCRIPTIONS SON-6 SC70-5 TSOT23-5 NAME DSE DCK DDC DESCRIPTION Inputpin.A small1-μF ceramiccapacitorisrecommended fromthispintoground IN 1 1 1 toassurestabilityand good transientperformance.See Inputand OutputCapacitor RequirementsintheApplicationInformationsectionformore details. GND 2 2 2 Ground pin Enablepin.DrivingEN over0.9V turnson theregulator.DrivingEN below0.4V EN 6 3 3 putstheregulatorintoshutdownmode and reducesoperatingcurrentto1 μA, nominal. NC 4,5 4 4 No connection.Thispincan be tiedtogroundtoimprovethermaldissipation. Regulatedoutputvoltagepin.A small1-μF ceramiccapacitorisneeded fromthis OUT 3 5 5 pintogroundtoassurestability.See Inputand OutputCapacitorRequirementsin theApplicationInformationsectionformore details. Copyright© 2009–2011,Texas InstrumentsIncorporated 5
Input□Voltage□(V) 1.90 1.88 1.86 1.84 1.82 1.80 1.78 1.76 1.74 1.72 1.70 Output□Voltage□(V) +125 C +85 C +25 C
40 C/c45
/c176 /c176 /c176 /c176 I =□10□mAOUT Input□Voltage□(V) 1.90 1.88 1.86 1.84 1.82 1.80 1.78 1.76 1.74 1.72 1.70 Output□Voltage□(V) +125 C +85 C +25 C /c176 /c176 /c176 /c176 I =□200□mAOUT 0 40 60 100 120 140 180 200 Output□Current□(mA) 1.90 1.88 1.86 1.84 1.82 1.80 1.78 1.76 1.74 1.72 1.70 Output□Voltage□(V) +125 C +85 C +25 C /c176 /c176 /c176 /c176 20 80 160 250 200 150 100 Dropout□Voltage□(mV) Input□Voltage□(V) +125 C +85 C +25 C /c176 /c176 /c176 /c176 I =□200□mAOUT 1.90 1.88 1.86 1.84 1.82 1.80 1.78 1.76 1.74 1.72 1.70 Output□Voltage□(V) /c45 40 /c45 25 /c45 10 5 20 35 50 65 80 95 110 125 T emperature□( C)/c176 I =□200□mA I =□10□mA I =□150□mA OUT OUT OUT 0 30 60 90 120 150 180 210 Output□Current□(mA) 180 160 140 120 100 Dropout□Voltage□(V) +125 C +85 C +25 C /c176 /c176 /c176 /c176 TLV700xx SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 www.ti.com TYPICAL CHARACTERISTICS Over operatingtemperaturerange(TJ = –40°C to+125°C),VIN = VOUT(TYP) + 0.5V or2.0V,whicheverisgreater;IOUT = 10 mA, VEN = VIN,C OUT = 1.0μF,unlessotherwisenoted.TypicalvaluesareatTJ = +25°C. TLV70018 TLV70018 LINE REGULATION LINE REGULATION Figure2. Figure3. TLV70018 DROPOUT VOLTAGE LOAD REGULATION vs INPUT VOLTAGE Figure4. Figure5. DROPOUT VOLTAGE vs OUTPUT CURRENT TLV70018 VOUT = 4.8V OUTPUT VOLTAGE vs TEMPERATURE Figure6. Figure7.
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+125 C +85 C +25 C /c176 /c176 /c176 /c176 300 250 200 150 100 Ground□Pin□Current□( A) /c109 0 20 40 60 80 100 120 140 160 180 200 Output□Current□(mA) Input□Voltage□(V) Ground□Pin□Current□( A) /c109 +125 C +85 C +25 C /c176 /c176 /c176 /c176 I =□0□mAOUT Ground□Pin□Current□( A) /c109 /c45 40 /c45 25 /c45 10 5 20 35 50 65 80 95 110 125 T emperature□( C)/c176 I =□0□mAOUT Input□Voltage□(V) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 Shutdown□Current□( A) /c109 +125 C +85 C +25 C /c176 /c176 /c176 100 PSRR□(dB) 10 100 1□k 10□k 100□k 1□M 10□M Frequency□(Hz) I =□150□mAOUT I =□10□mAOUT V V =□0.5□VIN OUT/c45 Input□Voltage□(V) PSRR□(dB) 10□kHz 100□kHz 1□kHz TLV700xx www.ti.com SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 TYPICAL CHARACTERISTICS (continued) Over operatingtemperaturerange(TJ = –40°C to+125°C),VIN = VOUT(TYP) + 0.5V or2.0V,whicheverisgreater;IOUT = 10 mA, VEN = VIN,C OUT = 1.0μF,unlessotherwisenoted.TypicalvaluesareatTJ = +25°C. TLV70018 TLV70018 GROUND PIN CURRENT vs INPUT VOLTAGE GROUND PIN CURRENT vs LOAD Figure8. Figure9. TLV70018 TLV70018 GROUND PIN CURRENT vs TEMPERATURE SHUTDOWN CURRENT vs INPUT VOLTAGE Figure10. Figure11. TLV70018 TLV70018 POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY POWER-SUPPLY RIPPLE REJECTION vs INPUT VOLTAGE Figure12. Figure13. Copyright© 2009–2011,Texas InstrumentsIncorporated 7
100□mA/div 50□mV/div 10 s/div/c109 VOUT VIN =□2.1□V IOUT 200□mA 0□mA t =□t =□1 sR F /c109 0.1 0.01 0Output□Spectral□Noise□Density□( V/ ) /c109 Hz/c214 10 100 1□k 10□k 100□k 1□M 10□M Frequency□(Hz) I =□10□mA C =□C =□1 F OUT /c109IN OUT 20□mA/div 5□mV/div 10 s/div/c109 VOUT VIN =□2.3□V IOUT 10□mA 0□mA t =□t =□1 sR F /c109 50□mA/div 20□mV/div 10 s/div/c109 VOUT VIN =□2.3□V IOUT 50□mA 0□mA t =□t =□1 sR F /c109 1□V/div 5□mV/div 1□ms/div VOUT VIN2.9□V 2.3□V I 200□mAOUT = 1□V/div 5□mV/div 1□ms/div VOUT VIN 2.7□V 2.3□V I 1□mAOUT = TLV700xx SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) Over operatingtemperaturerange(TJ = –40°C to+125°C),VIN = VOUT(TYP) + 0.5V or2.0V,whicheverisgreater;IOUT = 10 mA, VEN = VIN,C OUT = 1.0μF,unlessotherwisenoted.TypicalvaluesareatTJ = +25°C. TLV70018 OUTPUT SPECTRAL NOISE DENSITY TLV70018 vs OUTPUT VOLTAGE LOAD TRANSIENT RESPONSE Figure14. Figure15. TLV70018 TLV70018 LOAD TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE Figure16. Figure17. TLV70018 TLV70018 LINE TRANSIENT RESPONSE LINE TRANSIENT RESPONSE Figure18. Figure19.
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1□V/div 10□mV/div 1□ms/div VOUT VIN5.5□V 2.1□V I 200□mAOUT = 1□V/div 200□ms/div VOUT VIN I 1□mAOUT = TLV700xx www.ti.com SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 TYPICAL CHARACTERISTICS (continued) Over operatingtemperaturerange(TJ = –40°C to+125°C),VIN = VOUT(TYP) + 0.5V or2.0V,whicheverisgreater;IOUT = 10 mA, VEN = VIN,C OUT = 1.0μF,unlessotherwisenoted.TypicalvaluesareatTJ = +25°C. TLV70018 TLV70018 LINE TRANSIENT RESPONSE VIN RAMP UP, RAMP DOWN RESPONSE Figure20. Figure21. Copyright© 2009–2011,Texas InstrumentsIncorporated 9
SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 www.ti.com
APPLICATION INFORMATION
The TLV700xx belongs to a new family of next-generationvalueLDO regulators.These devices Board Layout Recommendations toImprove consume low quiescentcurrentand deliverexcellent PSRR and Noise Performance connection for the output capacitorshould beInputand Output CapacitorRequirements connecteddirectlytotheGND pinofthedevice.High 1.0-μF X5R- and X7R-type ceramic capacitorsare ESR capacitorsmay degradePSRR performance. recommended because these capacitors have minimal variationin value and equivalentseries InternalCurrentLimit resistance(ESR) overtemperature. The TLV700xx internalcurrentlimithelpsto protect However,theTLV700xx isdesignedtobe stablewith the regulatorduringfaultconditions.Duringcurrent an effectivecapacitanceof 0.1 μF or largerat the limit,the outputsources a fixedamount of current output.Thus, the deviceisstablewithcapacitorsof thatislargelyindependentof the outputvoltage.In otherdielectrictypesas well,as longas theeffective such a case,theoutputvoltageisnotregulated,and capacitance under operating bias voltage and isVOUT = ILIMIT × R LOAD . The PMOS pass transistor temperatureis greaterthan 0.1 μF. This effective dissipates(VIN – VOUT )× ILIMIT untilthermalshutdown capacitancerefersto the capacitancethatthe LDO istriggeredand the deviceturnsoff.As the device sees under operatingbiasvoltageand temperature coolsdown, itis turnedon by the internalthermal conditions;thatis,the capacitanceaftertakingboth shutdown circuit.Ifthe faultconditioncontinues,the bias voltage and temperature derating into device cycles between currentlimitand thermal consideration.In additionto allowingthe use of shutdown.See the Thermal Informationsectionfor cheaperdielectrics,thiscapabilityofbeingstablewith more details. 0.1-μF effectivecapacitancealsoenablestheuse of The PMOS pass element in the TLV700xx has asmallerfootprintcapacitorsthathave higherderating built-inbody diode thatconductscurrentwhen theinsize-and space-constrainedapplications. voltageat OUT exceeds the voltageat IN. This Note thatusinga 0.1-μF ratedcapacitorattheoutput currentisnot limited,so ifextendedreversevoltage of the LDO does not ensure stabilitybecause the operationisanticipated,externallimitingto5% ofthe effectivecapacitanceunder the specifiedoperating ratedoutputcurrentisrecommended. conditionswould be lessthan0.1μF.Maximum ESR shouldbe lessthan200 m Ω. Shutdown Although an input capacitoris not requiredfor The enable pin (EN) is activehigh.The deviceis stability,itisgood analogdesignpracticetoconnect enabled when voltageat EN pin goes above 0.9V. a 0.1-μF to1.0-μF, low ESR capacitoracrosstheIN Thisrelativelylowervalueofvoltagerequiredtoturn pin and GND in of the regulator.This capacitor theLDO on can be exploitedtopower theLDO witha counteractsreactiveinput sources and improves GPIO of recentprocessorswhose GPIO Logic 1 transientresponse, noise rejection,and ripple voltagelevelislowerthantraditionalmicrocontrollers. rejection.A higher-valuecapacitormay be necessary The deviceisturnedOFF when theEN pinisheldat iflarge,fastrise-timeloadtransientsare anticipated, less than 0.4V. When shutdown capabilityis not or ifthe deviceis not locatedcloseto the power required,EN can be connectedtotheIN pin. source.Ifsource impedance is more than 2 Ω, a 0.1-μF inputcapacitormay be necessaryto ensure stability.
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P =□(V V ) I/c45 /c180D IN OUT OUT TLV700xx www.ti.com SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 Dropout Voltage For good reliability,thermalprotectionshouldtrigger atleast+35°C above themaximum expectedambientThe TLV700xx uses a PMOS pass transistorto condition of the particularapplication.Thisachievelow dropout.When (VIN – VOUT ) islessthan configurationproduces a worst-case junctionthe dropoutvoltage(VDO) , the PMOS pass deviceis temperatureof +125°C at the highest expectedin the linear region of operation and the ambienttemperatureand worst-caseload.input-to-outputresistanceistheR DS(ON) ofthePMOS pass element.VDO scalesapproximatelywithoutput The internalprotectioncircuitryoftheTLV700xx has currentbecause the PMOS device behaves as a been designedtoprotectagainstoverloadconditions. resistorindropout. Itwas not intendedto replaceproperheatsinking. Continuouslyrunning the TLV700xx into thermalAs with any linearregulator,PSRR and transient shutdowndegradesdevicereliability.responseare degraded as (VIN – VOUT ) approaches dropout.This effectis shown in Figure13 in the Power DissipationTypicalCharacteristicssection. The abilitytoremove heatfromthedieisdifferentfor TransientResponse each package type, presenting different considerationsin the printedcircuitboard (PCB)As with any regulator,increasingthe size of the layout.The PCB area around thedevicethatisfreeoutputcapacitorreducesover-/undershootmagnitude ofothercomponents moves theheatfromthedevicebutincreasesthedurationofthetransientresponse. totheambientair.PerformancedataforJEDEC low and high-K boards are given in the DissipationUndervoltageLockout (UVLO) Ratingstable.Using heaviercopper increasesthe effectivenessinremovingheat from the device.TheThe TLV700xx uses an undervoltagelockoutcircuitto additionof platedthrough-holesto heat-dissipatingkeep the outputshut offuntilinternalcircuitryis layersalsoimprovesheatsinkeffectiveness.operatingproperly. Power dissipationdepends on inputvoltageand loadThermal Information conditions.Power dissipation(PD) is equal to the productof the outputcurrentand the voltagedropThermal protectiondisablesthe output when the across the output pass element, as shown injunctiontemperaturerisesto approximately+160°C, Equation1.allowingthe device to cool. When the junction temperaturecools to approximately+140°C, the (1) outputcircuitryisagainenabled.Dependingon power dissipation,thermal resistance,and ambient Package Mountingtemperature,thethermalprotectioncircuitmay cycle Solder pad footprintrecommendations for theon and off.Thiscyclinglimitsthe dissipationof the TLV700xx are availablefrom the Texas Instrumentsregulator,protectingitfrom damage as a resultof web siteat www.ti.com. The recommended landoverheating. patternsforthe DSE, DDC, and DCK packages areAny tendencytoactivatethethermalprotectioncircuit shown in Figure 22, Figure 23, and Figure 24,indicates excessive power dissipationor an respectively.Figure25, Figure26, and Figure27inadequateheatsink.For reliableoperation,junction show the mechanicalpackage dimensionsforthetemperatureshouldbe limitedto +125°C maximum. DSE, DDC, and DCK packages,respectively.To estimatethemarginofsafetyina completedesign (including heatsink), increase the ambient temperatureuntilthe thermalprotectionistriggered; use worst-caseloadsand signalconditions. Copyright© 2009–2011,Texas InstrumentsIncorporated 11
SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 www.ti.com (1) PublicationIPC-7351isrecommended foralternatedesigns. (2) For more information,refertoTIapplicationnotesSCBA017 and SLUA271 (Quad FlatpackNo-Lead LogicPackages and QFN/SON PCB Attachment, respectively)forspecificthermalinformation,via requirements,and additional recommendations for board layout.These documents are availableat the Texas Instrumentsweb site (http://www.ti.com)by searchingfortheliteraturenumber. (3) Laser-cuttingapertureswithtrapedzoidalwallsand alsoroundingcornerswillofferbetterpasterelease.Customers shouldcontacttheirboard assembly siteforstencildesignrecommendations.Referto IPC-7525 forstencildesign considerations. (4) Customersshouldcontacttheirboardfabricationsiteforminimum soldermask tolerancesbetween signalpads. Figure22. Recommended Land PatternforDSE Package
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Example□Board□Layout Stencil□Openings Based□on□Stencil□Thickness of□0,127□mm□(.005□in) TLV700xx www.ti.com SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 (1) Alllineardimensionsareinmillimeters. (2) Customers shouldplacea noteon thecircuitboard fabricationdrawingnottoalterthecentersoldermask defined pad. (3) PublicationIPC-7351isrecommended foralternatedesigns. (4) Laser-cuttingapertureswithtrapedzoidalwallsand alsoroundingcornerswillofferbetterpasterelease.Customers shouldcontacttheirboardassemblysiteforstencildesignrecommendations.Example stencildesignbased on a 50% volumetricloadsolderpaste.RefertoIPC-7525forotherstencilrecommendations. Figure23. Recommended Land PatternforDDC Package Copyright© 2009–2011,Texas InstrumentsIncorporated 13
Example□Board□Layout Stencil□Openings Based□on□Stencil□Thickness of□0,127□mm□(.005□in) TLV700xx SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 www.ti.com (1) Alllineardimensionsareinmillimeters. (2) Customers shouldplacea noteon thecircuitboard fabricationdrawingnottoalterthecentersoldermask defined pad. (3) PublicationIPC-7351isrecommended foralternatedesigns. (4) Laser-cuttingapertureswithtrapedzoidalwallsand alsoroundingcornerswillofferbetterpasterelease.Customers shouldcontacttheirboardassemblysiteforstencildesignrecommendations.Example stencildesignbased on a 50% volumetricloadsolderpaste.RefertoIPC-7525forotherstencilrecommendations. Figure24. Recommended Land PatternforDCK Package
14 Copyright© 2009–2011,Texas InstrumentsIncorporated
www.ti.com SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 (1) Alllineardimensionsareinmillimeters. (2) Smalloutlineno-lead(SON) package configuration. Figure25. DSE Package Dimensions Copyright© 2009–2011,Texas InstrumentsIncorporated 15
SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 www.ti.com (1) Alllineardimensionsareinmillimeters. (2) Body dimensionsdo notincludemold flashorprotrusion. (3) FallswithinJEDEC MO-193 variationAB (pin5). Figure26. DDC Package Dimensions
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www.ti.com SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 (1) Alllineardimensionsareinmillimeters. (2) Body dimensionsdo notincludemold flashorprotrusion.Mold flashand protrusionshallnotexceed 0,15perside. (3) FallswithinJEDEC MO-203 variationAA. Figure27. DCK Package Dimensions Copyright© 2009–2011,Texas InstrumentsIncorporated 17
SLVSA00C –SEPTEMBER 2009–REVISED JULY 2011 www.ti.com
REVISION HISTORY
NOTE: Page numbers forpreviousrevisionsmay differfrompage numbers inthecurrentversion. Changes from RevisionB (December, 2010)toRevisionC Page Changes from RevisionA (April,2010)toRevisionB Page
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www.ti.com 16-Jun-2012 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) TLV70012DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70012DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70012DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV70012DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV70012DSER ACTIVE WSON DSE 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70012DSET ACTIVE WSON DSE 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70013DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV70013DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV70015DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70015DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70015DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV70015DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV70015DSER ACTIVE WSON DSE 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70015DSET ACTIVE WSON DSE 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70018DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70018DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70018DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
www.ti.com 16-Jun-2012 Addendum-Page 2 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) TLV70018DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV70018DSER ACTIVE WSON DSE 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70018DSET ACTIVE WSON DSE 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70019DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV70019DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV70022DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV70022DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV70025DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70025DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70025DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV70025DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV70025DSER ACTIVE WSON DSE 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70025DSET ACTIVE WSON DSE 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70028DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70028DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70028DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV70028DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV70028DSER ACTIVE WSON DSE 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
www.ti.com 16-Jun-2012 Addendum-Page 3 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) TLV70028DSET ACTIVE WSON DSE 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70029DSER ACTIVE WSON DSE 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70029DSET ACTIVE WSON DSE 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70030DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70030DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70030DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV70030DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV70030DSER ACTIVE WSON DSE 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70030DSET ACTIVE WSON DSE 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70033DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70033DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70033DDCR ACTIVE SOT DDC 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV70033DDCT ACTIVE SOT DDC 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TLV70033DSER ACTIVE WSON DSE 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70033DSET ACTIVE WSON DSE 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70036DDCR PREVIEW SOT DDC 5 3000 TBD Call TI Call TI TLV70036DDCT PREVIEW SOT DDC 5 250 TBD Call TI Call TI TLV70036DSER ACTIVE WSON DSE 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLV70036DSET ACTIVE WSON DSE 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
www.ti.com 16-Jun-2012 Addendum-Page 4 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TLV70012, TLV70018, TLV70025, TLV70033 :
- Automotive: TLV70012-Q1 , TLV70018-Q1 , TLV70025-Q1 , TLV70033-Q1 NOTE: Qualified Version Definitions:
- Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 22-Jun-2012 Pack Materials-Page 1
(mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 22-Jun-2012 Pack Materials-Page 2
(mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 22-Jun-2012 Pack Materials-Page 3
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV70012DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TLV70012DCKT SC70 DCK 5 250 202.0 201.0 28.0 TLV70012DDCR SOT DDC 5 3000 406.0 348.0 63.0 TLV70012DDCR SOT DDC 5 3000 195.0 200.0 45.0 TLV70012DDCT SOT DDC 5 250 202.0 201.0 28.0 TLV70012DDCT SOT DDC 5 250 195.0 200.0 45.0 TLV70012DSER WSON DSE 6 3000 202.0 201.0 28.0 TLV70012DSER WSON DSE 6 3000 203.0 203.0 35.0 TLV70012DSET WSON DSE 6 250 203.0 203.0 35.0 TLV70012DSET WSON DSE 6 250 202.0 201.0 28.0 TLV70013DDCR SOT DDC 5 3000 202.0 201.0 28.0 TLV70013DDCT SOT DDC 5 250 202.0 201.0 28.0 TLV70015DCKR SC70 DCK 5 3000 203.0 203.0 35.0 TLV70015DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TLV70015DCKT SC70 DCK 5 250 202.0 201.0 28.0 TLV70015DCKT SC70 DCK 5 250 203.0 203.0 35.0 TLV70015DDCR SOT DDC 5 3000 406.0 348.0 63.0 TLV70015DDCR SOT DDC 5 3000 195.0 200.0 45.0 TLV70015DDCT SOT DDC 5 250 406.0 348.0 63.0 TLV70015DDCT SOT DDC 5 250 195.0 200.0 45.0 PACKAGE MATERIALS INFORMATION www.ti.com 22-Jun-2012 Pack Materials-Page 4
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV70015DSER WSON DSE 6 3000 203.0 203.0 35.0 TLV70015DSER WSON DSE 6 3000 202.0 201.0 28.0 TLV70015DSET WSON DSE 6 250 203.0 203.0 35.0 TLV70015DSET WSON DSE 6 250 202.0 201.0 28.0 TLV70018DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TLV70018DCKR SC70 DCK 5 3000 180.0 180.0 18.0 TLV70018DCKR SC70 DCK 5 3000 203.0 203.0 35.0 TLV70018DCKT SC70 DCK 5 250 202.0 201.0 28.0 TLV70018DCKT SC70 DCK 5 250 180.0 180.0 18.0 TLV70018DCKT SC70 DCK 5 250 203.0 203.0 35.0 TLV70018DDCR SOT DDC 5 3000 406.0 348.0 63.0 TLV70018DDCR SOT DDC 5 3000 195.0 200.0 45.0 TLV70018DDCT SOT DDC 5 250 406.0 348.0 63.0 TLV70018DDCT SOT DDC 5 250 195.0 200.0 45.0 TLV70018DSER WSON DSE 6 3000 202.0 201.0 28.0 TLV70018DSER WSON DSE 6 3000 203.0 203.0 35.0 TLV70018DSET WSON DSE 6 250 203.0 203.0 35.0 TLV70018DSET WSON DSE 6 250 202.0 201.0 28.0 TLV70019DDCR SOT DDC 5 3000 195.0 200.0 45.0 TLV70019DDCT SOT DDC 5 250 195.0 200.0 45.0 TLV70022DDCR SOT DDC 5 3000 195.0 200.0 45.0 TLV70022DDCT SOT DDC 5 250 195.0 200.0 45.0 TLV70025DCKR SC70 DCK 5 3000 180.0 180.0 18.0 TLV70025DCKR SC70 DCK 5 3000 203.0 203.0 35.0 TLV70025DCKT SC70 DCK 5 250 180.0 180.0 18.0 TLV70025DDCR SOT DDC 5 3000 406.0 348.0 63.0 TLV70025DDCR SOT DDC 5 3000 195.0 200.0 45.0 TLV70025DDCT SOT DDC 5 250 406.0 348.0 63.0 TLV70025DDCT SOT DDC 5 250 195.0 200.0 45.0 TLV70025DSER WSON DSE 6 3000 202.0 201.0 28.0 TLV70025DSER WSON DSE 6 3000 203.0 203.0 35.0 TLV70025DSET WSON DSE 6 250 203.0 203.0 35.0 TLV70025DSET WSON DSE 6 250 202.0 201.0 28.0 TLV70028DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TLV70028DCKR SC70 DCK 5 3000 203.0 203.0 35.0 TLV70028DCKT SC70 DCK 5 250 202.0 201.0 28.0 TLV70028DCKT SC70 DCK 5 250 203.0 203.0 35.0 TLV70028DDCR SOT DDC 5 3000 195.0 200.0 45.0 TLV70028DDCR SOT DDC 5 3000 406.0 348.0 63.0 TLV70028DDCT SOT DDC 5 250 195.0 200.0 45.0 TLV70028DDCT SOT DDC 5 250 406.0 348.0 63.0 TLV70028DSER WSON DSE 6 3000 203.0 203.0 35.0 TLV70028DSER WSON DSE 6 3000 202.0 201.0 28.0 TLV70028DSET WSON DSE 6 250 203.0 203.0 35.0 PACKAGE MATERIALS INFORMATION www.ti.com 22-Jun-2012 Pack Materials-Page 5
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV70028DSET WSON DSE 6 250 202.0 201.0 28.0 TLV70029DSER WSON DSE 6 3000 203.0 203.0 35.0 TLV70029DSER WSON DSE 6 3000 202.0 201.0 28.0 TLV70029DSET WSON DSE 6 250 203.0 203.0 35.0 TLV70029DSET WSON DSE 6 250 202.0 201.0 28.0 TLV70030DCKR SC70 DCK 5 3000 180.0 180.0 18.0 TLV70030DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TLV70030DCKR SC70 DCK 5 3000 203.0 203.0 35.0 TLV70030DCKT SC70 DCK 5 250 202.0 201.0 28.0 TLV70030DCKT SC70 DCK 5 250 180.0 180.0 18.0 TLV70030DCKT SC70 DCK 5 250 203.0 203.0 35.0 TLV70030DDCR SOT DDC 5 3000 406.0 348.0 63.0 TLV70030DDCR SOT DDC 5 3000 195.0 200.0 45.0 TLV70030DDCT SOT DDC 5 250 406.0 348.0 63.0 TLV70030DDCT SOT DDC 5 250 195.0 200.0 45.0 TLV70030DSER WSON DSE 6 3000 202.0 201.0 28.0 TLV70030DSER WSON DSE 6 3000 203.0 203.0 35.0 TLV70030DSET WSON DSE 6 250 203.0 203.0 35.0 TLV70030DSET WSON DSE 6 250 202.0 201.0 28.0 TLV70033DCKR SC70 DCK 5 3000 202.0 201.0 28.0 TLV70033DCKR SC70 DCK 5 3000 203.0 203.0 35.0 TLV70033DCKR SC70 DCK 5 3000 180.0 180.0 18.0 TLV70033DCKT SC70 DCK 5 250 180.0 180.0 18.0 TLV70033DCKT SC70 DCK 5 250 203.0 203.0 35.0 TLV70033DCKT SC70 DCK 5 250 202.0 201.0 28.0 TLV70033DDCR SOT DDC 5 3000 195.0 200.0 45.0 TLV70033DDCT SOT DDC 5 250 406.0 348.0 63.0 TLV70033DDCT SOT DDC 5 250 195.0 200.0 45.0 TLV70033DSER WSON DSE 6 3000 202.0 201.0 28.0 TLV70033DSER WSON DSE 6 3000 203.0 203.0 35.0 TLV70033DSET WSON DSE 6 250 202.0 201.0 28.0 TLV70033DSET WSON DSE 6 250 203.0 203.0 35.0 TLV70036DSER WSON DSE 6 3000 202.0 201.0 28.0 TLV70036DSET WSON DSE 6 250 202.0 201.0 28.0 PACKAGE MATERIALS INFORMATION www.ti.com 22-Jun-2012 Pack Materials-Page 6
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