Power Management

TLV61048DBVT.A

Texas Instruments

TLV61048 14-V Output Voltage Non-synchronous Boost Converter in SOT-23 package REVISED JULY 2019

Manufacturer: Texas Instruments

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TLV61048_V01 TI | Alldatasheet

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PDF pages: 24

Technical content

2.65 V ~ 5.5 V 12V Product Folder Order Now T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TLV61048 SLVSEX0A –MARCH 2019–REVISED JULY 2019 TLV6104814-VOutputVoltageNon-synchronousBoostConverter inSOT-23package

1 Features

1• Input voltage 2.65 V to 5.5 V (falling 2.4 V)

Output voltage up to 14 V
Integrated low-side FET: 85 mΩ at 3.3 VIN
3.7-A (Typical) switch current limit
Up to 90% Efficiency at 3.3-V Input and 12-V Output
600-kHz or 1-MHz Selectable switching frequency
Internal Compensation
1-µA Shutdown current
±2.5% Output-voltage accuracy
PFM operation mode at light load
Internal 2-ms soft-start time
Thermal shutdown protection
2.9-mm × 1.6-mm 6-Pin SOT-23 package

2 Applications

PLC backup power
LCD bias supply
Industrial isolation DC/DC

3 Description

The TLV61048 is a non-synchronous boost converter that provides a power-supply solution for products powered by a low-voltage super capacitor and a single-cell Li-ion battery. The TLV61048 integrates a power switch with 3.7-A typical current limit to extend the discharge capability of the input source without sacrificing maximal load delivery. The TLV61048 could be configured at 600 kHz for higher efficiency or 1 MHz for smaller inductor and output capacitor. At the light load, the device enters into the PFM operation to achieve higher efficiency. The TLV61048 has built-in 2-ms soft start to minimize the inrush current. The TLV61048 is available in a 2.9-mm × 1.6-mm 6- pin SOT-23 package. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TLV61048 SOT-23 (6) 2.90 mm × 1.60 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Simplified Schematic

11.2 Receiving Notification of Documentation Updates 16

12 Mechanical, Packaging, and Orderable

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (March 2019) to Revision A Page

5 Pin Configuration and Functions

NO. NAME 1 SW PWR The switch pin of the converter. It is connected to the drain of the internal power MOSFET.

2 GND PWR Ground

3 FB I Voltage feedback of output voltage. Connected to the center tap of a resistor divider to program the output voltage. 4 EN I Enable logic input. Logic high voltage enables the device. Logic low voltage disables the device and turns it into shutdown mode.

5 VIN I IC power supply input

6 FREQ I Frequency select pin. The device operates at 600 kHz if FREQ is left floating or pulled high and at 1 MHz if connected to GND.

SLVSEX0A –MARCH 2019–REVISED JULY 2019 www.ti.com Product Folder Links: TLV61048 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to network ground terminal.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT Voltage range at terminals (2) VIN, EN, FREQ –0.3 6 V SW –0.3 18 V FB –0.3 3.6 V Operating junction temperature range, TJ –40 150 °C (1) Electrostatic discharge (ESD) to measure device sensitivity and immunity to damage caused by assembly line electrostatic discharges in to the device. (2) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (3) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

V(ESD) (1) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(2) ±2000 V Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(3) ±500 V

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN TYP MAX UNIT VIN Input voltage range 2.65 5.5 V VOUT Output voltage range 3.3 14 V L Effective inductance range 2.2 4.7 10 µH CIN Effective input capacitance range 0.22 1 µF COUT Effective output capacitance range 3 µF TJ Operating junction temperature –40 125 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application report.

6.4 Thermal Information

THERMAL METRIC(1) TLV61048 UNITDBV (SOT23)

6 PINS

RθJA Junction-to-ambient thermal resistance 177.7 °C/W RθJC(top) Junction-to-case (top) thermal resistance 120.6 °C/W RθJB Junction-to-board thermal resistance 33.2 °C/W ψJT Junction-to-top characterization parameter 21.5 °C/W ψJB Junction-to-board characterization parameter 32.6 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance n/a °C/W

6.5 Electrical Characteristics

TA = –40°C to 85°C, VIN = 3.3 V. Typical values are at TA = 25°C, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SUPPLY VIN Input voltage range 2.65 5.5 V VIN_UVLO Under voltage lockout threshold VIN rising 2.55 2.65 V VIN falling 2.3 2.4 VIN_HYS VIN UVLO hysteresis 150 mV IQ_VIN Quiescent current into VIN pin IC enabled, no load, no switching 100 µA ISD Shutdown current into VIN pin IC disabled, VIN = 2.6 V to 5.5 V, TA = 25°C 1.0 µA OUTPUT VOUT Output voltage range 3.3 14 V VREF Feedback voltage PWM mode, TA=-40°C to 125°C 0.78 0.8 0.82 V PFM mode, TA=25°C 0.81 V IFB_LKG Leakage current into FB pin TA = 25°C 50 nA ISW_LKG Leakage current into SW pin IC disabled, SW = 5.5V 500 nA POWER SWITCH RDS(on) Low-side MOSFET on resistance VIN = 3.3, VOUT = 12V 85 mΩ fSW Switching frequency VIN = 3.3 V, VOUT = 12 V, PWM mode 430 550 630 kHz VIN = 3.3 V, VOUT = 12 V, PWM mode 850 1000 1250 kHz tOFF_min Min. off time 130 ns ILIM_SW Peak switch current limit 600kHz, VIN = 3.3V 2.9 3.7 4.5 A tSTARTUP Startup time 2 ms LOGIC INTERFACE VEN_H EN Logic high threshold 1.2 V VEN_L EN Logic low threshold 0.4 V REN EN Pull Down Resistor 1 MΩ RFREQ FREQ pull up resistance 950 kΩ VFREQ_H FREQ logic high threshold 1.2 V VFREQ_L FREQ logic low threshold 0.4 V PROTECTION TSD Thermal shutdown threshold TJ rising 150 °C TSD_HYS Thermal shutdown hysteresis TJ falling below TSD 20 °C

6.6 Typical Characteristics

Figure 1. Efficiency vs Output Current Figure 2. Efficiency vs Output Current Figure 3. FB Reference Voltage vs Temperature Figure 4. Quiescent Current into VIN vs Temperature Figure 5. Quiescent Current into VIN vs Input Voltage Figure 6. Current Limit vs Temperature

6 FREQ

7 Detailed Description

7.1 Overview

The TLV61048 is a non-synchronous boost converter supporting output voltage up to 14 V with input ranging operates in a current mode scheme with quasi-constant frequency with internal loop compensation built in. The switching frequency is selectable between 600 kHz and 1 MHz. There is internal fixed soft start time which is 2 ms typically to control the inrush current during startup. Topology of the TLV61048 boost converter is adaptive off-time with peak current control, which provides superior load and line transient responses. The selectable switching frequency offers the possibility to optimize the design either for the use of small sized inductor (1 MHz) or for higher system efficiency (600 kHz). The converter operates in continuous conduction mode (CCM) when the inductor valley current is above zero, while switches into discontinuous conduction mode (DCM) if valley current crossing zero. If the load is further lowered, the device enters into PFM operation to achieve even higher efficiency.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Undervoltage Lockout

An undervoltage lockout (UVLO) circuit stops the operation of the converter when the input voltage drops below the typical UVLO falling threshold of 2.4 V. A hysteresis of 150 mV is added so that the device cannot be enabled again until the input voltage goes up to typical UVLO rising threshold of 2.55 V. This function is implemented in order to prevent malfunctioning of the device when the input voltage is between 2.4 V and 2.55

7.3.2 Enable and Disable

When the input voltage is above typical UVLO rising threshold of 2.55 V and the EN pin is pulled high, the TLV61048 is enabled. When the EN pin is pulled low, the TLV61048 stops the PWM switch and turns off the low side switch. The EN pin has an internal pull-down resistance of 1MΩ, the device is disabled when the EN pin is floating. In shutdown mode, less than 1-µA input current is consumed.

7.3.3 Soft Start

The soft-start feature helps the regulator to gradually reach the steady state operating point, thus reducing start- up stresses and surge. When the input voltage is applied, the output capacitor is charged to VIN through the inductor and high side rectifier diode. After reaching the 2.55 V (typical) UVLO rising threshold, the internal soft- start control circuit initiates to ramp the reference voltage to 0.8 V within 2 ms (typical), while the low side FET starts switching after output capacitor is charged to the input voltage.

7.3.4 Frequency Select (FREQ)

The frequency select pin FREQ allows to set the switching frequency of the device to 600 kHz (FREQ = floating/high) or 1 MHz (FREQ = GND). Higher switching frequency improves load transient response but reduces efficiency slightly. The other benefit of higher switching frequency is lower output ripple voltage.

7.4 Device Functional Modes

The TLV61048 has two operation modes: PWM mode and PFM mode.

7.4.1 PWM Mode

The TLV61048 uses a quasi-constant frequency pulse width modulation (PWM) at moderate to heavy load currents. Based on the VIN/VOUT ratio, a circuit predicts the required off-time. At the beginning of the switching cycle, the integrated NMOS switching FET, shown in the functional block diagram, is turned on. The input voltage is applied across the inductor and the inductor current ramps up. In this phase, the output capacitor is discharged by the load current. When the inductor current hits the current threshold that is set by the error amplifier output, the PWM switch is turned off, and the external power diode is forward-biased. The inductor transfers its stored energy to replenish the output capacitor and supply the load. When the off-time is expired, the next switching cycle starts again. The error amplifier compares the FB pin voltage with an internal reference, and its output determines the duty cycle of the PWM switching. The TLV61048 has a built-in compensation circuit that can accommodate a wide range of input and output voltages for stable operation.

7.4.2 PFM Mode

The TLV61048 integrates a power save mode with pulse frequency modulation (PFM) to improve efficiency at light load. When the load current decreases, the inductor peak current set by the output of the error amplifier declines to regulate the output voltage. When the inductor peak current hits the low limit (400 mA typical), the output voltage exceeds the set threshold voltage as the load current decreases further. When the FB voltage hits the PFM reference voltage, the TLV61048 goes into power-save mode. In the power-save mode, the device only switches when the output voltage trips below a set threshold voltage. It ramps up the output with several pulses and enters the power save mode when the output voltage exceeds the set threshold voltage.

VOUT_NOM 1.0125 x VOUT_NOM PFM mode at light load PWM mode at heavy load TLV61048 www.ti.com SLVSEX0A –MARCH 2019–REVISED JULY 2019 Product Folder Links: TLV61048 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated Device Functional Modes (continued)

8 Application and Implementation

validate and test their design implementation to confirm system functionality.

8.1 Application Information

procedure can be used to select component values for the TLV61048.

8.2 Typical Applications

switching loss in order to improve overall efficiency. Figure 7. 12-V Boost Converter With External Bias

8.2.1.1 Design Requirements

Table 1. Design Requirements

I I I 2 IN OUT IN L(P P) SW OUT V V 0.8V VI L V 0.8V u ' u u f OUT OUT L(DC) IN V I I V u uK OUT REF VR1 1 R2V § · u¨ ¸ © ¹ TLV61048 www.ti.com SLVSEX0A –MARCH 2019–REVISED JULY 2019 Product Folder Links: TLV61048 Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated

8.2.1.2 Detailed Design Procedure

8.2.1.2.1 Programming the Output Voltage

Output voltage is programmed via external resistor divider. By selecting the external resistor divider R1 and R2, as shown in Equation 1, the output voltage is programmed to the desired value. When the output voltage is regulated, the typical voltage at the FB pin is VREF of 800 mV. where

VOUT is the desired output voltage
VREF is the internal reference voltage at the FB pin (1) For best accuracy, R2 should be kept smaller than 150 kΩ to ensure the current flowing through R2 is at least 100 times larger than the FB pin leakage current. Changing R2 towards a lower value increases the immunity against noise injection. Changing the R2 towards a higher value reduces the quiescent current for achieving higher efficiency at low load currents.

8.2.1.2.2 Inductor Selection

Because the selection of the inductor affects steady state operation, transient behavior, and loop stability, the inductor is the most important component in power regulator design. There are three important inductor specifications, inductor value, saturation current, and DC resistance (DCR). The TLV61048 is designed to work with inductor values between 2.2 µH and 10 µH. Use Equation 2 to Equation 4 to calculate the peak current of the application inductor. To calculate the current in the worst case, use the minimum input voltage, maximum output voltage, and maximum load current of the application. To have enough design margin, choose the inductor value with –30% tolerance, and a low power-conversion efficiency for the calculation. In a boost regulator, the inductor dc current can be calculated with Equation 2. where

VOUT = output voltage
IOUT = output current
VIN = input voltage
η = power conversion efficiency, use 80% for most applications (2) The inductor ripple current is calculated with the Equation 3 for an asynchronous boost converter in continuous conduction mode (CCM). where
ΔIL(P-P) = inductor ripple current
L = inductor value
fSW = switching frequency
VOUT = output voltage
VIN = input voltage (3) Therefore, the inductor peak current is calculated with Equation 4. (4) Normally, it is advisable to work with an inductor peak-to-peak current of less than 40% of the average inductor current for maximum output current. A smaller ripple from a larger valued inductor reduces the magnetic hysteresis losses in the inductor and EMI. However, in the same way, load transient response time is increased. Table 2 lists the recommended inductor for the TLV61048 in the 600-kHz configuration.

Table 2. Recommended Inductors for the TLV61048 at 600-kHz Configuration (1) See Third-party Products Disclaimer.

8.2.1.2.3 Input and Output Capacitor Selection

DMAX = maximum switching duty cycle
VRIPPLE = peak to peak output voltage ripple (5) The ESR impact on the output ripple must be considered if tantalum or aluminum electrolytic capacitors are used. Take care when evaluating the derating of a ceramic capacitor under DC bias, aging, and AC signal. For example, the DC bias can significantly reduce capacitance. A ceramic capacitor can lose more than 50% of its capacitance at its rated voltage. Therefore, always leave margin on the voltage rating to ensure adequate capacitance at the required output voltage. TI recommends using the output capacitor with effective capacitance in the range of 3.3 µF to 10 µF for 600-kHz configuration. TI also recommends placing a small 1 µF capacitor right across the rectifier diode cathode to the GND pin of the TLV61048 to reduce the high RMS current loop's inductance. The output capacitor affects the small signal control loop stability of the boost regulator. If the output capacitor is below the range, the boost regulator can potentially become unstable. Increasing the output capacitor makes the output voltage ripple smaller in PWM mode. Table 3 lists the recommended capacitor for the TLV61048.

Table 3. Recommended Output Capacitors for the TLV61048 For input capacitor, a ceramic capacitor with more than 1 µF is enough for most applications.

8.2.1.2.4 Diode Rectifier Selection

selected to provide minimal forward voltage drop to improve efficiency.

1 V/div

3 V/div

2 V/div

5 V/div

8.2.1.3 Application Curves

Figure 8. Switching Waveform in CCM Figure 9. Switching Waveform in PFM Figure 10. Start-up Waveform Figure 11. Shutdown Waveform Figure 12. Load Transient Figure 13. Line Transient node to ensure voltage spike does not exceed the specified absolute maximum rating.

Figure 14. 14-V Boost Converter

8.2.2.1 Design Requirements

Table 4. Design Requirements (1) See Third-party Products Disclaimer.

8.2.2.2 Detailed Design Procedure

8.2.2.2.1 Inductor Selection

operation are listed in Table 5. Table 5. Recommended Inductors for the TLV61048 at 1-MHz Configuration

8.2.2.2.2 Input and Output Capacitor Selection

For 1-MHz configuration, use the information provided in Input and Output Capacitor Selection.

9 Power Supply Recommendations

supply voltage, output voltage and output current of the TLV61048.

10 Layout

10.1 Layout Guidelines

the GND pin in order to reduce input supply ripple. the GND pin, but also to the cathode of the high side rectifier to reduce the overshoot at the SW pin.

10.2 Layout Example

Figure 15. TLV61048 Layout

11 Device and Documentation Support

11.1 Device Support

11.1.1 Third-Party Products Disclaimer

TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.

11.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

11.3 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

11.4 Trademarks

E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.

11.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

11.6 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 31-Oct-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TLV61048DBVR Active Production SOT-23 (DBV) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 1VSF TLV61048DBVR.A Active Production SOT-23 (DBV) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 1VSF TLV61048DBVRG4 Active Production SOT-23 (DBV) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 1VSF TLV61048DBVRG4.A Active Production SOT-23 (DBV) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 1VSF TLV61048DBVT Active Production SOT-23 (DBV) | 6 250 | SMALL T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 1VSF TLV61048DBVT.A Active Production SOT-23 (DBV) | 6 250 | SMALL T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 1VSF (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

www.ti.com 31-Oct-2025 Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 18-Jun-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 18-Jun-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV61048DBVR SOT-23 DBV 6 3000 210.0 185.0 35.0 TLV61048DBVRG4 SOT-23 DBV 6 3000 210.0 185.0 35.0 TLV61048DBVT SOT-23 DBV 6 250 210.0 185.0 35.0 Pack Materials-Page 2

www.ti.com PACKAGE OUTLINE C 0.22

0.08 TYP

0.25 3.0 2.6 2X 0.95 1.45 0.90 0.15

0.00 TYP

6X 0.50 0.25 0.6

0.3 TYP

0 TYP

1.9 4X 0 -15 4X 4 -15 A 3.05 2.75 B1.75 1.45 (1.1) SOT-23 - 1.45 mm max heightDBV0006A SMALL OUTLINE TRANSISTOR 4214840/G 08/2024 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.25 per side. 4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation. 5. Refernce JEDEC MO-178.

0.2 C A B

0.1 C SCALE 4.000

www.ti.com EXAMPLE BOARD LAYOUT

0.07 MAX

0.07 MIN

6X (1.1) 6X (0.6) (2.6) 2X (0.95) (R0.05) TYP 4214840/G 08/2024 SOT-23 - 1.45 mm max heightDBV0006A SMALL OUTLINE TRANSISTOR NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X PKG 3 4 SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL METALSOLDER MASK OPENING NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DETAILS EXPOSED METAL

www.ti.com EXAMPLE STENCIL DESIGN (2.6) 2X(0.95) 6X (1.1) 6X (0.6) (R0.05) TYP SOT-23 - 1.45 mm max heightDBV0006A SMALL OUTLINE TRANSISTOR 4214840/G 08/2024 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X SYMM PKG 3 4

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Product Information

TLV61048DBVT.A specifications and overview.

Summary

TLV61048 14-V Output Voltage Non-synchronous Boost Converter in SOT-23 package REVISED JULY 2019

Description

TLV61048 14-V Output Voltage Non-synchronous Boost Converter in SOT-23 package REVISED JULY 2019

Source title TLV61048DBVT.A Datasheet(PDF) - Texas Instruments

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