TLV61047DDCR

TLV61047_V02 TI | Alldatasheet

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Technical content

TLV61047 20VIN, 28VOUT, 2.2A Non-synchronous Boost Converter

1 Features

• Input voltage range: 2.6V to 20V
• Output voltage range: 4.5V to 28V
• Integrated low-side FET: 200mΩ
• High efficiency – Up to 91.2% efficiency at VIN = 5V to VOUT = 12V, and IOUT = 0.2A – Up to 91.7% efficiency at VIN = 12V to VOUT = 28V, and IOUT = 0.3A
• 2.2A peak switch current limit
• Switching frequency – TLV61047: 1.6MHz – TLV610471: 0.6MHz
• ±2.0% Reference voltage accuracy
• Typical 25µA quiescent current
• Typical 0.4µA shutdown current
• PFM operation mode at ultra light load or TON min triggered
• Internal compensation
• Internal 2.5ms soft start time
• Cycle-by-cycle current limit
• Thermal shutdown protection
• SOT-23-5 DDC package

2 Applications

• LED Power Supply
• Digital Still Camera
• GPS Devices
• Mobile Phone
• OLED Panel Power Supply
• USB-Powered Devices

3 Description

The TLV61047 is a high voltage non-synchronous boost converter integrates a 200m Ω low side power switch to provide an easy use and small size power solution. The TLV61047 has a wide input voltage range from 2.6V to 20V and output voltage covers up to 28V with 2.2A switch current capability. The TLV61047 uses adaptive constant off-time peak current control topology to regulate the output voltage. At heavy to light load condition, the TLV61047 works in pulse width modulation (PWM) mode until trigger the Ton min or minimum peak current (typical 20mA). At ultra light load condition , the devices work in pulse frequency modulation (PFM) mode to improve the efficiency and ripple performance. The quasi-constant switching frequency is internally set to either 1.6MHz (TLV61047) or 0.6MHz (TLV610471), allowing the use of extremely small surface mount inductor and capacitors. The TLV61047 has built in 2.5ms soft start to minimize the inrush current during start up. Additional features include internal compensation, cycle by cycle current limit and thermal shutdown. The TLV61047 is available in a SOT-23-5 DDC package. Device Information (1) PART NUMBER PACKAGE BODY SIZE (NOM) TLV61047 SOT-23 (5) 2.90mm × 1.60mm (1) For all available packages, see the orderable addendum at the end of the data sheet. VIN SW FB GND RFBT RFBB CIN ENOFF ON L COUT VOUTVIN Typical Application Circuit TLV61047 SLVSHD5 – NOVEMBER 2024 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

11 Mechanical, Packaging, and Orderable

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4 Device Comparison Table

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5 Pin Configuration and Functions

Figure 5-1. DDC Package 5-Pin SOT-23 Top View Pin Functions PIN TYPE(1) DESCRIPTION NAME DDC NO. SW 1 PWR The switch pin of the converter. It is connected to the drain of the internal power MOSFET. GND 2 G Ground. FB 3 I Voltage feedback of output voltage. Connected to the center tap of a resistor divider to program the output voltage. EN 4 I Enable logic input. Logic high voltage enables the device. Logic low voltage disables the device and turns it into shutdown mode. VIN 5 I IC power supply input. (1) I = Input, G = Ground, PWR = Power TLV61047 SLVSHD5 – NOVEMBER 2024 www.ti.com

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT Voltage range at terminals (2) VIN,EN –0.3 22 V SW –0.3 32 V FB –0.3 6 V Operating junction temperature range, TJ –40 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to network ground terminal.

6.2 ESD Ratings

V(ESD) (1) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(2) ±2000 V Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(3) ±500 V (1) Electrostatic discharge (ESD) to measure device sensitivity and immunity to damage caused by assembly line electrostatic discharges in to the device. (2) Level listed above is the passing level per ANSI, ESDA, and JEDEC JS-001. JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500-V HBM is possible with the necessary precautions. (3) Level listed above is the passing level per EIA-JEDEC JESD22-C101. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 250-V CDM is possible with the necessary precautions.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN TYP MAX UNIT VIN Input voltage range 2.6 20 V VOUT Output voltage range 4.5 28 V L Inductance range 2.2 4.7 22 µH CIN Effective input capacitance range 1 10 µF COUT Effective output capacitance range 1 10 µF TJ Operating junction temperature –40 125 °C

6.4 Thermal Information

THERMAL METRIC(1) TLV61047 UNITDDC (SOT23)

5 PINS

RθJA Junction-to-ambient thermal resistance 145.8 °C/W RθJC(top) Junction-to-case (top) thermal resistance 77.6 RθJB Junction-to-board thermal resistance 56.5 ψJT Junction-to-top characterization parameter 28.5 ψJB Junction-to-board characterization parameter 54.9 RθJC(bot) Junction-to-case (bottom) thermal resistance NA (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. www.ti.com TLV61047 SLVSHD5 – NOVEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: TLV61047

6.5 Electrical Characteristics

TJ = –40°C to 125°C, VIN = 5.0V. Typical values are at TJ = 25°C, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SUPPLY VIN Input voltage range 2.6 20 V VIN_UVLO Under voltage lockout threshold VIN_UVLO rising 2.42 2.55 V VIN_UVLO falling 2.1 2.26 VIN_HYS VIN_UVLO hysteresis 160 mV IQ_VIN Quiescent current into VIN pin IC enabled, no load, no switching ,VIN = 2.6V to 20V, FB=1.4V,TJ=-40°C to 125°C 25 50 µA ISD Shutdown current into VIN pin IC disabled, VIN = 2.6V to 20V, TJ= up to 85°C 0.4 1.5 µA IFB_LKG Leakage current into FB pin TJ=-40°C to 125°C 50 nA ISW_LKG Leakage current into SW pin IC disabled, SW = 28V,TJ=-40°C to 125°C 500 nA OUTPUT VOUT Output voltage range 4.5 28 V VREF Reference Voltage at FB pin PWM and PFM mode, TJ=-40°C to 125°C 1.209 1.233 1.258 V POWER SWITCH RDS(on) Low-side MOSFET on resistance VIN = 5V, VOUT = 12V 200 mΩ FSW TLV61047 Switching frequency VIN = 5V, VOUT = 12V 1.2 1.6 2.0 MHz FSW TLV610471 Switching frequency VIN = 5V, VOUT = 12V 0.4 0.6 0.8 MHz tON_min Minimum on time 45 150 ns ILIM_SW Peak switch current limit VIN = 5V 1.9 2.2 2.5 A tSTARTUP Soft startup time Internal SS ramp time, from 0V to VREF 2.5 ms LOGIC INTERFACE VEN_H EN Logic high threshold 1.2 V VEN_L EN Logic low threshold 0.4 V REN EN Pull Down Resistor 1 MΩ PROTECTION TSD Thermal shutdown threshold TJ rising 170 °C TSD_HYS Thermal shutdown hysteresis TJ falling below TSD 20 °C TLV61047 SLVSHD5 – NOVEMBER 2024 www.ti.com

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6.6 Typical Characteristics

TLV61047, switching frequency = 1.6MHz (typ), TA = 25°C, unless otherwise noted O u t p u t C u r r e n t ( A ) Efficiency (%) 2 0 4 0 6 0 8 0 1 0 0 V i n = 2 . 6 V V i n = 3 . 3 V V i n = 5 . 0 V V i n = 7 . 0 V V i n = 9 . 0 V VOUT = 12V L = 4.7µH Figure 6-1. Efficiency vs Output Current, VOUT = 12V O u t p u t C u r r e n t ( A ) Efficiency (%) 2 0 4 0 6 0 8 0 1 0 0 V i n = 3 . 3 V V i n = 5 . 0 V V i n = 7 . 0 V V i n = 1 2 . 0 V V i n = 1 5 . 0 V V i n = 2 0 . 0 V VOUT = 28V L = 10µH Figure 6-2. Efficiency vs Output Current, VOUT = 28V O u t p u t C u r r e n t ( A ) Output Voltage (V) 1 2 . 2 1 2 . 2 2 5 1 2 . 2 5 1 2 . 2 7 5 1 2 . 3 1 2 . 3 2 5 1 2 . 3 5 1 2 . 3 7 5 1 2 . 4 1 2 . 4 2 5 1 2 . 4 5 V i n = 2 . 6 V V i n = 3 . 3 V V i n = 5 . 0 V V i n = 7 . 0 V V i n = 9 . 0 V VOUT = 12V L = 4.7µH Figure 6-3. Load regulation, VOUT = 12V O u t p u t C u r r e n t ( A ) Output Voltage (V) 2 7 . 6 2 7 . 6 5 2 7 . 7 2 7 . 7 5 2 7 . 8 2 7 . 8 5 2 7 . 9 2 7 . 9 5 2 8 2 8 . 0 5 2 8 . 1 V i n = 3 . 3 V V i n = 5 . 0 V V i n = 7 . 0 V V i n = 1 2 . 0 V V i n = 1 5 . 0 V V i n = 2 0 . 0 V VOUT = 28V L = 10µH Figure 6-4. Load regulation, VOUT = 28V T e m p e r a t u r e (  C ) Quiescent Current (A) - 4 0 - 2 0 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 1 4 0 2 0 2 2 2 4 2 6 2 8 3 0 3 2 3 4 3 6 3 8 4 0 V i n = 3 . 3 V V i n = 5 . 0 V V i n = 1 2 . 0 V V i n = 2 0 . 0 V Figure 6-5. Quiescent Current vs Temperature T e m p e r a t u r e (  C ) Shutdown Current (A) - 4 0 - 2 0 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 1 4 0 0 . 1 0 . 2 0 . 3 0 . 4 0 . 5 0 . 6 0 . 7 0 . 8 0 . 9 1 . 1 1 . 2 1 . 3 1 . 4 1 . 5 V i n = 3 . 3 V V i n = 5 . 0 V V i n = 1 2 . 0 V V i n = 2 0 . 0 V Figure 6-6. Shutdown Current vs Temperature www.ti.com TLV61047 SLVSHD5 – NOVEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: TLV61047

T e m p e r a t u r e (  C ) Reference Voltage (V) - 4 0 - 2 0 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 1 4 0 1 . 2 1 . 2 0 5 1 . 2 1 1 . 2 1 5 1 . 2 2 1 . 2 2 5 1 . 2 3 1 . 2 3 5 1 . 2 4 1 . 2 4 5 1 . 2 5 1 . 2 5 5 1 . 2 6 V i n = 3 . 3 V V i n = 5 . 0 V V i n = 1 2 . 0 V V i n = 2 0 . 0 V Figure 6-7. Reference Voltage vs Temperature T e m p e r a t u r e (  C ) Switching Frequency (MHz) - 4 0 - 2 0 0 2 0 4 0 6 0 8 0 1 0 0 1 2 0 1 4 0 1 . 6 1 . 6 2 1 . 6 4 1 . 6 6 1 . 6 8 1 . 7 1 . 7 2 1 . 7 4 1 . 7 6 1 . 7 8 1 . 8 1 . 8 2 V i n = 5 V , V o u t = 1 2 V V i n = 1 0 V , V o u t = 2 8 V Figure 6-8. Switching Frequency vs Temperature TLV61047 SLVSHD5 – NOVEMBER 2024 www.ti.com

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7 Detailed Description

7.1 Overview

The TLV61047 is a high voltage non-synchronous boost converter integrates a 200m Ω low side power switch to provide a easy use and small size power solution. The TLV61047 has a wide input voltage range from 2.6V to 20V and output voltage covers up to 28V with 2.2A switch current capability. The TLV61047 uses adaptive constant off-time peak current control topology to regulate the output voltage. At heavy to light load condition, the TLV61047 works in pulse width modulation (PWM) mode until trigger the Ton min or minimum peak current(around 20mA). At ultra light load condition , the devices work in pulse frequency modulation (PFM) mode to improve the efficiency and ripple performance. The quasi-constant switching frequency is internally set to either 1.6MHz (TLV61047) or 0.6MHz (TLV610471), allowing the use of extremely small surface mount inductor and chip capacitors. The TLV61047 have built in 2.5ms soft start to minimize the inrush current during start up. Additional features include internal compensation, cycle by cycle current limit and thermal shutdown. The TLV61047 is available in a SOT-23-5 DDC package.

7.2 Functional Block Diagram

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7.3 Feature Description

7.3.1 Undervoltage Lockout

An undervoltage lockout (UVLO) circuit stops the operation of the converter when the input voltage drops below the typical UVLO falling threshold of 2.26V. A hysteresis of 160mV is added so that the device cannot be enabled again until the input voltage goes up to typical UVLO rising threshold of 2.42V. This function is implemented in order to prevent malfunctioning of the device when the input voltage is between 2.24V and 2.42V.

7.3.2 Enable and Disable

When the input voltage is above typical UVLO rising threshold of 2.42V and the EN pin is pulled high, the TLV61047 is enabled. When the EN pin is pulled low, the TLV61047 stops the PWM switch and turns off the low side switch. The EN pin has an internal pull-down resistance of 1M Ω, the device is disabled when the EN pin is floating. In shutdown mode, less than 0.4µA(typical) input current is consumed.

7.3.3 Soft Start

The soft-start feature helps the regulator to gradually reach the steady state operating point, thus reducing start-up stresses and surge. When the input voltage is applied, the output capacitor is charged to VIN through the inductor and high side rectifier diode. After reaching the 2.42V (typical) UVLO rising threshold and EN logic high, the internal soft-start control circuit initiates to ramp the reference voltage with slew rate from 0V to 1.233V within 2.5ms (typical).

7.3.4 Thermal Shutdown

A thermal shutdown is implemented to prevent the damage due to the excessive heat and power dissipation. Typically, the thermal shutdown occurs at the junction temperature exceeding 170°C (typical). When the thermal shutdown is triggered, the device stops switching and recovers when the junction temperature falls below 150°C (typical). TLV61047 SLVSHD5 – NOVEMBER 2024 www.ti.com

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7.4 Device Functional Modes

The TLV61047 operates at a quasi-constant frequency pulse width modulation (PWM) under heavy to light load conditions. As the load current decreases, the output of the internal error amplifier also decreases to lower the inductor peak current and delivers less power. The PWM mode can be divided into CCM-PWM mode and DCM-PWM mode based on the load conditions.

• The device operates in CCM-PWM mode with a heavy to moderate load. During this phase, the inductor current valley is always above zero.
• The device operates in DCM-PWM mode as the load continues to decrease from moderate to light. As the name DCM (Discontinuous Current Mode) suggests, an obvious characteristic of this mode is that the inductor current remains at zero for one period in each cycle. During this phase, the inductor peak current can still be reduced by the output of the internal error amplifier to maintain the balance between input and output power. This allows a suitable off-time of the low-side FET to be worked out internally to keep the switching frequency quasi-constant without pulse skipping. This phase ends when the inductor peak current decreases to ICALMP_LOW, which is typically 20mA. After the peak inductor current reaches the ICLAMP_LOW and the load decreases to ultra-light or even no load, the peak inductor current can't be smaller. To balance the input and output energy, the low-side FET is turned off for a prolonged period. The duration of the "zero inductor current" is much longer than in the DCM-PWM phase. This phase is called DCM-PFM mode for features of discontinuous inductor current and significantly reduced frequency. The three phases of CCM-PWM, DCM-PWM and DCM-PFM are shown in the Figure 7-1. In work conditions where the V IN is very close to the V OUT, the VIN VOUT ratio decided turn on time may be less than the minimum turn on time, the device also enters into the DCM-PFM mode. At light load, when TON min is triggered the device also enters DCM-PFM mode even if the inductor peak current is greater than I CALMP_LOW. When the low-side FET is turned on, it remains on for a minimum time, called T ON min. The inductor is energised for at least T ON min time when the low-side FET is on. If the T ON min is greater than the ideal time required to maintain the quasi-constant frequency, the device has to extend the off time to balance the input and output energy. So the device is in DCM-PFM mode. Under normal work conditions, the TON min triggered DCM-PFM mode is much more common than that triggered by ICALMP_LOW, unless an inductor with extremely large inductance is used. VOUT ILOAD IL ICLAMP_LOW CCM-PWM DCM-PWM DCM-PFM Figure 7-1. TLV61047 Functional Modes www.ti.com TLV61047 SLVSHD5 – NOVEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: TLV61047

8 Application and Implementation

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality.

8.1 Application Information

TLV61047 is a boost DC/DC converter integrating a power switch and loop compensation circuits. The device has input range from 2.6V to 20V, with output voltage covers up to 28V. The TLV61047 adopts the current-mode control with adaptive constant off-time. The switching frequency is quasi-constant and internally set to either 1.6MHz (TLV61047) or 0.6MHz (TLV610471) allowing the use of extremely small surface mount inductor and capacitors. The following design procedure can be used to select component values for the TLV61047.

8.2 Typical Applications

8.2.1 12V Output Boost Converter In this design example, TLV61047 VOUT is configured as 12V with a input source from 2.6V to 9V. VIN SW FB GND RFBT RFBB CIN EN 60.4k 10µF OFF ON L 4.7µH COUT1 10µF COUT2 10µF 536k VIN = 2.6V ~ 9V VOUT = 12V Figure 8-1. Typical 12V Application

8.2.1.1 Design Requirements

For this design example, the parameters are shown in Table 8-1: Table 8-1. Design Requirements PARAMETERS VALUE Input voltage 2.6V to 9V Output voltage 12V Frequency 1.6MHz Output current 0 - 600mA (When VIN >= 5V)

8.2.1.2 Detailed Design Procedure

8.2.1.2.1 Programming the Output Voltage

Output voltage is programmed via external resistor divider. By selecting the external resistor divider R FBT and RFBB, as shown in Figure 8-1, the output voltage is programmed to the desired value. When the output voltage is regulated, the typical voltage at the FB pin is VREF of 1.233V. R FB T = V OU T V R EF − 1 × R F BB (1) TLV61047 SLVSHD5 – NOVEMBER 2024 www.ti.com

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• VOUT is the desired output voltage
• VREF is the internal reference voltage at the FB pin For best accuracy, RFBB should be kept smaller than 150kΩ to ensure the current flowing through RFBB is at least 100 times larger than the FB pin leakage current. Changing R FBB towards a lower value increases the immunity against noise injection. Changing the R FBB towards a higher value reduces the quiescent current for achieving higher efficiency at low load currents.

8.2.1.2.2 Inductor Selection

Because the selection of the inductor affects steady state operation, transient behavior, and loop stability, the inductor is the most important component in power regulator design. There are three important inductor specifications, inductor value, saturation current, and DC resistance (DCR). The TLV61047 is designed to work with inductor values between 2.2µH and 10µH. Use Equation 2 to Equation 4 to calculate the peak current of the application inductor. To calculate the current in the worst case, use the minimum input voltage, maximum output voltage, and maximum load current of the application. To have enough design margin, choose the inductor value with –30% tolerance, and a low power-conversion efficiency for the calculation. In a boost regulator, the inductor dc current can be calculated with Equation 2. I L DC = V O U T × I OU T V I N × η (2) where

• VOUT = output voltage
• IOUT = output current
• VIN = input voltage
• η = power conversion efficiency, use 80% for most applications The inductor ripple current is calculated with the with the equation below for an asynchronous boost converter in continuous conduction mode (CCM). ∆ I L P − P = V I N × V OU T + V D − V I N L × f SW × V O U T + V D (3) where
• ΔIL(P-P) = inductor ripple current
• L = inductor value
• f SW = switching frequency
• VOUT = output voltage
• VIN = input voltage
• VD = the forward voltage of the Schottky diode Therefore, the inductor peak current is calculated with the below equation. I L P = I L DC + ∆ I L P − P 2 (4) Normally, it is advisable to work with an inductor peak-to-peak current of less than 40% of the average inductor current for maximum output current. A smaller ripple from a larger valued inductor reduces the magnetic hysteresis losses in the inductor and EMI. However, in the same way, load transient response time is increased. Table 8-2 lists the recommended inductor for the TLV61047 in the 1.6MHz configuration. Table 8-2. Recommended Inductors for the TLV61047 at 1.6MHz Configuration PART NUMBER L (µH) DCR MAX (mΩ) SATURATION CURRENT TYPICAL (A) SIZE (L×W×H) (mm) VENDOR(1) SWPA5040S4R7NT 4.7 39 3.9 5 × 5 × 4 Sunlord www.ti.com TLV61047 SLVSHD5 – NOVEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: TLV61047

Table 8-2. Recommended Inductors for the TLV61047 at 1.6MHz Configuration (continued) PART NUMBER L (µH) DCR MAX (mΩ) SATURATION CURRENT TYPICAL (A) SIZE (L×W×H) (mm) VENDOR(1) XAL4030-472ME 4.7 44.1 4.5 4 × 4 × 3 Coilcraft SWPA5040S100MT 10 83 2.9 5 × 5 × 4 Sunlord XAL4040-103ME 10 92.4 3 4 × 4 × 4 Coilcraft (1) See Third-party Products Disclaimer

8.2.1.2.3 Input and Output Capacitor Selection

The output capacitor is mainly selected to meet the requirements for output ripple and loop stability. This ripple voltage is related to the capacitor’s capacitance and its equivalent series resistance (ESR). Assuming a ceramic capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated by Equation 5: C OU T = I OU T × D M A X f S W × V R I PPL E (5) where

• DMAX = maximum switching duty cycle
• VRIPPLE = peak to peak output voltage ripple The ESR impact on the output ripple must be considered if tantalum or aluminum electrolytic capacitors are used. Take care when evaluating the derating of a ceramic capacitor under DC bias, aging, and AC signal. For example, the DC bias can significantly reduce capacitance. A ceramic capacitor can lose more than 50% of its capacitance at its rated voltage. Therefore, always leave margin on the voltage rating to ensure adequate capacitance at the required output voltage. TI recommends using the output capacitor with effective capacitance 10µF, which covers the major applications. TI also recommends placing a small 1µF capacitor right across the rectifier diode cathode to the GND pin of the TLV61047 to reduce the high RMS current loop's inductance. The output capacitor affects the small signal control loop stability of the boost regulator. If the output capacitor is below the range, the boost regulator can potentially become unstable. Increasing the output capacitor makes the output voltage ripple smaller in PWM mode. Table 8-3 lists the recommended capacitor for the TLV61047. Table 8-3. Recommended Output Capacitors for the TLV61047 PART NUMBER COUT (µF) RATING PACKAGE VENDOR(1) TMK316BLD106KL 10 25 V, X5R 1206 Taiyo Yuden CC1206KKX5R8BB106 10 25 V, X5R 1206 Yageo CGA5L1X7R1H106K160AC 10 50V, X7R 1206 TDK (1) See Third-party Products Disclaimer. The ceramic capacitors are an excellent choice for the input decoupling of the step-up converter since they have extremely low ESR and are available in small footprints. Input capacitors must be located as close as possible to the device. While a 10µF input capacitor or equivalent is sufficient for the most applications, larger values can be used to reduce input current ripple. Take care when using only ceramic input capacitors. When a ceramic capacitor is used at the input and the power is being supplied through long wires, such as from a wall adapter, a load step at the output can induce ringing at the VIN pin. This ringing can couple to the output and be mistaken as loop instability or can even damage the device. Additional "bulk" capacitor (electrolytic or tantalum) in this circumstance, must be placed between CIN and the power source lead to reduce ringing that can occur between the inductance of the power source leads and CIN. TLV61047 SLVSHD5 – NOVEMBER 2024 www.ti.com

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8.2.1.2.4 Diode Rectifier Selection

A Schottky diode is the preferred type due to its low forward voltage drop and small reverse recovery charge. Low reverse leakage current is important parameter when selecting the Schottky diode. The diode must be rated to handle the maximum output voltage plus any switching node ringing. Also, it must be able to handle the average output current.

8.2.1.3 Application Curves

Time Scale: 400µs/div EN 5V/div SW 10V/div VIN = 5V VOUT = 12V RLOAD = 24Ω Figure 8-2. Start-up by EN Waveforms Vout 5V/div IL 500mA/div Time Scale: 200µs/div EN 5V/div SW 10V/div VIN = 5V VOUT = 12V RLOAD = 24Ω Figure 8-3. Shutdown by EN Waveforms IL 100mA/div Time Scale: 400ns/div Vout (12V o set) 1mV/div SW 5V/div VIN = 5V VOUT = 12V IOUT = 5mA Figure 8-4. Switching Waveforms in Steady State IL 500mA/div Time Scale: 400ns/div Vout (12V o set) 20mV/div SW 5V/div VIN = 5V VOUT = 12V IOUT = 500mA Figure 8-5. Switching Waveforms in Steady State IL 1A/div Time Scale: 1ms/div Vout (12V o set) 1V/div Iout 300mA/div VIN = 5V VOUT = 12V IOUT = 50mA to 600mA Figure 8-6. Load Transient IL 1A/div Time Scale: 10ms/div Vout (12V o set) 100mV/div Iout 300mA/div VIN = 5V VOUT = 12V IOUT = 0 to 600mA Figure 8-7. Load Sweep www.ti.com TLV61047 SLVSHD5 – NOVEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: TLV61047

Time Scale: 1ms/div Vout (12V o set) 500mV/div Vin 5V/div VIN = 2.6V to 9V VOUT = 12V IOUT = 200mA Figure 8-8. Line Transient IL 1A/div Time Scale: 10ms/div Vout (12V o set) 100mV/div Vin 5V/div VIN = 2.6V to 9V VOUT = 12V IOUT = 200mA Figure 8-9. Line Sweep 8.2.2 28V Output Boost Converter In this design example, TLV61047 VOUT is configured as 28V with a input source from 9V to 20V. The principles of the components selection, including the inductor, input and output capacitors diode are the same with those in the example of 12V Output Boost Converter. VIN SW FB GND RFBT2 RFBB CIN EN 60.4k 10µF OFF ON L 10µH COUT1 10µF COUT2 10µF 665k RFBT1 649k VIN = 9V ~ 20V VOUT = 28V Figure 8-10. Typical 28V Application

8.2.2.1 Design Requirements

Table 8-4. Design Requirements PARAMETER VALUE Input voltage 9V to 20V Output voltage 28V Frequency 1.6MHz Output current 0 to 600mA (When VIN >= 12V) TLV61047 SLVSHD5 – NOVEMBER 2024 www.ti.com

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8.2.2.2 Application Curves

Time Scale: 400µs/div EN 5V/div SW 20V/div VIN = 12V VOUT = 28V RLOAD = 56Ω Figure 8-11. Start-up by EN Waveforms Vout 10V/div IL 500mA/div Time Scale: 200µs/div EN 5V/div SW 20V/div VIN = 12V VOUT = 28V RLOAD = 56Ω Figure 8-12. Shutdown by EN Waveforms IL 100mA/div Time Scale: 400ns/div Vout (28V o set) 2mV/div SW 10V/div VIN = 12V VOUT = 28V IOUT = 5mA Figure 8-13. Switching Waveforms in Steady State IL 500mA/div Time Scale: 400ns/div Vout (28V o set) 50mV/div SW 10V/div VIN = 12V VOUT = 28V IOUT = 500mA Figure 8-14. Switching Waveforms in Steady State IL 1A/div Time Scale: 1ms/div Vout (28V o set) 2V/div Iout 300mA/div VIN = 12V VOUT = 28V IOUT = 50mA to 600mA Figure 8-15. Load Transient IL 1A/div Time Scale: 10ms/div Vout (28V o set) 200mV/div Iout 300mA/div VIN = 12V VOUT = 28V IOUT = 0 to 600mA Figure 8-16. Load Sweep www.ti.com TLV61047 SLVSHD5 – NOVEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: TLV61047

Time Scale: 1ms/div Vout (28V o set) 500mV/div Vin 10V/div VIN = 9V to 20V VOUT = 28V IOUT = 200mA Figure 8-17. Line Transient IL 1A/div Time Scale: 10ms/div Vout (28V o set) 100mV/div Vin 10V/div VIN = 9V to 20V VOUT = 28V IOUT = 200mA Figure 8-18. Line Sweep

8.3 Power Supply Recommendations

The device is designed to operate from an input voltage supply range between 2.6V to 20V. This input supply must be well regulated. If the input supply is located more than a few inches from the converter, additional bulk capacitance may be required in addition to the ceramic bypass capacitors. A typical choice is an electrolytic or tantalum capacitor with a value of 47µF. Output current of the input power supply must be rated according to the supply voltage, output voltage and output current of the TLV61047.

8.4 Layout

8.4.1 Layout Guidelines

As for all switching power supplies, especially those running at high switching frequency and high currents, layout is an important design step. If the layout is not carefully done, the regulator could suffer from instability and noise problems. To maximize efficiency, switch rise and fall time are very fast. To prevent radiation of high frequency noise (for example, EMI), proper layout of the high-frequency switching path is essential. Minimize the length and area of all traces connected to the SW pin, and always use a ground plane under the switching regulator to minimize interplane coupling. The input capacitor must not only to be close to the VIN pin, but also to the GND pin in order to reduce input supply ripple. The most critical current path for all boost converters is from the switching FET, through the rectifier diode, then the output capacitors, and back to ground of the switching FET. This high current path contains nanosecond rise and fall time and must be kept as short as possible. Therefore, the output capacitor must not only to be close to the GND pin, but also to the cathode of the high side rectifier to reduce the overshoot at the SW pin. TLV61047 SLVSHD5 – NOVEMBER 2024 www.ti.com

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Product Folder Links: TLV61047

8.4.2 Layout Example

Figure 8-19. TLV61047 Layout www.ti.com TLV61047 SLVSHD5 – NOVEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 19 Product Folder Links: TLV61047

9 Device and Documentation Support

9.1 Device Support

9.1.1 Third-Party Products Disclaimer

TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.

9.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

9.3 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

9.4 Trademarks

TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners.

9.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

9.6 Glossary

TI Glossary This glossary lists and explains terms, acronyms, and definitions. NOTE: Page numbers for previous revisions may differ from page numbers in the current version. DATE REVISION NOTES November 2024 * Initial release

11 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. TLV61047 SLVSHD5 – NOVEMBER 2024 www.ti.com

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Product Folder Links: TLV61047

www.ti.com 6-Dec-2024 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead finish/ Ball material (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples TLV61047DDCR ACTIVE SOT-23-THIN DDC 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 047 Samples XTLV61047DDCR ACTIVE SOT-23-THIN DDC 5 3000 TBD Call TI Call TI -40 to 125 Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

www.ti.com 6-Dec-2024 Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 7-Dec-2024 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant TLV61047DDCR SOT-23- THIN Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 7-Dec-2024 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV61047DDCR SOT-23-THIN DDC 5 3000 210.0 185.0 35.0 Pack Materials-Page 2

www.ti.com PACKAGE OUTLINE C 0.20

0.12 TYP

0.25 GAGE PLANE 3.05 2.55 1.1 0.7 0.1

0.0 TYP

5X 0.5 0.3

0.2 C A B

0.6

0.3 TYP

1.9 0 -8 TYP 0.95 4X 0 -15 4X 4 -15 A 3.05 2.75 B1.75 1.45 (0.2) (0.15) SOT-23 - 1.1 max heightDDC0005A SMALL OUTLINE TRANSISTOR 4220752/C 08/2024 SEATING PLANE NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Reference JEDEC MO-193. 4. Support pin may differ or may not be present. 0.1 C SCALE 4.000

www.ti.com EXAMPLE BOARD LAYOUT

0.07 MAX

0.07 MIN

5X (1.1) 5X (0.6) (2.7) 4X (0.95) (R0.05) TYP 4220752/C 08/2024 SOT-23 - 1.1 max heightDDC0005A SMALL OUTLINE TRANSISTOR NOTES: (continued) 4. Publication IPC-7351 may have alternate designs. 5. Solder mask tolerances between and around signal pads can vary based on board fabrication site. SYMM LAND PATTERN EXAMPLE EXPLOSED METAL SHOWN SCALE:15X SYMM 3 4 SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL METALSOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDERMASK DETAILS EXPOSED METAL

www.ti.com EXAMPLE STENCIL DESIGN (2.7) 4X(0.95) 5X (1.1) 5X (0.6) (R0.05) TYP SOT-23 - 1.1 max heightDDC0005A SMALL OUTLINE TRANSISTOR 4220752/C 08/2024 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 THICK STENCIL SCALE:15X SYMM SYMM 3 4

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