TLV3012-Q1

TLV3011 -Q1 , TLV3012 -Q1 , TLV3011B -Q1 and TLV3012B -Q1 Low-Power Comparators With Integrated 1.24V Voltage Reference datasheet (Rev. D)

Document overview

• Manufacturer or author: Texas Instruments, Incorporated [SBOS551,D]
• PDF pages: 34

Technical content

TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1 and TLV3012B-Q1 Low-Power Comparators With Integrated 1.24V Voltage Reference

1 Features

• Qualified for automotive applications
• AEC-Q100 qualified with the following results: – Device temperature grade 1: –40°C to +125°C ambient operating temperature range – Device HBM ESD classification level 2 – Device CDM ESD classification level C3
• Low quiescent current: 3.1μA (maximum, "B" version)
• Integrated voltage reference: 1.242V
• Input common-mode range: 200mV beyond rails
• Voltage reference initial accuracy: 1.5%
• Built-in hysteresis: 6mV (typical)
• Fail-safe inputs ("B" version)
• Power-on-reset ("B" version)
• Open drain output option (TLV3011x-Q1)
• Push-pull output option (TLV3012x-Q1)
• Fast response time: 2µS ("B" version)
• Low supply voltage = 1.65V to 5.5V ("B" version)

2 Applications

• Lane departure warning
• Cluster
• Toll tag
• Asset tracking
• Battery management systems

3 Description

The TLV3011-Q1 is a low-power, open-drain output comparator; the TLV3012 -Q1 is a push-pull output comparator. Both devices feature an uncommitted on- chip voltage reference and have a 5 μA (maximum) quiescent current, an input common-mode range 200mV beyond the supply rails, and single-supply operation from 1.8V to 5.5V. The integrated 1.242V series voltage reference offers low 100ppm/°C (maximum) drift, is stable with up to 10nF capacitive load, and can provide up to 0.5mA (typical) of output current. The TLV3011B -Q1 and TLV3012B -Q1 "B" versions add power-on-reset (POR), fail-safe inputs, lower minimum supply voltage of 1.65V and a 3.1 μA maximum quiescent current. The family is available in both the tiny SOT23-6 package for space-conservative designs, and in the SC-70 package for even greater board area savings. All versions are specified for the temperature range of –40°C to +125°C.

Package Information

PART NUMBER PACKAGE (1) PACKAGE SIZE(2) TLV3011A-Q1, TLV3012A-Q1, TLV3011B-Q1, TLV3012B-Q1 DBV (SOT-23, 6) 2.9mm × 2.8mm DCK (SC-70, 6) 2mm × 2.1mm (1) For all available packages, see the orderable addendum at the end of the data sheet. (2) The package size (length × width) is a nominal value and includes pins, where applicable. R e f e r e n c e V o l t a g e ( V ) Units 5 0 0 1 0 0 0 1 5 0 0 2 0 0 0 2 5 0 0 3 0 0 0 9 8 6 0 U n i t s V S = 5 . 5 V N o L o a d TLV3012B-Q1 Reference Voltage Distribution TLV3012B-Q1 Reference Voltage vs Temperature TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

11 Mechanical, Packaging, and Orderable

TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 www.ti.com

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4 Pin Configuration and Functions

+ 5 Figure 4-1. DCK, DBV Package 6-Pin SC-70, SOT-23 Top View Table 4-1. Pin Functions PIN I/O DESCRIPTION NO. NAME

1 OUT O Comparator Output

2 V– - Negative (lowest) power supply

3 IN+ I Non-inverting comparator input

4 IN– I Inverting comparator input

5 REF O Reference Output

6 V+ - Positive (highest) power supply

www.ti.com TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: TLV3011-Q1 TLV3012-Q1 TLV3011B-Q1 TLV3012B-Q1

5 Specifications

5.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT Supply voltage: VS = (V+) – (V–) –0.5 7 V Input pins (IN+, IN–) from (V–)(2) –0.5 7 V Output (OUT) (Open-Drain) from (V–)(3) –0.5 7 V Output (OUT) (Push-Pull) from (V–) –0.5 (V+) + 0.5 V Output short circuit current(4) 10 mA Junction temperature, TJ 150 °C Storage temperature, Tstg –65 150 °C (1) Operation outside the Absolute Maximum Ratings can cause permanent device damage. Absolute Maximum Ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully functional, and this can affect device reliability, functionality, performance, and shorten the device lifetime. (2) Input pins are diode-clamped to (V–). Inputs (IN+, IN–) can be greater than (V+) as long as within the –0.5V to 7V range. Inputs beyond –0.3V must be current-limited to less than –10mA, while inputs beyond 7V must be externally voltage clamped. (3) Output (OUT) for open drain can be greater than (V+) and inputs (IN+, IN–) as long as the output is within the –0.5V to 7V range (4) Short-circuit to (V–) or (V+).

5.2 ESD Ratings

V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 V Charged-device model (CDM), per AEC Q100-0111 ±1000 (1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

5.3 Thermal Information

THERMAL METRIC(1) UNIT DCK (SC-70) DBV (SOT-23)

6 PINS 6 PINS

RθJA Junction-to-ambient thermal resistance 169.8 162.5 °C/W RθJC(top) Junction-to-case (top) thermal resistance 120.5 78.8 °C/W RθJB Junction-to-board thermal resistance 63.2 42.1 °C/W ψJT Junction-to-top characterization parameter 45.9 21.2 °C/W ψJB Junction-to-board characterization parameter 63.0 41.9 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance - - °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics report.

5.4 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT Supply voltage: VS = (V+) – (V–) 1.8 5.5 V Supply voltage: VS = (V+) – (V–) B-Versions 1.65 5.5 V Input voltage range from (V–) –0.2 (V+) + 0.2 V Output voltage range from (V–) for open drain –0.2 (V+) V Output voltage range from (V–) for open drain B-Versions –0.2 5.5 V Ambient temperature, TA –40 125 °C TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 www.ti.com

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5.5 Electrical Characteristics

For VS (TOTAL SUPPLY VOLTAGE) = (V+) – (V–) = 1.8V and 5.5V, VCM = VS /2 at TA = 25°C (Unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OFFSET VOLTAGE VOS Input offset voltage VCM = (V–) –6 ±0.3 6 mV VOS Input offset voltage VCM = (V–) TA = –40°C to +125°C –9 9 mV dVIO/dT Input offset voltage drift VCM = (V–) TA = –40°C to +125°C ±12 µV/°C PSRR power supply rejection ratio VCM = (V–) VS = 1.8V to 5.5V TA = –40°C to +125°C 100 1000 µV/V PSRR power supply rejection ratio (B-Versions) VCM = (V–) VS = 1.65V to 5.5V TA = –40°C to +125°C 100 1000 µV/V VHYS Input hysteresis voltage TA = –40°C to +125°C 2 6 8 mV INPUT BIAS CURRENT IB Input bias current VCM = VS /2 –10(1) ±4.5 10(1) pA IOS Input offset current VCM = VS /2 –10(1) ±1 10(1) pA INPUT COMMON MODE RANGE VCM-Range Common-mode voltage range VS = 1.8V to 5.5V (V–) – 0.2 (V+) + 0.2 V CMRR Common mode rejection ratio VCM = (V–) + 1.5V to (V+) + 0.2V VS = 5.5V 60 74 dB CMRR Common mode rejection ratio VCM = (V–) - 0.2V to (V+) + 0.2V VS = 5.5V 54 62 dB RCM Input Common Mode Resistance 1013 Ω CIC Input Common Mode Capacitance 2 pF INPUT IMPEDANCE RDM Input Differential Mode Resistance 1013 Ω CID Input Differential Mode Capacitance 4 pF OUTPUT VOL Voltage swing from (V–) VS = 5V ISINK = 5mA TA = –40°C to +125°C 160 200 mV VOH Voltage swing from (V+) (for Push- Pull only) VS = 5V ISOURCE = 5mA TA = –40°C to +125°C 90 200 mV VOLTAGE REFERENCE VOUT Reference Voltage 1.223 1.242 1.260 V Accuracy ±0.25% ±1.5% dVOUT/dT Temperature Drift TA = –40°C to +125°C 40 100 ppm/℃ dVOUT/ dILOAD Load Regulation, Sourcing 0mA < ISOURCE ≤ 0.5mA 0.36 1(1) mV/mA Load Regulation, Sinking 0mA < ISINK ≤ 0.5mA 6.6 mV/mA www.ti.com TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: TLV3011-Q1 TLV3012-Q1 TLV3011B-Q1 TLV3012B-Q1

5.5 Electrical Characteristics (continued)

For VS (TOTAL SUPPLY VOLTAGE) = (V+) – (V–) = 1.8V and 5.5V, VCM = VS /2 at TA = 25°C (Unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ILOAD Output Current 0.5 mA dVOUT/dVS Line Regulation 1.8V ≤ VS ≤ 5.5V 10 100(1) µV/V dVOUT/dVS Line Regulation (B-Versions) 1.65V ≤ VS ≤ 5.5V 10 100(1) µV/V Vnoise Noise f = 0.1Hz to 10Hz 0.2 mVPP POWER SUPPLY IQ Quiescent current per comparator Output is logic high 2.8 5 µA IQ Quiescent current per comparator Output is logic high TA = –40°C to +125°C 7 µA IQ Quiescent current per comparator (B-Versions) Output is logic high 2.4 3.1 µA IQ Quiescent current per comparator (B-Versions) Output is logic high TA = –40°C to +125°C 3.6 µA (1) Verified by characterization TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 www.ti.com

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5.6 Switching Characteristics

For VS (TOTAL SUPPLY VOLTAGE) = (V+) – (V–) = 1.8V and 5.5V, VCM = VS / 2 at TA = 25°C (Unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OUTPUT TPD-LH Propagation delay time, low-to- high f = 10kHz, VSTEP = 1V, VOD = 10mV, CL = 10pF 12 µs TPD-LH Propagation delay time, low-to- high f = 10kHz, VSTEP = 1V, VOD = 100mV, CL = 10pF 6 µs TPD-LH Propagation delay time, low-to- high (push-pull output, B-Version) f = 10kHz, VSTEP = 200mV, VOD = 100mV, CL = 10pF 2 4 µs TPD-HL Propagation delay time, high- to-low f = 10kHz, VSTEP = 1V, VOD = 10mV, CL = 10pF 13.5 µs TPD-HL Propagation delay time, high- to-low f = 10kHz, VSTEP = 1V, VOD = 100mV, CL = 10pF 6.5 µs TPD-HL Propagation delay time, high- to-low (B-Versions) f = 10kHz, VSTEP = 200mV, VOD = 100mV, CL = 10pF 2 4 µs TRISE Output Rise Time, 20% to 80%, push-pull output CL = 10pF 100 ns TRISE Output Rise Time, 20% to 80%, push-pull output (B-Versions) CL = 10pF 10 ns TRISE Output Rise Time, 20% to 80%, open-drain output RL = 10kΩ, CL = 10pF 200 ns TFALL Output Fall Time, 80% to 20% CL = 10pF 100 ns TFALL Output Fall Time, 80% to 20% (B-Versions) CL = 10pF 10 ns TFALL Output Fall Time, 80% to 20%, open-drain output RL = 10kΩ, CL = 10pF 200 ns TFALL Output Fall Time, 80% to 20%, open-drain output (B-Versions) RL = 10kΩ, CL = 10pF 10 ns tON Power on-time (B-Versions) 1.9 ms www.ti.com TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: TLV3011-Q1 TLV3012-Q1 TLV3011B-Q1 TLV3012B-Q1

6 Typical Characteristics

For VS (Total Supply Voltage) = (V+) – (V–) = +5V, VCM = VS /2 at TA = 25°C , RPULLUP = 1MΩ to V+, CL = 15pF, VOD = 100mV unless otherwise noted. O u t p u t S i n k i n g C u r r e n t ( m A ) Output Swing from V- (mV) 1 0 2 0 3 0 5 0 1 0 0 2 0 0 3 0 0 5 0 0 1 0 0 0 2 0 0 0 3 0 0 0 5 0 0 0 1 2 5 ° C 2 5 ° C - 4 0 ° C Figure 6-1. Output Swing vs. Output Sinking Current - 1.8V O u t p u t S o u r c i n g C u r r e n t ( m A ) Output Swing from V+ (mV) 1 0 2 0 3 0 5 0 1 0 0 2 0 0 3 0 0 5 0 0 1 0 0 0 2 0 0 0 3 0 0 0 5 0 0 0 P u s h - P u l l O u t p u t O n l y N o L o a d 1 2 5 ° C 2 5 ° C - 4 0 ° C Figure 6-2. Output Swing vs. Output Sourcing Current - 1.8V O u t p u t S i n k i n g C u r r e n t ( m A ) Output Swing from V- (mV) 1 0 2 0 3 0 5 0 1 0 0 2 0 0 3 0 0 5 0 0 1 0 0 0 2 0 0 0 3 0 0 0 5 0 0 0 1 2 5 ° C 2 5 ° C - 4 0 ° C Figure 6-3. Output Swing vs. Output Sinking Current - 3.3V O u t p u t S o u r c i n g C u r r e n t ( m A ) Output Swing from V+ (mV) 1 0 2 0 3 0 5 0 1 0 0 2 0 0 3 0 0 5 0 0 1 0 0 0 2 0 0 0 3 0 0 0 5 0 0 0 P u s h - P u l l O u t p u t O n l y N o L o a d 1 2 5 ° C 2 5 ° C - 5 5 ° C Figure 6-4. Output Swing vs. Output Sourcing Current - 3.3V Figure 6-5. Output Swing vs. Output Sinking Current - 5V O u t p u t S o u r c i n g C u r r e n t ( m A ) Output Swing from V+ (mV) 1 0 2 0 3 0 5 0 1 0 0 2 0 0 3 0 0 5 0 0 1 0 0 0 2 0 0 0 3 0 0 0 5 0 0 0 P u s h - P u l l O u t p u t O n l y N o L o a d 1 2 5 ° C 2 5 ° C - 4 0 ° C Figure 6-6. Output Swing vs. Output Sourcing Current - 5V TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 www.ti.com

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6 Typical Characteristics (continued)

For VS (Total Supply Voltage) = (V+) – (V–) = +5V, VCM = VS /2 at TA = 25°C , RPULLUP = 1MΩ to V+, CL = 15pF, VOD = 100mV unless otherwise noted. T e m p e r a t u r e ( ° C ) Total Quiecent Current (A) - 4 0 - 2 5 - 1 0 5 2 0 3 5 5 0 6 5 8 0 9 5 1 1 0 1 2 5 1 . 8 0 1 . 9 0 2 . 0 0 2 . 1 0 2 . 2 0 2 . 3 0 2 . 4 0 2 . 5 0 2 . 6 0 2 . 7 0 2 . 8 0 2 . 9 0 3 . 0 0 3 . 1 0 O u t p u t h i g h 5 . 5 V 5 V 3 . 3 V 1 . 8 V 1 . 6 5 V Figure 6-7. Supply Current vs. Temperature S u p p l y V o l t a g e ( V ) Total Quiecent Current (A) 1 . 8 0 1 . 9 0 2 . 0 0 2 . 1 0 2 . 2 0 2 . 3 0 2 . 4 0 2 . 5 0 2 . 6 0 2 . 7 0 2 . 8 0 2 . 9 0 3 . 0 0 3 . 1 0 - 4 0 ° C - 2 0 ° C 0 ° C 2 5 ° C 5 5 ° C 8 5 ° C 1 2 5 ° C O u t p u t H i g h Figure 6-8. Supply Current vs. Supply Voltage I n p u t V o l t a g e f r o m V - ( V ) Total Quiecent Current (A) 2 . 0 0 2 . 1 5 2 . 3 0 2 . 4 5 2 . 6 0 2 . 7 5 2 . 9 0 3 . 0 5 - 4 0 ° C - 2 0 ° C 0 ° C 2 5 ° C 5 5 ° C 8 5 ° C 1 2 5 ° C O u t p u t H i g h Figure 6-9. Supply Current vs. Common Mode - 3.3V I n p u t V o l t a g e f r o m V - ( V ) Total Quiecent Current (A) 1 . 7 5 2 . 0 0 2 . 2 5 2 . 5 0 2 . 7 5 3 . 0 0 - 4 0 ° C - 2 0 ° C 0 ° C 2 5 ° C 5 5 ° C 8 5 ° C 1 2 5 ° C O u t p u t H i g h Figure 6-10. Supply Current vs. Common Mode - 1.8V I n p u t V o l t a g e f r o m V - ( V ) Total Quiecent Current (A) 2 . 0 0 2 . 2 5 2 . 5 0 2 . 7 5 3 . 0 0 3 . 2 5 - 4 0 ° C - 2 0 ° C 0 ° C 2 5 ° C 5 5 ° C 8 5 ° C 1 2 5 ° C O u t p u t H i g h Figure 6-11. Supply Current vs. Common Mode - 5V O v e r d r i v e ( m V ) Propagation Delay, TPHL (s) 5 6 7 8 1 0 2 0 3 0 4 0 5 0 7 0 1 0 0 2 0 0 3 0 0 5 0 0 1 0 1 . 8 V 3 . 3 V 5 V Figure 6-12. High to Low Propagation Delay vs. Overdrive www.ti.com TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: TLV3011-Q1 TLV3012-Q1 TLV3011B-Q1 TLV3012B-Q1

For VS (Total Supply Voltage) = (V+) – (V–) = +5V, VCM = VS /2 at TA = 25°C , RPULLUP = 1MΩ to V+, CL = 15pF, VOD = 100mV unless otherwise noted. O v e r d r i v e ( m V ) Propagation Delay, TPLH (s) 5 6 7 8 1 0 2 0 3 0 4 0 5 0 7 0 1 0 0 2 0 0 3 0 0 5 0 0 0 . 5 0 . 7 1 0 1 . 8 V 3 . 3 V 5 V Figure 6-13. Low to High Propagation Delay vs. Overdrive Figure 6-14. High to Low Propagation Delay vs. Temperature T e m p e r a t u r e ( ° C ) Propagation Dealy, TPLH (s) - 4 0 - 2 5 - 1 0 5 2 0 3 5 5 0 6 5 8 0 9 5 1 1 0 1 2 5 1 . 2 1 . 4 1 . 6 1 . 8 V O D = 1 0 0 m V 5 V 3 . 3 V 1 . 8 V Figure 6-15. Low to High Propagation Delay vs. Temperature Figure 6-16. Reference Voltage vs. Temperature R e f e r n c e O u t p u t S o u r c i n g C u r r e n t ( m A ) Reference Output Voltage (V) 1 . 2 3 9 0 1 . 2 3 9 1 1 . 2 3 9 2 1 . 2 3 9 3 1 . 2 3 9 4 1 . 2 3 9 5 1 . 2 3 9 6 1 . 2 3 9 7 1 . 2 3 9 8 1 . 2 3 9 9 1 . 2 4 0 0 1 . 8 V 3 . 3 V 5 V Figure 6-17. Reference Voltage vs. Reference Output Sourcing Current R e f e r n c e O u t p u t S i n k i n g C u r r e n t ( m A ) Reference Output Voltage (V) 1 . 2 4 0 0 1 . 2 4 0 1 1 . 2 4 0 2 1 . 2 4 0 3 1 . 2 4 0 4 1 . 2 4 0 5 1 . 2 4 0 6 1 . 2 4 0 7 1 . 2 4 0 8 1 . 2 4 0 9 1 . 2 4 1 0 1 . 8 V 3 . 3 V 5 V Figure 6-18. Reference Voltage vs. Reference Output Sinking Current TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 www.ti.com

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For VS (Total Supply Voltage) = (V+) – (V–) = +5V, VCM = VS /2 at TA = 25°C , RPULLUP = 1MΩ to V+, CL = 15pF, VOD = 100mV unless otherwise noted. T o g g l e F r e q u e n c y ( H z ) Total Supply Current (A) 1 2 3 4 5 7 1 0 2 0 5 0 1 0 0 2 0 0 1 0 0 0 1 0 0 0 0 5 0 0 0 05 0 0 0 0 1 0 C L = 1 5 p F R P U L L U P = 1 M  P u l l u p c u r r e n t n o t i n c l u d e d 5 V 3 . 3 V 1 . 8 V Figure 6-19. Supply Current vs. Toggle Frequency - Open Drain Output T o g g l e F r e q u e n c y ( H z ) Total Supply Current (A) 1 2 3 4 5 7 1 0 2 0 5 0 1 0 0 2 0 0 1 0 0 0 1 0 0 0 0 5 0 0 0 05 0 0 0 0 1 0 C L = 1 5 p F5 V 3 . 3 V 1 . 8 V Figure 6-20. Supply Current vs. Toggle Frequency - Push-Pull Output T e m p e r a t u r e ( ° C ) Typical Hysteresis (mV) - 4 0 - 2 5 - 1 0 5 2 0 3 5 5 0 6 5 8 0 9 5 1 1 0 1 2 5 4 . 5 5 . 5 6 . 5 5 V 3 . 3 V 1 . 8 V Figure 6-21. Hysteresis Voltage vs. Temperature I n p u t C o m m o n M o d e V o l t a g e ( V ) Typical Hysteresis Voltage (V) 4 . 5 5 . 5 6 . 5 7 . 5 8 . 5 1 2 5 ° C 8 5 ° C 2 5 ° C - 4 0 ° C Figure 6-22. Hysteresis Voltage vs. Common Mode, 1.8V I n p u t C o m m o n M o d e V o l t a g e ( V ) Typical Hysteresis Voltage (V) 4 . 5 5 . 5 6 . 5 7 . 5 8 . 5 1 2 5 ° C 8 5 ° C 2 5 ° C - 4 0 ° C Figure 6-23. Hysteresis Voltage vs. Common Mode, 3.3V Figure 6-24. Hysteresis Voltage vs. Common Mode, 5V www.ti.com TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: TLV3011-Q1 TLV3012-Q1 TLV3011B-Q1 TLV3012B-Q1

For VS (Total Supply Voltage) = (V+) – (V–) = +5V, VCM = VS /2 at TA = 25°C , RPULLUP = 1MΩ to V+, CL = 15pF, VOD = 100mV unless otherwise noted. T e m p e r a t u r e ( ° C ) Typical Hysteresis (mV) - 4 0 - 2 5 - 1 0 5 2 0 3 5 5 0 6 5 8 0 9 5 1 1 0 1 2 5 4 . 5 5 . 5 6 . 5 5 V 3 . 3 V 1 . 8 V Figure 6-25. Hysteresis Voltage vs. Supply Voltage T e m p e r a t u r e ( ° C ) Offset Voltage (mV) - 5 5 - 3 5 - 1 5 5 2 5 4 5 6 5 8 5 1 0 5 1 2 5 - 3 - 2 . 5 - 2 - 1 . 5 - 1 - 0 . 5 0 . 5 1 . 5 2 . 5

7 I n d i v i d u a l U n i t s

V S = 1 . 8 V Figure 6-26. Offset Voltage vs. Temperature, 1.8V T e m p e r a t u r e ( ° C ) Offset Voltage (mV) - 4 0 - 2 5 - 1 0 5 2 0 3 5 5 0 6 5 8 0 9 5 1 1 0 1 2 5 - 3 - 2 . 5 - 2 - 1 . 5 - 1 - 0 . 5 0 . 5 1 . 5 2 . 5 V S = 3 . 3 V Figure 6-27. Offset Voltage vs. Temperature, 3.3V Figure 6-28. Offset Voltage vs. Temperature, 5V C o m m o n M o d e V o l t a g e ( V ) Offset Voltage (mV) - 3 . 0 0 - 2 . 5 0 - 2 . 0 0 - 1 . 5 0 - 1 . 0 0 - 0 . 5 0 0 . 0 0 0 . 5 0 1 . 0 0 1 . 5 0 2 . 0 0 2 . 5 0 3 . 0 0 V S = 5 V , T A = 2 5 ° C Figure 6-29. Offset Voltage vs. Common Mode Voltage, 1.8V Figure 6-30. Offset Voltage vs. Common Mode Voltage, 3.3V TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 www.ti.com

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For VS (Total Supply Voltage) = (V+) – (V–) = +5V, VCM = VS /2 at TA = 25°C , RPULLUP = 1MΩ to V+, CL = 15pF, VOD = 100mV unless otherwise noted. C o m m o n M o d e V o l t a g e ( V ) Offset Voltage (mV) - 3 . 0 0 - 2 . 5 0 - 2 . 0 0 - 1 . 5 0 - 1 . 0 0 - 0 . 5 0 0 . 0 0 0 . 5 0 1 . 0 0 1 . 5 0 2 . 0 0 2 . 5 0 3 . 0 0 V S = 5 V , T A = 2 5 ° C Figure 6-31. Offset Voltage vs. Common Mode Voltage, 5V S u p p l y V o l t a g e ( V ) Offset Voltage (mV) - 3 . 0 0 - 2 . 5 0 - 2 . 0 0 - 1 . 5 0 - 1 . 0 0 - 0 . 5 0 0 . 0 0 0 . 5 0 1 . 0 0 1 . 5 0 2 . 0 0 2 . 5 0 3 . 0 0 V S = 5 V , T A = 1 2 5 ° C 7 I n d i v i d u a l U n i t s Figure 6-32. Offset Voltage vs. Supply Voltage, 125°C S u p p l y V o l t a g e ( V ) Offset Voltage (mV) - 3 . 0 0 - 2 . 5 0 - 2 . 0 0 - 1 . 5 0 - 1 . 0 0 - 0 . 5 0 0 . 0 0 0 . 5 0 1 . 0 0 1 . 5 0 2 . 0 0 2 . 5 0 3 . 0 0 V S = 5 V , T A = 2 5 ° C Figure 6-33. Offset Voltage vs. Supply Voltage, 25°C S u p p l y V o l t a g e ( V ) Offset Voltage (mV) - 3 . 0 0 - 2 . 5 0 - 2 . 0 0 - 1 . 5 0 - 1 . 0 0 - 0 . 5 0 0 . 0 0 0 . 5 0 1 . 0 0 1 . 5 0 2 . 0 0 2 . 5 0 3 . 0 0 T A = - 4 0 ° C 7 I n d i v i d u a l U n i t s Figure 6-34. Offset Voltage vs. Supply Voltage, -40°C www.ti.com TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: TLV3011-Q1 TLV3012-Q1 TLV3011B-Q1 TLV3012B-Q1

7 Detailed Description

7.1 Overview

The TLV301x-Q1 is a MicroPower comparator with an integrated reference that is well suited for compact, low-current, precision voltage detection applications. With a high-accuracy, internal reference of 1.242V and low quiescent current, the TLV301x -Q1 enables power conscious systems to monitor and respond quickly to fault conditions. Throughout this data sheet, rev "B" is only specified when there is a difference.

7.2 Functional Block Diagram

1.242V Reference

7.3 Feature Description

The TLV301x-Q1 is comprised of a rail-to-rail input comparator with open-drain or push-pull output options and a voltage reference that is externally available.

7.4 Device Functional Modes

The TLV301x-Q1 requires an operating voltage between 1.8V and 5.5V for the comparator output to reflect the voltage applied to the inputs. Similarly, the reference output (REF) is valid over the same operating voltage range. The "B" versions add power on reset, fail-safe inputs and a 1.65V minimum supply voltage.

7.4.1 Open Drain Output (TLV3011-Q1 and TLV3011B-Q1)

The TLV3011-Q1 features an Open-Drain (sinking only) output that allows multiple devices to be driven by a single pull-up resistor to accomplish an OR function, making the TLV3011 -Q1 useful for logic applications. The value of the pull-up resistor and supply voltage used affects current consumption due to additional current drawn when the output is in a low state. This effect can be seen in the typical curve Quiescent Current vs Output Switching Frequency. For the TLV3011-Q1, the pull-up voltage must be less than, or equal to, the V+ supply voltage (VPULLUP ≤ V+). The TLV3011B-Q1 output can be pulled-up to any voltage up to 5.5V, regardless of the supply voltage.

7.4.2 Push-Pull Output (TLV3012-Q1 and TLV3012B-Q1)

The TLV3012-Q1 has a "Push-Pull" output capable of both sinking and sourcing current. The push-pull output stage is an excellent choice for reduced power budget applications by eliminating the need for a pull-up resistor and features no shoot-through current. Do not tie push-pull outputs together.

7.4.3 Voltage Reference

The integrated 1.242V voltage reference offers low 100ppm/°C (maximum) drift provided on a seporate output pin that allows use of external dividers or to provide a reference voltage for other external circuitry. The reference is stable with up to a 10nF capacitive load and can sink or source up to 500µA (typical) of output current.

7.4.4 Internal Hysteresis

The TLV301x-Q1 and TLV301xB -Q1 have typically 6mV of built-in hysteresis. External hysteresis can still be added as explained in the section Adding External Hysteresis. TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 www.ti.com

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7.4.5 TLV3011B-Q1 and TLV3012B-Q1 Fail-Safe inputs

The TLV3011B-Q1 and TLV3012B -Q1 inputs are Fail-Safe up to 5.5V independent of V+ voltage. Fail-Safe is defined as maintaining the same high input impedance when V+ is unpowered or within the recommended operating ranges. The Fail-Safe inputs can be any value between 0V and 5.5V, even while V+ is zero or ramping up or down. This feature avoids power sequencing issues as long as the input voltage range and supply voltage are within the specified ranges. This is possible since the inputs are not clamped to V+ and the input current maintains the value even when a higher voltage is applied to the inputs. As long as one of the input pins remains within the valid input range, and the supply voltage is valid and not in POR, the output state is correct. The following is a summary of the TLV3011B -Q1 and TLV3012B -Q1 device input voltage excursions and the outcomes: 1. When both IN- and IN+ are within the specified input voltage range: a. If IN- is higher than IN+ and the offset voltage, the output is low. b. If IN- is lower than IN+ and the offset voltage, the output is high. 2. When IN- is higher than the specified input voltage range and IN+ is within the specified voltage range, the output is low. 3. When IN+ is higher than the specified input voltage range and IN- is within the specified input voltage range, the output is high 4. When IN- and IN+ are both outside the specified input voltage range, the output state is indeterminate (random). Do not operate in this region. Because the inputs do not have upper ESD diode clamps to V+, input voltages must be externally clamped to below 5.5V if the source can possibly exceed 5.5V. A current limiting resistor in series with the input is also recommend in case of input transients.

7.4.6 TLV3011B-Q1 and TLV3012B-Q1 Power On Reset

The TLV3011B-Q1 and TLV3012B -Q1 have an internal Power-on-Reset (POR) circuit for known start-up or power-down conditions. While the power supply (V+) is ramping up or ramping down, the POR circuitry is activated for up to 1.9ms after the minimum supply voltage threshold is crossed, or immediately when the supply voltage drops below minimum supply. When the supply voltage is equal to or greater than the minimum supply voltage, and after the delay period, the comparator output reflects the state of the differential input (V ID). This delay is long enough to allow the reference output to stabilize with up to a 10nF capacitive load. During the POR period (ton), the outputs are as follows:

• The open drain output TLV3011B-Q1 is high (Hi-Z).
• The push-pull output TLV3012B-Q1 is low (sinking). Power On Reset Time (tON) VOH / 2 VOL OUT VS +1.5V Figure 7-1. Power-On Reset Example Timing Diagram for Push-Pull Output Note the nature of an open collector output is that that the output rises with the pull-up voltage during the HI-Z POR period. www.ti.com TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: TLV3011-Q1 TLV3012-Q1 TLV3011B-Q1 TLV3012B-Q1

8 Application and Implementation

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality.

8.1 Application Information

The TLV301x-Q1 and TLV301xB-Q1 comparator family with on-chip 1.242V series reference with the choice of either open-drain or push-pull output stages. A typical supply current of 2.4 μA and small packaging combined with 1.65V supply requirements make the TLV301xB-Q1 devices an excellent choice for battery and portable designs. Shown below are the typical connections for the TLV3012-Q1 device. REF TLV3012-Q1 0.01 µF 10 µF VOUT VIN– VIN+ Copyright © 2016, Texas Instruments Incorporated Figure 8-1. Basic Connections

8.1.1 Adding External Hysteresis

For noisy input signals, the comparator output can display multiple switching as input signals move through the switching threshold. The typical hysteresis of the TLV301x -Q1 family is 6 mV (±3mV). To increase the overall hysteresis, external hysteresis can be added by connecting a small amount of feedback to the positive input. This external hysteresis adds to the internal hysteresis. Shown below is a typical topology used to introduce external hysteresis. V =HYST V+ × R1 R1 + R2 (1) TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 www.ti.com

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VHYST = 0.38 V 39 kΩ 560 kΩ Copyright © 2016, Texas Instruments Incorporated Figure 8-2. Adding External Hysteresis The VHYST voltage sets the value of the transition voltage required to switch the comparator output by increasing the threshold region, thereby reducing sensitivity to noise.

8.2 Typical Application

8.2.1 Under-Voltage Detection

Under-voltage detection is frequently required to alert the system that a battery voltage has dropped below the usable voltage level. Figure 23 shows a simple under-voltage detection circuit using the TLV3012-Q1 which is configured as a non-inverting comparator with the integrated 1.242V reference is externally connected to the inverting input pin (IN-). VBAT ALERT Micro- controller 1.242V t TLV3012-Q1 Figure 8-3. Under-Voltage Detection

8.2.1.1 Design Requirements

For this design, follow these design requirements:

• Operate from power supply that powers the microcontroller.
• Under-voltage alert is active low.
• Logic low output when VBAT is less than 2.0V.

8.2.1.2 Detailed Design Procedure

Configure the circuit as shown above. Connect (V+) to V BAT which also powers the microcontroller. Resistors R1 and R2 create the under-voltage alert level of 2.0V. When the battery voltage sags down to 2.0V, the resistor divider voltage crosses V REF, the 1.242V reference threshold of the TLV3012 -Q1. This causes the comparator www.ti.com TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: TLV3011-Q1 TLV3012-Q1 TLV3011B-Q1 TLV3012B-Q1

output to transition from a logic high to a logic low. The push-pull output of the TLV3012 -Q1 is selected since the comparator operating voltage is shared with the microcontroller which is receiving the under-voltage alert signal. Equation 2 is derived from the analysis of Figure 8-3. (2) where

• R1 and R2 are the resistor values for the resistor divider connected to IN+
• VBAT is the voltage source that is being monitored for an undervoltage condition.
• VREF is the falling edge threshold where the comparator output changes state from high to low Rearranging the equation and solving for R1 yields this result. (3) For the specific undervoltage detection of 2.0V using the TLV3012-Q1, the following results are calculated. (4) where
• R2 is set to 1MΩ
• VBAT is set to 2.0V
• VREF is set to1.242V Choose RTOTAL (R1 + R2) such that the current through the divider is at least 100 times higher than the input bias current (IBIAS). The resistors can have high values to minimize current consumption in the circuit without adding significant error to the resistive divider. TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 www.ti.com

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8.2.1.3 Application Curve

T Time (s) IN 0.00 2.00 VBAT 0.00 3.30 Vout 3.30 1.242 2.00 OUT (V) IN+ (V) VBAT (V) Time (s) 0.00 Figure 8-4.

8.3 System Examples

8.3.1 Power-On Reset

The reset circuit shown below provides a time-delayed release of reset to the MSP430™ microcontroller. Operation of the circuit is based on a stabilization time constant of the supply voltage, rather than on a predetermined voltage value. The negative input is a reference voltage created by the internal voltage reference. The positive input is an RC circuit that provides a power-up delay. When power is applied, the output of the comparator is low, holding the processor in the reset condition. Only after allowing time for the supply voltage to stabilize does the positive input of the comparator become higher than the negative input, resulting in a high output state, releasing the processor for operation. The stabilization time required for the supply voltage is adjustable by the selection of the RC component values. Use of a lower-valued resistor in this portion of the circuit does not increase current consumption, because no current flows through the RC circuit after the supply has stabilized. www.ti.com TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 19 Product Folder Links: TLV3011-Q1 TLV3012-Q1 TLV3011B-Q1 TLV3012B-Q1

1 MΩDI

1.242 V TLV3012-Q1 MSP430™ RESET REF Copyright © 2016, Texas Instruments Incorporated Figure 8-5. TLV3012-Q1 Configured as Power-Up Reset Circuit for the MSP430™ Microcontroller The reset delay needed depends on the power-up characteristics of the system power supply. R 1 and C 1 are selected to allow enough time for the power supply to stabilize. D 1 provides rapid reset if power is lost. In this example, the R1 × C1 time constant is 10 ms.

8.3.2 Relaxation Oscillator

Shown below, the TLV3012 -Q1 device can be configured as a relaxation oscillator to provide a simple and inexpensive clock output. The capacitor is charged at a rate of T = 0.69RC and discharges at a rate of 0.69RC. Therefore, the period is T = 1.38RC. R1 can be a different value than R2. F = 724 Hz 2/3 (V+) 1/3 (V+) 1 MΩ 1 MΩ 1 MΩ 1 MΩ VOUT VC t C 1000 pF T1 T2 t TLV3012-Q1 Copyright © 2016, Texas Instruments Incorporated Figure 8-6. TLV3012-Q1 Configured as Relaxation Oscillator TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 www.ti.com

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8.4 Power Supply Recommendations

The TLV3012-Q1 has a recommended operating voltage range (V S) of 1.8V to 5.5V. V S is defined as (V+) – (V-). Therefore, the supply voltages used to create VS can be single-ended or bipolar. For example, single-ended supply voltages of 5V and 0V and bipolar supply voltages of +2.5V and –2.5V create comparable operating voltages for VS. However, when bipolar supply voltages are used, realize that the reference (REF) and logic low level of the comparator output is referenced to (V-). Output capacitive loading and output toggle rate causes the average supply current to rise over the quiescent current in the EC Table.

8.5 Layout

8.5.1 Layout Guidelines

To minimize supply noise, power supplies must be capacitively decoupled by a 0.1 μF ceramic capacitor. Comparators are sensitive to input noise and precautions such as proper grounding (use of ground plane), supply bypassing, and guarding of high-impedance nodes minimize the effects of noise and help specified performance.

8.5.2 Layout Example

V S GND GND OUT SOT-23 Figure 8-7. Layout Example www.ti.com TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: TLV3011-Q1 TLV3012-Q1 TLV3011B-Q1 TLV3012B-Q1

9 Device and Documentation Support

9.1 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on Notifications to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

9.2 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

9.3 Trademarks

MSP430™ is a trademark of Texas Instruments. TI E2E™ is a trademark of Texas Instruments. All trademarks are the property of their respective owners.

9.4 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

9.5 Glossary

TI Glossary This glossary lists and explains terms, acronyms, and definitions. NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision C (April 2023) to Revision D (January 2025) Page Changes from Revision B (August 2022) to Revision C (April 2023) Page Changes from Revision A (June 2019) to Revision B (August 2022) Page TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 www.ti.com

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Changes from Revision * (March 2011) to Revision A (June 2019) Page

• Added the HBM and CDM ESD ratings and classification levels. Also added the AEC-Q100 device
• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information

11 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. www.ti.com TLV3011-Q1, TLV3012-Q1, TLV3011B-Q1, TLV3012B-Q1 SBOS551D – MARCH 2011 – REVISED JANUARY 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 23 Product Folder Links: TLV3011-Q1 TLV3012-Q1 TLV3011B-Q1 TLV3012B-Q1

www.ti.com 31-Oct-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TLV3011AQDBVRQ1 Active Production SOT-23 (DBV) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 2Q7F TLV3011AQDBVRQ1.A Active Production SOT-23 (DBV) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 2Q7F TLV3011AQDCKRQ1 Active Production SC70 (DCK) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 1M6 TLV3011AQDCKRQ1.A Active Production SC70 (DCK) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 1M6 TLV3011BQDBVRQ1 Active Production SOT-23 (DBV) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 31IF TLV3011BQDBVRQ1.A Active Production SOT-23 (DBV) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 31IF TLV3011BQDCKRQ1 Active Production SC70 (DCK) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 1O6 TLV3011BQDCKRQ1.A Active Production SC70 (DCK) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 1O6 TLV3012AQDBVRQ1 Active Production SOT-23 (DBV) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 2Q8F TLV3012AQDBVRQ1.A Active Production SOT-23 (DBV) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 2Q8F TLV3012AQDCKRQ1 Active Production SC70 (DCK) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 BPF TLV3012AQDCKRQ1.A Active Production SC70 (DCK) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 BPF TLV3012AQDCKRQ1.B Active Production SC70 (DCK) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 BPF TLV3012BQDBVRQ1 Active Production SOT-23 (DBV) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 31JF TLV3012BQDBVRQ1.A Active Production SOT-23 (DBV) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 31JF TLV3012BQDCKRQ1 Active Production SC70 (DCK) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 1O7 TLV3012BQDCKRQ1.A Active Production SC70 (DCK) | 6 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 125 1O7 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. Addendum-Page 1

www.ti.com 31-Oct-2025 (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TLV3011-Q1, TLV3011B-Q1, TLV3012-Q1, TLV3012B-Q1 :

• Catalog : TLV3011 , TLV3011B , TLV3012 , TLV3012B
• Enhanced Product : TLV3011-EP , TLV3012-EP NOTE: Qualified Version Definitions:
• Catalog - TI's standard catalog product
• Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 15-Jul-2026 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 15-Jul-2026 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV3011AQDBVRQ1 SOT-23 DBV 6 3000 210.0 185.0 35.0 TLV3011AQDCKRQ1 SC70 DCK 6 3000 180.0 180.0 18.0 TLV3011BQDBVRQ1 SOT-23 DBV 6 3000 210.0 185.0 35.0 TLV3011BQDCKRQ1 SC70 DCK 6 3000 180.0 180.0 18.0 TLV3012AQDBVRQ1 SOT-23 DBV 6 3000 210.0 185.0 35.0 TLV3012AQDCKRQ1 SC70 DCK 6 3000 200.0 183.0 25.0 TLV3012AQDCKRQ1 SC70 DCK 6 3000 180.0 180.0 18.0 TLV3012BQDBVRQ1 SOT-23 DBV 6 3000 210.0 185.0 35.0 TLV3012BQDCKRQ1 SC70 DCK 6 3000 180.0 180.0 18.0 Pack Materials-Page 2

www.ti.com PACKAGE OUTLINE C 0.22

0.08 TYP

0.15 2.4 1.8 4X 0.65 1.1 0.8 0.1

0.0 TYP

6X 0.30 0.15 NOTE 5 0.46

0.26 TYP

0 TYP

1.3 4X 0 -12 4X 4 -15 A 2.15 1.85 B1.4 1.1 SOT - 1.1 max heightDCK0006A SMALL OUTLINE TRANSISTOR 4214835/D 11/2024 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.15 per side. 4. Falls within JEDEC MO-203 variation AB. INDEX AREA PIN 1 NOTE 5

0.1 C A B

0.1 C SCALE 5.600

www.ti.com EXAMPLE BOARD LAYOUT

0.07 MAX

0.07 MIN

6X (0.9) 6X (0.4) (2.2) 4X (0.65) (R0.05) TYP 4214835/D 11/2024 SOT - 1.1 max heightDCK0006A SMALL OUTLINE TRANSISTOR NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:18X PKG 3 4 SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL METALSOLDER MASK OPENING NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DETAILS EXPOSED METAL

www.ti.com EXAMPLE STENCIL DESIGN (2.2) 4X(0.65) 6X (0.9) 6X (0.4) (R0.05) TYP SOT - 1.1 max heightDCK0006A SMALL OUTLINE TRANSISTOR 4214835/D 11/2024 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 THICK STENCIL SCALE:18X SYMM PKG 3 4

www.ti.com PACKAGE OUTLINE C 0.22 0.25 3.0 2.6 2X 0.95 1.45 0.90 0.15

0.00 TYP

6X 0.50 0.25 0.6

0.3 TYP

1.9 4X 0 -15 4X 4 -15 A 3.05 2.75 B1.75 1.45 (1.1) SOT-23 - 1.45 mm max heightDBV0006A SMALL OUTLINE TRANSISTOR 4214840/G 08/2024 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.25 per side. 4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation. 5. Refernce JEDEC MO-178.

0.2 C A B

0.1 C SCALE 4.000

www.ti.com EXAMPLE BOARD LAYOUT 6X (1.1) 6X (0.6) (2.6) 2X (0.95) (R0.05) TYP 4214840/G 08/2024 SOT-23 - 1.45 mm max heightDBV0006A SMALL OUTLINE TRANSISTOR NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X PKG 3 4 SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL METALSOLDER MASK OPENING NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DETAILS EXPOSED METAL

www.ti.com EXAMPLE STENCIL DESIGN (2.6) 2X(0.95) 6X (1.1) 6X (0.6) (R0.05) TYP SOT-23 - 1.45 mm max heightDBV0006A SMALL OUTLINE TRANSISTOR 4214840/G 08/2024 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X SYMM PKG 3 4

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