TLV2217-33KVURG3.A

TLV2217 TI | Alldatasheet

Document overview

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Technical content

VO = 3.3 V 22 µF 3.8 V 0.1 µF TLV2217-33 INPUT OUTPUT GND Copyright © 2016, Texas Instruments Incorporated Product Folder Sample & Buy T echnical Documents Tools & Software Support & Community An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TLV2217 SLVS067M –MARCH 1992–REVISED NOVEMBER 2016 TLV2217Low-DropoutFixed-VoltageRegulators

1 Features

1• Fixed 1.8-V, 2.5-V, and 3.3-V Outputs

• ±1% Maximum Output Voltage Tolerance at TJ = 25°C
• 500-mV Maximum Dropout Voltage at 500 mA (3.3-V Option)
• ±2% Output Voltage Variation Across Load and Temperature
• Internal Overcurrent Limiting
• Internal Thermal-Overload Protection
• Internal Overvoltage Protection

2 Applications

• Electronic Points of Sale
• Medical, Health, and Fitness Applications
• Printers
• Appliances and White Goods
• TV Set-Top Boxes

3 Description

The TLV2217 family of low-dropout regulators offers a variety of fixed-voltage options that offer a maximum continuous input voltage of 16 V, making them more versatile than CMOS regulators. Utilizing a PNP pass element, these regulators are capable of sourcing 500 mA of current, with a specified maximum dropout of 500 mV (3.3-V and 2.5-V options), making these regulators ideal for low- voltage applications. Additionally, the TLV2217 regulators offer very tight output accuracy of ±2% across operating load and temperature ranges. Other convenient features the regulators provide are internal overcurrent limiting, thermal-overload protection, and overvoltage protection. The TLV2217 family of regulators is available in fixed voltages of 1.8 V, 2.5 V, and 3.3 V. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) TLV2217-xxPW TSSOP (20) 6.50 mm × 4.40 mm TLV2217-xxKVU TO-252 (2) 6.04 mm × 6.15 mm TLV2217-xxKCS TO-220 (3) 10.16 mm × 9.15 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Typical Application

SLVS067M –MARCH 1992–REVISED NOVEMBER 2016 www.ti.com Product Folder Links: TLV2217 Submit Documentation Feedback Copyright © 1992–2016, Texas Instruments Incorporated Table of Contents

11.1 Receiving Notification of Documentation Updates 11

12 Mechanical, Packaging, and Orderable

4 Revision History

Changes from Revision L (April 2005) to Revision M Page

• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
• Changed Junction-to-ambient thermal resistance, RθJA, values in Thermal Information table From: 83°C/W To:
• Changed Junction-to-case (top) thermal resistance, RθJC(top), values in Thermal Information table From: 32°C/W To:
• Changed Junction-to-case (bottom) thermal resistance, RθJC(bot), values in Thermal Information table From: 1.4°C/W

www.ti.com SLVS067M –MARCH 1992–REVISED NOVEMBER 2016 Product Folder Links: TLV2217 Submit Documentation FeedbackCopyright © 1992–2016, Texas Instruments Incorporated

5 Pin Configuration and Functions

INPUT 6 1 1 I Voltage input OUTPUT 15 3 3 O Voltage output GND 5, 16 2 2 — Ground HEAT SINK 1, 2, 3, 4, 7, 8, 9, 10, 11, 12, 13, 14 17, 18, 19, 20 — — — Connection for improved thermal dissipation. These terminals have an internal resistive connection to ground and must be grounded or electrically isolated.

SLVS067M –MARCH 1992–REVISED NOVEMBER 2016 www.ti.com Product Folder Links: TLV2217 Submit Documentation Feedback Copyright © 1992–2016, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT Continuous input voltage, VI 16 V Operating virtual junction temperature, TJ 150 °C Storage temperature, Tstg –65 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) 2000 V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) 1000 (1) Minimum VI is equal to 3.0 V or VO(max) + 0.5 V, whichever is greater.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VI Input voltage 3(1) 12 V IO Output current 0 500 mA TJ Operating virtual junction temperature 0 125 °C (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. (2) Maximum power dissipation is a function of TJ(max), RθJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) − TA) / RθJA. Operating at the absolute maximum TJ of 150°C can affect reliability.

6.4 Thermal Information

THERMAL METRIC(1)(2) TLV2217 UNITPW (TSSOP) KVU (TO-252) KCS (TO-220)

20 PINS 3 PINS 3 PINS

RθJA Junction-to-ambient thermal resistance 81.6 31 22.5 °C/W RθJC(top) Junction-to-case (top) thermal resistance 22.1 37.5 34.6 °C/W RθJB Junction-to-board thermal resistance 32 11.3 8.8 °C/W ψJT Junction-to-top characterization parameter 0.9 1.9 3 °C/W ψJB Junction-to-board characterization parameter 31.5 11.2 7.8 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance — 0.6 0.8 °C/W

www.ti.com SLVS067M –MARCH 1992–REVISED NOVEMBER 2016 Product Folder Links: TLV2217 Submit Documentation FeedbackCopyright © 1992–2016, Texas Instruments Incorporated (1) Pulse-testing techniques are used to maintain the virtual junction temperature as close to the ambient temperature as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 22-µF tantalum capacitor, with equivalent series resistance of 1.5 Ω, on the output.

6.5 Electrical Characteristics: TLV2217-33

VI = 4.5 V, IO = 500 mA, TJ = 25°C, and over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS(1) MIN TYP MAX UNIT Output voltage IO = 20 mA to 500 mA, VI = 3.8 V to 5.5 V TJ = 25°C 3.267 3.3 3.333 V TJ = 0°C to 125°C 3.234 3.336 Input voltage regulation VI = 3.8 V to 5.5 V 5 15 mV Ripple rejection f = 120 Hz, Vripple = 1 VPP VI = 4.5 V –62 dB Output voltage regulation IO = 20 mA to 500 mA 5 30 mV Output noise voltage f = 10 Hz to 100 kHz 500 µV Dropout voltage IO = 250 mA 400 mV IO = 500 mA 500 Bias current IO = 0 mA 2 5 mA IO = 500 mA 19 49 (1) Pulse-testing techniques are used to maintain the virtual junction temperature as close to the ambient temperature as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 22-µF tantalum capacitor, with equivalent series resistance of 1.5 Ω, on the output.

6.6 Electrical Characteristics: TLV2217-25

VI = 3.3 V, IO = 500 mA, TJ = 25°C, over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS(1) MIN TYP MAX UNIT Output voltage IO = 20 mA to 500 mA, VI = 3.8 V to 5.5 V TJ = 25°C 2.475 2.4 2.525 V TJ = 0°C to 125°C 2.45 2.55 Input voltage regulation VI = 3.8 V to 5.5 V 4 12 mV Ripple rejection f = 120 Hz, Vripple = 1 VPP VI = 4.5 V –62 dB Output voltage regulation IO = 20 mA to 500 mA 4 23 mV Output noise voltage f = 10 Hz to 100 kHz 500 µV Dropout voltage IO = 250 mA 400 mV IO = 500 mA 500 Bias current IO = 0 mA 2 5 mA IO = 500 mA 19 49 (1) Pulse-testing techniques are used to maintain the virtual junction temperature as close to the ambient temperature as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 22-µF tantalum capacitor, with equivalent series resistance of 1.5 Ω, on the output. (2) Dropout voltage is limited by the input voltage range, with minimum VI = 3 V.

6.7 Electrical Characteristics: TLV2217-18

VI = 3.3 V, IO = 500 mA, TJ = 25°C, and over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS(1) MIN TYP MAX UNIT Output voltage IO = 20 mA to 500 mA, VI = 3.8 V to 5.5 V TJ = 25°C 1.782 1.8 1.818 V TJ = 0°C to 125°C 1.764 1.836 Input voltage regulation VI = 3.8 V to 5.5 V 3 9 mV Ripple rejection f = 120 Hz, Vripple = 1 VPP VI = 4.5 V –62 dB Output voltage regulation IO = 20 mA to 500 mA 3 17 mV Output noise voltage f = 10 Hz to 100 kHz 500 µV Dropout voltage IO = 250 mA See(2) mV IO = 500 mA See(2) Bias current IO = 0 mA 2 5 mA IO = 500 mA 19 49

6.8 Typical Characteristics

Figure 1. TLV2217-33 Output Voltage vs Input Voltage

+Over Temp & Over Current Protection 1.25 V GND OUTPUTINPUT Copyright © 2016, Texas Instruments Incorporated TLV2217 www.ti.com SLVS067M –MARCH 1992–REVISED NOVEMBER 2016 Product Folder Links: TLV2217 Submit Documentation FeedbackCopyright © 1992–2016, Texas Instruments Incorporated

7 Detailed Description

7.1 Overview

The TLV2217 device is a positive low-dropout voltage regulator designed to provide up to 500 mA of output down to 0.5-V input-to-output differential, with the minimum input voltage of 3 V for all voltage options. The TLV2217 device is designed to be stable with tantalum and aluminum electrolytic output capacitors having an ESR between 0.4 Ω and 2 Ω. The TLV2217 device is characterized for operation over the virtual junction temperature range of 0°C to 125°C.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Overload Block

Current limiting and overtemperature shutdown protects against overload by turning off the PNP pass element.

7.4 Device Functional Modes

7.4.1 Operation With Low Input Voltage

The TLV2217 device requires 0.5-V headroom (VI – VO) to operate in regulation. With less headroom, the device may drop out and OUTPUT voltage is INPUT voltage minus dropout voltage.

7.4.2 Operation at Light Loads

The load or feedback must consume the minimum bias current defined in Electrical Characteristics: TLV2217-33 for regulation, or the output may be too high.

7.4.3 Operation in Self Protection

When an overload occurs, the device shuts down the output stage or reduce the output current to prevent device damage. The device automatically resets from the overload. The output may be reduced or alternate between on and off until the overload is removed.

8 Application and Implementation

validate and test their design implementation to confirm system functionality.

8.1 Application Information

characterized for operation over the virtual junction temperature range of 0°C to 125°C.

8.2 Typical Application

Figure 2. Typical Application Schematic

8.2.1 Design Requirements

specification is defined as the dropout voltage in the Electrical Characteristics: TLV2217-33. placed near the source of supply. Information for additional details regarding capacitor selection.

8.2.2 Detailed Design Procedure

8.2.2.1 Compensation-Capacitor Selection Information

Figure 3. TLV2217 ESR of Output Capacitor Figure 4. TLV2217 Stability vs ESR

8.2.2.2 High Start-up Current

the input voltage to drop below the required headroom for the device.

8.2.3 Application Curves

Figure 5. Input Current vs Input Voltage

9 Power Supply Recommendations

See Recommended Operating Conditions for the recommended supply voltage range.

10 Layout

10.1 Layout Guidelines

ground plane to aid in thermal dissipation.

10.2 Layout Example

Figure 6. TO-220 Package Example Layout

www.ti.com SLVS067M –MARCH 1992–REVISED NOVEMBER 2016 Product Folder Links: TLV2217 Submit Documentation FeedbackCopyright © 1992–2016, Texas Instruments Incorporated

11 Device and Documentation Support

11.1 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document.

11.2 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.

11.3 Trademarks

E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.

11.4 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

11.5 Glossary

SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TLV2217-18KCS Active Production TO-220 (KCS) | 3 50 | TUBE Yes SN N/A for Pkg Type 0 to 125 TLV2217-18 TLV2217-18KCS.A Active Production TO-220 (KCS) | 3 50 | TUBE Yes SN N/A for Pkg Type 0 to 125 TLV2217-18 TLV2217-18KVURG3 Active Production TO-252 (KVU) | 3 2500 | LARGE T&R Yes SN Level-3-260C-168 HR 0 to 125 2217-18 TLV2217-18KVURG3.A Active Production TO-252 (KVU) | 3 2500 | LARGE T&R Yes SN Level-3-260C-168 HR 0 to 125 2217-18 TLV2217-25KCSE3 Active Production TO-220 (KCS) | 3 50 | TUBE Yes SN N/A for Pkg Type 0 to 125 TLV2217-25 TLV2217-25KCSE3.A Active Production TO-220 (KCS) | 3 50 | TUBE Yes SN N/A for Pkg Type 0 to 125 TLV2217-25 TLV2217-25KVURG3 Active Production TO-252 (KVU) | 3 2500 | LARGE T&R Yes SN Level-3-260C-168 HR 0 to 125 2217-25 TLV2217-25KVURG3.A Active Production TO-252 (KVU) | 3 2500 | LARGE T&R Yes SN Level-3-260C-168 HR 0 to 125 2217-25 TLV2217-25PWR Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 125 2217-25 TLV2217-25PWR.A Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 125 2217-25 TLV2217-33KCSE3 Active Production TO-220 (KCS) | 3 50 | TUBE Yes SN N/A for Pkg Type 0 to 125 TLV2217-33 TLV2217-33KCSE3.A Active Production TO-220 (KCS) | 3 50 | TUBE Yes SN N/A for Pkg Type 0 to 125 TLV2217-33 TLV2217-33KVURG3 Active Production TO-252 (KVU) | 3 2500 | LARGE T&R Yes SN Level-3-260C-168 HR 0 to 125 2217-33 TLV2217-33KVURG3.A Active Production TO-252 (KVU) | 3 2500 | LARGE T&R Yes SN Level-3-260C-168 HR 0 to 125 2217-33 TLV2217-33PWR Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 125 2217-33 TLV2217-33PWR.A Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 125 2217-33 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. Addendum-Page 1

www.ti.com 23-May-2025 (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLV2217-18KVURG3 TO-252 KVU 3 2500 340.0 340.0 38.0 TLV2217-25KVURG3 TO-252 KVU 3 2500 340.0 340.0 38.0 TLV2217-25PWR TSSOP PW 20 2000 356.0 356.0 35.0 TLV2217-33KVURG3 TO-252 KVU 3 2500 340.0 340.0 38.0 TLV2217-33PWR TSSOP PW 20 2000 356.0 356.0 35.0 Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) TLV2217-18KCS KCS TO-220 3 50 532 34.1 700 9.6 TLV2217-18KCS.A KCS TO-220 3 50 532 34.1 700 9.6 TLV2217-25KCSE3 KCS TO-220 3 50 532 34.1 700 9.6 TLV2217-25KCSE3.A KCS TO-220 3 50 532 34.1 700 9.6 TLV2217-33KCSE3 KCS TO-220 3 50 532 34.1 700 9.6 TLV2217-33KCSE3.A KCS TO-220 3 50 532 34.1 700 9.6 Pack Materials-Page 3

www.ti.com PACKAGE OUTLINE 9.25 9.05 6.5 6.1 2.9 2.6 10.36 9.96 13.12 12.70

3.9 MAX

3X 1.36 1.23 3X 0.90 0.77 ( 3.84) 5.08 2X 2.54 8.55 8.15 12.5 12.1 (6.3)

19.65 MAX

4.7 4.4 1.32 1.22 2.79 2.59 0.47 0.34 4222214/B 08/2018 TO-220 - 19.65 mm max heightKCS0003B TO-220 NOTES: 1. Dimensions are in millimeters. Any dimension in brackets or parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Reference JEDEC registration TO-220. 1 3 SCALE 0.850

www.ti.com EXAMPLE BOARD LAYOUT

0.07 MAX

(1.7) 3X (1.2) (2.54) (5.08) R (0.05) 2X (1.7) METAL 2X SOLDER MASK OPENING 4222214/B 08/2018 TO-220 - 19.65 mm max heightKCS0003B TO-220 LAND PATTERN EXAMPLE NON-SOLDER MASK DEFINED SCALE:15X 1 2 3 OPENING SOLDER MASK

www.ti.com PACKAGE OUTLINE C 18X 0.65 5.85 20X 0.30 0.19 TYP6.6 6.2

1.2 MAX

0.15 0.05 0.25 GAGE PLANE -80 B NOTE 4 4.5 4.3 A NOTE 3 6.6 6.4 0.75 0.50 (0.15) TYP TSSOP - 1.2 mm max heightPW0020A SMALL OUTLINE PACKAGE 4220206/A 02/2017

0.1 C A B

0.1 C NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153. SEATING PLANE A 20 DETAIL A TYPICAL SCALE 2.500

www.ti.com EXAMPLE BOARD LAYOUT

0.05 MAX

0.05 MIN

20X (1.5) 20X (0.45) 18X (0.65) (5.8) (R0.05) TYP TSSOP - 1.2 mm max heightPW0020A SMALL OUTLINE PACKAGE 4220206/A 02/2017 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 10X SYMM SYMM 10 11 15.000 METALSOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METALEXPOSED METAL SOLDER MASK DETAILS NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN 20X (1.5) 20X (0.45) 18X (0.65) (5.8) (R0.05) TYP TSSOP - 1.2 mm max heightPW0020A SMALL OUTLINE PACKAGE 4220206/A 02/2017 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 10X SYMM SYMM 10 11

www.ti.com PACKAGE OUTLINE C 5.460 4.953 10.41 9.40 2.29 4.58 3X 0.890 0.635 1.02 0.61 1.27 0.89

2.52 MAX

0.61 0.46 4.32 MIN

5.21 MIN

-80 0.13 0.00 1.78 1.40 0.61 0.46 A 6.70 6.35 B 6.22 5.97 0.51 GAGE PLANE TO-252 - 2.52 mm max heightKVU0003A TO-252 4218915/A 02/2017 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Shape may vary per different assembly sites. 4. Reference JEDEC registration TO-252.

0.25 C A B

SCALE 1.500 SEE DETAIL A EXPOSED THERMAL PAD NOTE 3 A 7.000 DETAIL A TYPICAL

www.ti.com EXAMPLE BOARD LAYOUT ALL AROUND 0.07 MIN ALL AROUND (6.15) (5.55)(4.58) 2X (1) 2X (2.75) TO-252 - 2.52 mm max heightKVU0003A TO-252 4218915/A 02/2017 LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:6X PKG SYMM NOTES: (continued) 5. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature numbers 6. Vias are optional depending on application, refer to device data sheet. It is recommended that vias under paste be filled, plugged or tented. SOLDER MASK OPENING METAL EXPOSED METAL SOLDER MASK DETAILS NOT TO SCALE NON SOLDER MASK DEFINED METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METAL SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN (R0.05) 2X (2.75) 2X (1) (4.58) (1.33) TYP (1.18) TYP (0.14) (4.2) TO-252 - 2.52 mm max heightKVU0003A TO-252 4218915/A 02/2017 PKG NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 65% PRINTED SOLDER COVERAGE BY AREA SCALE:8X SYMM

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