TLP270G

TLPXXM STMICROELECTRONICS | Alldatasheet

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TLPxxM/G/G-1 PowerSO-10 TM TLPxxM TRIPOLAR OVERVOLTAGE PROTECTION for TELECOM LINE Application Specific Discretes A.S.D. September 1998 - Ed : 3C D 2PAK TLPxxG I2PAK TLPxxG-1 MAIN APPLICATIONS Any sensitive telecom equipment requiring protec- tion against lightning : Analog and ISDN line cards Main Distribution Frames Terminal and transmission equipment Gas-tube replacement

DESCRIPTION

The TLPxxM/G/G-1 series are tripolar transient surge arrestors used for primary and secondary protectionin sensitive telecom equipment.

FEATURES

TRIPOLAR CROWBAR PROTECTION VOLTAGE RANGE SELECTED FOR TELECOMAPPLICATIONS REPETITIVE PEAK PULSE CURRENT : I PP = 100 A (10 / 1000µs) HOLDING CURRENT : IH = 150 mA LOW CAPACITANCE : C = 110 pF typ. LOW LEAKAGE CURRENT : I R =5 µA max BENEFITS No ageing and no noise. If destroyed, the TLPxxM/G/G-1 falls into short circuit, still ensuringprotection. Access to Surface Mount applications thanks to the PowerSO-10TM and D2PAK package. TM: ASD and PowerSO-10 are trademarks of ST Microelectronics. RINGTIP GND RINGTIP RINGTIP RINGTIP RINGTIP TAB GND GND RINGTIP TA B GND GND RINGTIP

FOLLOWING STANDARDS: Peak Surge Voltage (V) Voltage Waveform (µs) Current Waveform (µs) Admissible Ipp (A) Necessary Resistor (Ω ) CCITT K20 4000 10/700 5/310 100 - VDE0433 4000 10/700 5/310 100 - VDE0878 4000 1.2/50 1/20 100 - IEC-1000-4-5 level 4 level 4 1.2/50 100 100 FCC Part 68, lightning surge type A 1500 800 200 100 FCC Part 68, lightning surge type B 1000 5/320 5/320 25 - BELLCORETR-NWT-001089 FIRST LEVEL 2500 1000 500 100 BELLCORETR-NWT-001089 SECOND LEVEL 5000 2/10 2/10 500 - CNET I31-24 4000 0.5/700 0.8/310 100 - Analog Main Distribution Frame Line Card TLPxxM/G/G-1 TYPICAL APPLICATION Primaryprotection module TLPxxM/G/G-1 RING RELAY LINE A LINE B LCP1511D -Vbat SLIC 220nF PTC PTC Analog line card protection TLPxxM/G/G-1

Symbol Parameter Value Unit IPP Peak pulse current(longitudinal & transversal mode) : 10/1000µs (open circuit voltage waveform 1 kV 10/1000µs) 8/20µs (open circuit voltage waveform 4 kV 1.2/50µs) 2/10µs (opencircuit voltage waveform 2.5kV 2/10µs) 100 250 500 A A A ITSM Mains power induction VRMS = 300V, R = 600Ω t = 200ms 0.7 A Mains power contact VRMS = 220V,R = 10Ω (Fail-Safe threshold) t = 200 ms 31 A VRMS = 220V, R = 600Ω t = 15 mn 0.42 A Tstg Storagetemperature range - 55 to + 150 °C Tj Maximum operating junction temperature 150 °C TL Maximum lead temperature for soldering during 10 s 260 °C TOP Operating temperaturerange - 40 to + 85 °C ABSOLUTE MAXIMUM RATINGS (Tamb =2 5°C) Symbol Description IPP Peak pulse current ITSM Maximum peak on-state current IR Leakage current IRM Leakage current IH Holding current VBR Breakdown voltage VR Continuous reverse voltage VRM Maximum stand-off voltage VBO Breakover voltage C Capacitance PARAMETER MEASUREMENT INFORMATION VRM VR VBO IH IR IRM IPP TLPxxM/G/G-1 Feeder +5V 1/2 DA108S1 Internal circuitry Power TYPICAL APPLICATION ISDN: U interface protection TLPxxM/G/G-1

IRM @V RM IR @V R C max. max. typ. note µAV µAV p F TLP140M/G/G-1 5 120 50 140 35 TLP200M/G/G-1 5 180 50 200 35 TLP270M/G/G-1 5 230 50 270 35 Note :VR = 50 V bias, VRMS = 1V, F = 1 MHz. ELECTRICAL CHARACTERISTICS BETWEEN TIP AND RING (Tamb =2 5°C) Type IRM @V RM IR @V R VBO @ IBO IH C @ V R note 1 note 2 note 3 note 4 note 5 µAV µAV V m A m A p F p F TLP140M/G/G-1 5 120 50 140 200 500 150 110 40 TLP200M/G/G-1 5 180 50 200 290 500 150 110 40 TLP270M/G/G-1 5 230 50 270 400 500 150 110 40 Note 1:IR measured at VR guarantees VBR min >V R . Note 2:Measured at 50 Hz. Note 3:See functional holding current test circuit. Note 4:VR = 0V bias, VRMS = 1V, F = 1 MHz. Note 5:VR = 50V bias, VRMS = 1V, F = 1 MHz (TIP or RING (-) / GND (+)). ELECTRICAL CHARACTERISTICS BETWEEN TIP AND GND, RING AND GND(T amb =2 5°C) Symbol Parameter Value Unit Rth (j-c) Junction to case TLPxxM TLPxxG TLPxxG-1 1.0 1.0 1.0 °C/W Rth (j-a) Junction to ambient TLPxxM TLPxxG TLPxxG-1 see table page 14 see table page 14 see table page 14 °C/W THERMAL RESISTANCE TLPxxM/G/G-1

FUNCTIONAL HOLDING CURRENT (I H ) TEST CIRCUIT: GO-NO GO TEST R -VP VBAT -4 8V= Surge generator D.U.T. This is a GO-NO GO test which allows to confirm the holding current (IH ) level in a functionaltest circuit. TEST PROCEDURE : - Adjust the current level at the IH value by short circuiting the D.U.T. - Firethe D.U.T. with a surge current : IPP = 10A, 10/1000µs. - The D.U.T. will come back to the off-state within a duration of 50ms max. ORDER CODE Package Types Marking PowerSO-10 TLP140M TLP200M TLP270M TLP140M TLP200M TLP270M D2PAK TLP140G TLP200G TLP270G TLP140G TLP200G TLP270G I2PAK TLP140G-1 TLP200G-1 TLP270G-1 TLP140G TLP200G TLP270G MARKING TPL 270 M -TR Breakdown Voltage Packaging: -TR= tapeandreelonlyfor”M”version(600pcs) = tube (50 pcs)Tripolar Line Protection Package: M : Power SO10 G:D 2PAK G-1 : I2PAK TLPxxM/G/G-1

0.01 0.1 1 10 100 1000 100 t(s) ITSM(A) F=50Hz Tj initial=25°C TIP or RING vs GND Fig. 1:Maximum peak on-state current versus pulse duration. - 4 0 - 2 00 2 04 06 08 0 0.4 0.6 0.8 1.2 1.4 1.6 1.8 Tamb (°C) IH (Tamb) / IH (25°C) Fig. 2:Relative variation of IH versus Tamb . TIP GND RING 10 / 1000µs 100 A surge generator VBO TIP RING VBO TIP - GND Fig. 4:Test diagram for breakover voltage measurement. 1 10 100 20010 100 200 C(pF) F=1MHz Vosc=1VRMS Tj=25°C LINE- / GND+ LINE / LINE LINE+ / GND- VR(V) Fig. 3-1 :junction capacitance versus applied re- verse voltage (typical values) (TLP140M/G/G-1). 1 10 100 20010 100 200 C(pF) F=1MHz Vosc=1VRMS Tj=25°C LINE- / GND+ LINE / LINE LINE+ / GND- VR(V) Fig. 3-2 :junction capacitanceversus appliedre- verse voltage (typical values) (TLP200M/G/G-1). 1 10 100 30010 100 200 C(pF) F=1MHz Vosc=1VRMS Tj=25°C LINE- / GND+ LINE / LINE LINE+ / GND- VR(V) Fig. 3-3 :junction capacitance versus applied re- verse voltage (typical values) (TLP270M/G/G-1). TLPxxM/G/G-1

0.01 0.1 1 10 100 1,000 10,000 100,0001 1.2 1.4 1.6 1.8 2.2 2.4 2.6 dV/dt Vbr/Vbr TIP RING TIP+ GND - TIP- GND + Fig. 5-1 :Breakovervoltage measurement (TLP140M/G/G-1). 0.01 0.1 1 10 100 1,000 10,000 100,0001 1.2 1.4 1.6 1.8 2.2 2.4 2.6 dV/dt Vbo/Vbr TIP RING TIP+ GND - TIP- GND + Fig. 5-2 :Breakovervoltage measurement (TLP200M/G/G-1). 0.01 0.1 1 10 100 1,000 10,000 100,0001 1.2 1.4 1.6 1.8 2.2 2.4 2.6 dV/dt Vbo/Vbr TIP+ GND - TIP RING TIP- GND + Fig. 5-3 :Breakover voltage measurement (TLP270M/G/G-1). TLPxxM/G/G-1

A D R 2.0 MIN. FLA T ZONE C G L B E REF. DIMENSIONS Millimeters Inches A 4.30 4.60 0.169 0.181 A1 2.49 2.69 0.098 0.106 A2 0.03 0.23 0.001 0.009 B 0.70 0.93 0.027 0.037 B2 1.40 0.055 C 0.45 0.60 0.017 0.024 C2 1.21 1.36 0.047 0.054 D 8.95 9.35 0.352 0.368 E 10.00 10.28 0.393 0.405 G 4.88 5.28 0.192 0.208 L 15.00 15.85 0.590 0.624 L2 1.27 1.40 0.050 0.055 L3 1.40 1.75 0.055 0.069 R 0.40 0.016 V2 0 ° 8° 0° 8° FOOT-PRINT D 2PAK 8.90 3.70 1.30 5.08 16.90 10.30 TLPxxM/G/G-1

REF. DIMENSIONS Millimeters Inches A 4.30 4.60 0.169 0.181 A1 2.49 2.69 0.098 0.106 B 0.70 0.93 0.028 0.037 B1 1.20 1.38 0.047 0.054 B2 1.25 1.40 0.049 0.055 C 0.45 0.60 0.018 0.024 C2 1.21 1.36 0.048 0.054 D 8.95 9.35 0.352 0.368 e 2.44 2.64 0.096 0.104 E 10.00 10.28 0.394 0.405 L 13.10 13.60 0.516 0.535 L1 3.48 3.78 0.137 0.149 L2 1.27 1.40 0.050 0.055 V5 ° 5° V4 45 ° 45° TLPxxM/G/G-1

H eB 0.25 M D h A F E3 E1 SEATING PLANE SEATING PLANE A B C Q DETAIL ”A”

0.10 A B

L a DETAIL ”A” REF. DIMENSIONS Millimeters Inches A 3.35 3.65 0.131 0.143 A1 0.00 0.10 0.00 0.0039 B 0.40 0.60 0.0157 0.0236 C 0.35 0.55 0.0137 0.0217 D 9.40 9.60 0.370 0.378 D1 7.40 7.60 0.291 0.299 E 9.30 9.50 0.366 0.374 E1 7.20 7.40 0.283 0.291 E2 7.20 7.60 0.283 0.299 REF. DIMENSIONS Millimeters Inches E3 6.10 6.35 0.240 0.250 E4 5.90 6.10 0.232 0.240 e 1.27 0.05 F 1.25 1.35 0. 0492 0.0531 H 13.80 14.40 0.543 0.567 h 0.50 0.019 L 1.20 1.80 0. 0472 0.0708 Q 1.70 0.067 a0 ° 8° 0° 8° TLPxxM/G/G-1

DIMENSIONS (mm) TYP A B C Length tube 0,8 532 Quantity per tube 50 Dimensions in millimeters Dimensions in millimeters Surface mount film taping : contact sales office B C A TLPxxM/G/G-1

The soldering process causes considerable ther- mal stress to a semiconductor component. This has to be minimized to assure a reliable and ex- tended lifetime of the device. The PowerSO-10 package can be exposed to a maximum tempera- ture of 260°C for 10 seconds. However a proper soldering of the package could be done at 215°C for 3 seconds. Any solder temperature profile should be within these limits. As reflow techniques are most common in surface mounting, typical heating profiles are given in Figure 1,either for mounting on FR4 or on metal-backed boards. For each particular board, the appropriate heat profile has to be adjusted experimentally. The present proposal is just a startingpoint. In any case, the fol- lowing precautions have to be considered : - always preheat the device - peak temperatureshould be at least 30°C higher than the melting point of the solder alloy chosen - thermal capacityof the base substrate Voids pose a difficult reliability problem for large surface mount devices. Such voids under the package result in poor thermal contact and the high thermal resistance leads to component fail- ures. The PowerSO-10 is designedfromscratch to be solelya surfacemount package, hence symme- try in the x- and y-axis gives the package excellent weight balance.Moreover, the PowerSO-10 offers the unique possibility to control easily the flatness and quality of the soldering process. Both the top and the bottom soldered edges of the package are accessible for visual inspection (soldering menis- cus). Coplanarity between the substrate and the pack- age can be easily verified. The quality of the solder joints is very important for two reasons : (I) poor quality solder joints result directly in poor reliability and (II) solder thickness affects the thermal resis- tance significantly. Thus a tight control of this pa- rameter results in thermally efficient and reliable solder joints. Fig. 1 :Typical reflow soldering heat profile Time (s) Temperature ( C) 0 40 80 120 160 200 240 280 320 360 100 150 200 250 o 215 Co Soldering Preheating Cooling 245 Co Epoxy FR4 board Metal-backed board TLPxxM/G/G-1

SUBSTRATES AND MOUNTINGINFORMATION The use of epoxy FR4 boards is quite common for surface mounting techniques, however, their poor thermal conduction compromises the otherwise outstanding thermal performanceof the PowerSO- 10. Some methods to overcome this limitation are discussed below. One possibility to improve the thermal conduction is the use of large heat spreader areas at the cop- per layer of the PC board.This leads to a reduction of thermal resistance to 35°C for 6 cm 2 of the board heatsink (see fig. 2). Use of copper-filledthrough holes on conventional FR4 techniques will increase the metallization and decrease thermal resistance accordingly. Using a configurationwith 16 holes under the spreaderof the package with a pitch of 1.8 mm and a diameter of 0.7 mm, the thermal resistance (junction - heatsink) can be reduced to 12°C/W (see fig. 3). Beside the thermal advantage, this solution allows multi-layer boards to be used. However, a draw- back of this traditional material prevents its use in very high power, high currentcircuits. For instance, it is not advisable to surface mount devices with currents greater than 10 A on FR4 boards. A Power Mosfet or Schottkydiode in a surfacemount power package can handle up to around 50 A if better substratesare used. Fig. 2 :Mountingon epoxy FR4 head dissipation by extending the area of the copper layer Fig. 3 :Mounting on epoxy FR4 by using copper-filled through holes for heat transfer FR4 boardCopper foil FR4 boardCopper foil heat transferheatsink TLPxxM/G/G-1

Printed circuit board material R th (j-a) P Diss 1.FR4 using the recommended pad-layout 50 °C/W 1.5 W 2.FR4 with heatsink on board (6cm2)3 5 °C/W 2.0 W 3.FR4 with copper-filled through holes and external heatsink applied12 °C/W 5.8 W 4. IMS floating in air (40 cm2)8 °C/W 8.8 W 5. IMS with external heatsink applied 3.5 °C/W 20 W TABLE 1 A new technologyavailable today is IMS - an Insu- lated Metallic Substrate. This offers greatly en- hanced thermal characteristics for surface mount components. IMS is a substrate consisting of three different layers, (I) the base material which is available as an aluminium or a copper plate, (II) a thermal conductive dielectrical layer and (III) a copper foil, which can be etched as a circuit layer. Using this material a thermal resistance of 8°C/W with 40 cm 2 of board floating in air is achievable (see fig. 4). If even higher power is to be dissipated an external heatsink could be applied which leads to an R th(j-a) of 3.5°C/W (see Fig. 5), assuming that Rth (heatsink-air) is equal to Rth (junction- heatsink). This is commonly applied in practice, leading to reasonable heatsink dimensions. Often power devices are defined by considering the maximum junction temperature of the device. In practice , however, this is far from being exploited. A summary of various power management capa- bilities is made in table 1 based on a reasonable delta T of 70°C junction to air. The PowerSO-10 concept also represents an attractive alternative to C.O.B. techniques. PowerSO-10 offers devices fully tested at low and high temperature. Mounting is simple - only conventional SMT is required - enabling the users to getrid ofbond wire problems and the problem to control the high temperature soft soldering as well. An optimized thermal management is guaranteed through PowerSO-10 as the power chips must in any case be mounted on heat spreaders before being mounted onto the substrate. Fig. 4 :Mounting on metal backed board Fig. 5 :Mounting on metal backed board with an external heatsink applied FR4boardCopperfoil Aluminium heatsink Copper foil Insulation Aluminium Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written ap- proval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics  1998 STMicroelectronics - Printed in Italy - All rights reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com TLPxxM/G/G-1