TLF35584_V01 INFINEON | Alldatasheet

Document overview

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Technical content

Features

  • High efficient power management integrated circuit (PMIC)
  • Serial step up and step down pre regulator for wide input voltage range from 3.0 to 40 V with full performance and low over all power loss
  • Low drop post regulator 5.0 V/200 mA for communication supply (QCO)
  • Low drop post regulator 5.0 V/600 mA (TLF35584QxVS1) or 3.3 V/600 mA (TLF35584QxVS2) for µC supply (QUC)
  • Voltage reference 5.0 V ±1% for ADC supply, 150 mA current capability (QVR)
  • Two trackers for sensor supply following voltage reference 150 mA current capability each (QT1 and QT2)
  • Standby regulator 5.0 V/10 mA (TLF35584QxVS1) or 3.3 V/10 mA (TLF35584QxVS2) (QST)
  • Provides enable, sync out signal and voltage monitoring for an optional external post regulator for core supply
  • Independent voltage monitoring block and error pin monitoring
  • Configurable window and functional watchdog
  • Safe State Control with two safe state signals with programmable delay
  • 16-bit SPI, interrupt and reset function
  • PRO-SIL ™ Features: - ISO 26262 compliant supporting up to ASIL-D - Safety Documentation (Safety Manual & Safety Analysis Summary Report)
  • Green Product (RoHS compliant) Potential applications
  • Electric Power Steering
  • Battery Management
  • Inverter
  • Transmission
  • Engine Management
  • Domain Control Product validation Qualified for Automotive Applications. Product validation according to AEC-Q100/101. Device Overview Please read the Important Notice and Warnings at the end of this document Rev 1.0 www.infineon.com/OPTIREG-PMIC 2019-03-25

Description

The OPTIREG™ PMIC TLF35584 is a high efficient Functional Safety PMIC (Power Management Integrated Circuit). Type Package TLF35584QVVS1 (5.0 V Variant) PG-VQFN-48 TLF35584QVVS2 (3.3 V Variant) PG-VQFN-48 TLF35584QKVS1 (5.0 V Variant) PG-LQFP-64 TLF35584QKVS2 (3.3 V Variant) PG-LQFP-64 Application Example V_PREREG V_LDO_µC For µC supply 3.3V/5.0V V_LDO_ComFor communication supply (CAN/FlexRay) 5.0V V_TR1For sensor supply 5.0V Reset Output CHIP SELECT CLOCK DATA_IN DATA_OUT WAKE/INH ENABLE (KL 15) V_Volt_Ref5.0V V_STBY3.3V/5.0V Safe State 1 µC SPI SMU /ErrorPin Reset Control (signal delayed)Safe State 2 INTERRUPT V_Bat (KL30) V_LDO_µC 3.3V (5V) V_Core e.g. 1.3V V_TR2For sensor supply 5.0VTrigger Sync_Out Set fSTEPDOWN high/low by FRE: open/GND Enable ext.Core sup Set STEPUP usage yes/no by STU: open/GND V_Core For µC core supply Feedback External switchmode post regulator (optional) Sync Enable V_LDO_µC Series Protection resistors Set ext SMPR yes/no by SEC: open/GND MPS Step down-Regulator Feedback LDO_µC3.3V (5.0V) LDO_Com5.0V Tracker 15.0V TLF35584 Bandgap 1 for Regulators SPI ENABLE Volt_Ref.5.0VSafe State Control Voltage Monitoring/Reset Function Tracker 25.0V WakeUp Timer LDO_Stby3.3V (5.0V)(as LDO_µC) Step Up-Regulator Comparator Logic INTERRUPT Generator Internal Supply and Clock Feedback Functional- Watchdog Window- Watchdog Bandgap 2for Voltage Mon. Driver Driver QUC QCO QT1 QT2 QVR FB1 PG2 VCI PG1 SYN SW1 EVC SEC FB2 FRE QST STU VST VS2 RSH WAK ENA ROT DRG RSL INT SCS SDISDO SCL WDI SS1 SS2 ERR BSG AG1 AG2 AG3 AGS2 GST AGS1 Error Monitoring SQUC (PG-LQFP-64 only) SQT1 (PG-LQFP-64 only) SQT2 (PG-LQFP-64 only) SW2 (PG-LQFP-64 only) FB3 (PG-LQFP-64 only) FB4 (PG-LQFP-64 only) VS1 (PG-LQFP-64 only) AG4(PG-LQFP-64 only) Note: The following information is given as an example for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device.

  • Please contact us for additional supportive documentation.
  • For further information you may contact http://www.infineon.com/OPTIREG-PMIC Note: This figure is a very simplyfied example on an application circuit. The function must be verified in the real application. OPTIREG™ PMIC TLF35584 Functional Safety PMIC

Device Overview 2 Rev 1.0 2019-03-25

1 Absolute maximum ratings

Table 1 Absolute maximum ratings 2) Tj = -40°C to 150°C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or condition Min. Typ. Max. Voltages Boost driver ground VBSG -0.3 – 0.3 V – Input standby LDO VVST -0.3 – 40 V 3)4) Input voltage pin 1 (pre regulator) VVS1 -0.3 – 40 V – Input voltage pin 2 (pre regulator) VVS2 -0.3 – 40 V PG-LQFP-64 only External step up power stage, gate VDRG -0.3 – 40 V – External power stage, sense resistor high VRSH -0.3 – 40 V – External power stage, sense resistor low VRSL -0.3 – 6.0 V – Enable input VENA -0.3 – 40 V – Enable input IENA -5 – – mA 5) Wake input VWAK -0.3 – 40 V – Wake input IWAK -5 – – mA – Reset output VROT -0.3 – 6.0 V – SPI chip select input VSCS -0.3 – 6.0 V – SPI clock input VSCL -0.3 – 6.0 V – SPI data in (MOSI) input VSDI -0.3 – 6.0 V – SPI data out (MISO output) VSDO -0.3 – 6.0 V – Interrupt output VINT -0.3 – 6.0 V – Window watchdog trigger input VWDI -0.3 – 6.0 V – Error pin input VERR -0.3 – 6.0 V – Safe state 1 output VSS1 -0.3 – 6.0 V – Safe state 2 output VSS2 -0.3 – 6.0 V – Output voltage reference LDO VQVR -0.3 – 6.0 V – Output tracker 2 VQT2 -1.0 – 40 V – 2 Not subject to production test, specified by design.

3 Maximum rating is 60 V, if rise time from 0 to 60 V is longer than 10 ms

4 Maximum rating is 49 V, for an overall time of 10 s (in the range of 40 V to 49 V) during the lifetime of the product independent from the rise time. 5 Consider external series resistor for negative voltages < -0.3 V to ensure maximum rating of current OPTIREG™ PMIC TLF35584 Functional Safety PMIC Device Overview 3 Rev 1.0 2019-03-25

Table 1 Absolute maximum ratings 2) (continued) Tj = -40°C to 150°C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or condition Min. Typ. Max. Sense Pin for tracker 2 VSQT2 -0.3 – 40 V PG-LQFP-64 only Output tracker 1 VQT1 -1.0 – 40 V – Sense Pin for tracker 1 VSQT1 -0.3 – 40 V PG-LQFP-64 only Output communication LDO VQCO -0.3 – 6.0 V – Output microcontroller LDO VQUC -0.3 – 6.0 V – Sense Pin for microcontroller LDO VSQUC -0.3 – 6.0 V PG-LQFP-64 only External core voltage monitor input VVCI -0.3 – 6.0 V – HW config: ext. core voltage monitor VSEC -0.3 – 6.0 V – Synchronization output VSYN -0.3 – 6.0 V – Enable output for ext. core supply VEVC -0.3 – 6.0 V – Step down feedback input 4 VFB4 -0.3 – 7.0 V PG-LQFP-64 only Step down feedback input 3 VFB3 -0.3 – 7.0 V PG-LQFP-64 only Step down feedback input 2 VFB2 -0.3 – 7.0 V – Step down feedback input 1 VFB1 -0.3 – 7.0 V – Step down power ground 2 VPG2 -0.3 – 0.3 V – Step down power ground 1 VPG1 -0.3 – 0.3 V – Step down switching node 2 VSW2 -0.3 – 40 V PG-LQFP-64 only Step down switching node 1 VSW1 -0.3 – 40 V – HW config: step up pre regulator VSTU -0.3 – 6.0 V – HW config: step down frequency VFRE -0.3 – 6.0 V – Output standby LDO VQST -0.3 – 6.0 V – Input MPS VMPS -0.3 – 6.0 V – Temperatures Junction temperature Tj -40 – 150 °C – Storage temperature Tstg -55 – 150 °C – ESD susceptibility ESD susceptibility to GND VESD -2 – 2 kV HBM6) 2 Not subject to production test, specified by design. 6 ESD susceptibility, HBM according to JEDEC HBM Human Body Model ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF) OPTIREG™ PMIC TLF35584 Functional Safety PMIC Device Overview 4 Rev 1.0 2019-03-25

Table 1 Absolute maximum ratings 2) (continued) Tj = -40°C to 150°C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Parameter Symbol Values Unit Note or condition Min. Typ. Max. ESD susceptibility to GND VESD -500 – 500 V CDM7) ESD susceptibility (corner pins) to GND VESD,Corner -750 – 750 V CDM 2 Not subject to production test, specified by design. OPTIREG™ PMIC TLF35584 Functional Safety PMIC Device Overview 5 Rev 1.0 2019-03-25

2 Package information 8)

(6.8) 7±0.1 (0.2) 0.9 MAX. 0.05 MAX. STANDOFF 0.08C SEATING COPLANARITY PLANE 48x B 0.5 0.23±0.05 0.1 A B C 0.1±0.03 0.1±0.05 5.2±0.1 5.2±0.1 (0.26) 45° 12 1 3625 1) VERTICAL BURR 0.03 MAX. AT ALL SIDES 2) THESE FOUR METAL AREAS HAVE EXPOSED DIEPAD POTENTIAL 3) EXCLUDE MOLD RESIDUES (0.65) 0.5±0.07(6.8) 7±0.1 A INDEX MARKING ALL DIMENSIONS ARE IN UNITS MM THE DRAWING IS IN COMPLIANCE WITH ISO 128 & PROJECTION METHOD 1 [ ] 48x (0.35) 0.13±0.05 0.15±0.05 INDEX MARKING 0.4 x 45° Figure 1 PG-VQFN-48 package outline 1) DOES NOT INCLUDE PLASTIC OR METAL PROTRUSION OF 0.25 MAX. PER SIDE 1.4±0.05 1.6 MAX. EXPOSED DIEPAD INDEX MARKING H GAUGE PLANE BOTTOM VIEW Z Z VIEW ALL DIMENSIONS ARE IN UNITS MM THE DRAWING IS IN COMPLIANCE WITH ISO 128 & PROJECTION METHOD 1 [ ] 0.5 0.2 +0.07 -0.03

0.08 A-B D C 64x

D BA

0.2 A-B D H 4x

64x0.2 A-B D 1 1 AVAIL. EXPOSED Ex Ey 6.3 6.3 6.0 6.0 DIEPAD SIZE Ax By 5.3 5.3 5.0 5.0 4.5 4.5 3.5 3.5 By Ey Ax Ex 0.1±0.05 STAND OFF C SEATING PLANE 0.08 C 64x COPLANARITY 0.6±0.15 0.25 0.15 +0.05 -0.06 0°..7° Figure 2 PG-LQFP-64 package outline

8 Dimensions in mm

OPTIREG™ PMIC TLF35584 Functional Safety PMIC Device Overview 6 Rev 1.0 2019-03-25

All referenced product or service names and trademarks are the property of their respective owners. Edition 2019-03-25 Published by Infineon Technologies AG

81726 Munich, Germany

© 2019 Infineon Technologies AG All Rights Reserved. Do you have a question about any aspect of this document? Email: erratum@infineon.com Document reference IFX-jmv1546509847065 IMPORTANT NOTICE The information contained in this application note is given as a hint for the implementation of the product only and shall in no event be regarded as a description or warranty of a certain functionality, condition or quality of the product. Before implementation of the product, the recipient of this application note must verify any function and other technical information given herein in the real application. Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind (including without limitation warranties of non-infringement of intellectual property rights of any third party) with respect to any and all information given in this application note. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer’s technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury