TLE2021ACDG4 | DigiCamel IC Datasheet

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TLE202X_07 TI | Alldatasheet

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Technical content

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068Supply Current. . . 300 µA Max /C0068High Unity-Gain Bandwidth...2 MHz Typ /C0068High Slew Rate. . . 0.45 V/µs Min /C0068Supply-Current Change Over Military Temp Range ...1 0 µA Typ at VCC ± = ± 15 V /C0068Specified for Both 5-V Single-Supply and ±15-V Operation /C0068Phase-Reversal Protection /C0068High Open-Loop Gain. . . 6.5 V/µV (136 dB) Typ /C0068Low Offset Voltage. . . 100 µV Max /C0068Offset Voltage Drift With Time 0.005 µV/mo Typ /C0068Low Input Bias Current. . . 50 nA Max /C0068Low Noise Voltage. . . 19 nV/√Hz Typ

description

The TLE202x, TLE202xA, and TLE202xB devices are precision, high-speed, low-power operational amplifiers using a new Texas Instruments Excalibur process. These devices combine the best features of the OP21 with highly improved slew rate and unity-gain bandwidth. The complementary bipolar Excalibur process utilizes isolated vertical pnp transistors that yield dramatic improvement in unity-gain bandwidth and slew rate over similar devices. The addition of a bias circuit in conjunction with this process results in extremely stable parameters with both time and temperature. This means that a precision device remains a precision device even with changes in temperature and over years of use. This combination of excellent dc performance with a common-mode input voltage range that includes the negative rail makes these devices the ideal choice for low-level signal conditioning applications in either single-supply or split-supply configurations. In addition, these devices offer phase-reversal protection circuitry that eliminates an unexpected change in output states when one of the inputs goes below the negative supply rail. A variety of available options includes small-outline and chip-carrier versions for high-density systems applications. The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized for operation from −40°C to 85°C. The M-suffix devices are characterized for operation over the full military temperature range of −55°C to 125°C. Copyright  1997−2007, Texas Instruments Incorporated/C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 /C0261 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

AT 25°C SMALL OUTLINE † (D) SSOP ‡ (DB) CHIP CARRIER (FK) CERAMIC DIP (JG) PLASTIC DIP (P) TSSOP ‡ (PW) CHIP FORM § (Y) 0°C to 200 µV TLE2021ACD TLE2021CDBLE — — TLE2021ACP — —0 C to 70°C 200 µV 500 µV TLE2021ACD TLE2021CD TLE2021CDBLE — — TLE2021ACP TLE2021CP TLE2021CPWLE TLE2021Y −40°C to 200 µV TLE2021AID — — — TLE2021AIP — —to 85°C 200 µV 500 µV TLE2021AID TLE2021ID — — — TLE2021AIP TLE2021IP — — −55°C 100 µV — TLE2021BMFK TLE2021BMJG —−55 C to 100 µV 200 µV TLE2021AMD — TLE2021BMFK TLE2021AMFK TLE2021BMJG TLE2021AMJG TLE2021AMP — —to 125°C 200 µV 500 µV TLE2021AMD TLE2021MD — TLE2021AMFK TLE2021MFK TLE2021AMJG TLE2021MJG TLE2021AMP TLE2021MP — — † The D packages are available taped and reeled. To order a taped and reeled part, add the suffix R (e.g., TLE2021CDR). ‡ The DB and PW packages are only available left-end taped and reeled. § Chip forms are tested at 25°C only. TLE2022 AVAILABLE OPTIONS PACKAGED DEVICES CHIP TA VIOmax AT 25°C SMALL OUTLINE † (D) SSOP ‡ (DB) CHIP CARRIER (FK) CERAMIC DIP (JG) PLASTIC DIP (P) TSSOP ‡ (PW) CHIP FORM § (Y) 0°C to 150 µV 300 µV TLE2022BCD TLE2022ACD — — — TLE2022ACP —to 70°C 300 µV 500 µV TLE2022ACD TLE2022CD TLE2022CDBLE — — TLE2022ACP TLE2022CP TLE2022CPWLE TLE2022Y −40°C to 150 µV 300 µV TLE2022BID TLE2022AID — — — TLE2022AIP — —to 85°C 300 µV 500 µV TLE2022AID TLE2022ID — — — TLE2022AIP TLE2022IP — — −55°C 150 µV — — TLE2022BMJG —−55 C to 150 µV 300 µV TLE2022AMD — TLE2022AMFK TLE2022BMJG TLE2022AMJG TLE2022AMP — —to 125°C 300 µV 500 µV TLE2022AMD TLE2022MD — TLE2022AMFK TLE2022MFK TLE2022AMJG TLE2022MJG TLE2022AMP TLE2022MP — — † The D packages are available taped and reeled. To order a taped and reeled part, add the suffix R (e.g., TLE2022CDR). ‡ The DB and PW packages are only available left-end taped and reeled. § Chip forms are tested at 25°C only. TLE2024 AVAILABLE OPTIONS PACKAGED DEVICES CHIP TA VIOmax AT 25°C SMALL OUTLINE (DW) CHIP CARRIER (FK) CERAMIC DIP (J) PLASTIC DIP (N) CHIP FORM § (Y) 500 µV TLE2024BCDW TLE2024BCN — 0°C to 70°C 500 µV 750 µV TLE2024BCDW TLE2024ACDW — — TLE2024BCN TLE2024ACN —0 C to 70C 750 µV 1000 µV TLE2024ACDW TLE2024CDW — — TLE2024ACN TLE2024CN TLE2024Y 500 µV TLE2024BIDW TLE2024BIN −40°C to 85°C 500 µV 750 µV TLE2024BIDW TLE2024AIDW — — TLE2024BIN TLE2024AIN —−40 C to 85C 750 µV 1000 µV TLE2024AIDW TLE2024IDW — — TLE2024AIN TLE2024IN 500 µV TLE2024BMDW TLE2024BMFK TLE2024BMJ TLE2024BMN −55°C to 125°C 500 µV 750 µV TLE2024BMDW TLE2024AMDW TLE2024BMFK TLE2024AMFK TLE2024BMJ TLE2024AMJ TLE2024BMN TLE2024AMN —−55 C to 125C 750 µV 1000 µV TLE2024AMDW TLE2024MDW TLE2024AMFK TLE2024MFK TLE2024AMJ TLE2024MJ TLE2024AMN TLE2024MN § Chip forms are tested at 25°C only.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 OFFSET N1 IN− IN+ VCC − /GND NC VCC+ OUT OFFSET N2 NC − No internal connection 3212 0 1 9 91 0 1 1 1 2 1 3 NC VCC+ NC OUT NC NC IN− NC IN+ NC TLE2021 FK PACKAGE (TOP VIEW)NC OFFSET N1 NC NC NC NC GND NC OFFSET N2 NC CC−V/ TLE2021 D, DB, JG, P, OR PW PACKAGE (TOP VIEW) 1OUT 1IN− 1IN+ VCC − /GND VCC+ 2OUT 2IN− 2IN+ D, DB, JG, P, OR PW PACKAGE (TOP VIEW) NC − No internal connection 3212 0 1 9 91 0 1 1 1 2 1 3 NC 2OUT NC 2IN − NC NC 1IN − NC 1IN + NC FK PACKAGE (TOP VIEW)NC 1OUT NC NC NC NC GND NC 2IN + CC−V/ CC+V 1OUT 1IN− 1IN+ VCC+ 2IN+ 2IN− 2OUT NC 4OUT 4IN− 4IN+ V CC − /GND 3IN+ 3IN− 3OUT NC DW PACKAGE (TOP VIEW) 3 2 1 20 19 91 0 1 1 1 2 1 3 4IN+ NC V CC− /GND NC 3IN+ 1IN+ NC V CC+ NC 2IN+ 1IN − 1OUT NC 3OUT 3IN − 4OUT 4IN − 2IN − 2OUT NC NC − No internal connection 1OUT 1IN− 1IN+ VCC+ 2IN+ 2IN− 2OUT 4OUT 4IN− 4IN+ V CC− /GND 3IN+ 3IN− 3OUT FK PACKAGE (TOP VIEW) J OR N PACKAGE (TOP VIEW)

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

This chip, when properly assembled, display characteristics similar to the TLE2021. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. This chip may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. PIN (4) IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP. OUT IN+ IN− VCC+ (7) (3) (2) (6) (4) VCC− /GND (1) (5) OFFSET N1 OFFSET N2 (1) (2) (3) (4) (5)(6)(7)

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLE2022Y chip information This chip, when properly assembled, displays characteristics similar to TLE2022. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. This chip may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. PIN (4) IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP. OUT IN+ IN− VCC+ (8) (6) (3) (2) (5) (1) +(7) IN+ IN− OUT (4) VCC− (1) (2) (3) (4) (5) (6)(7) (8)

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

This chip, when properly assembled, displays characteristics similar to the TLE2024. Thermal compression or ultrasonic bonding may be used on the doped aluminum-bonding pads. This chip may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. PIN (11) IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP. 1OUT 1IN+ 1IN− VCC+ (4) (6) (3) (2) (5) (1) +(7) 2IN+ 2IN− 2OUT (11) VCC−/GND 3OUT 2IN+ 3IN− (13) (10) (9) (12) (8) +(14) 4OUT 4IN+ 4IN− 100 140

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 7POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 equivalent schematic (each amplifier) IN − Q23 Q25 Q10 Q11 Q12 Q13 Q14 Q15 Q16 Q17 Q18 Q19 Q20 Q21 Q22 Q24 Q26 Q27 Q28 Q29 Q30 Q31 Q32 Q33 Q34 Q35 Q36 Q37 Q38 Q39 Q40 D1 D2 D4IN + OU T OFFSET N1 VCC+ VCC− /GND OFFSET N2 ACTUAL DEVICE COMPONENT COUNT COMPONENT TLE2021 TLE2022 TLE2024 Transistors 40 80 160 Resistors 7 14 28 Diodes 4 8 16 Capacitors 4 8 16

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ , and VCC− . 2. Differential voltages are at IN+ with respect to IN−. Excessive current flows if a differential input voltage in excess of approximately ±600 mV is applied between the inputs unless some limiting resistance is used. 3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE T A = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING TA = 125°C POWER RATING D−8 725 mW 5.8 mW/°C 464 mW 377 mW 145 mW DB−8 525 mW 4.2 mW/ °C 336 mW — — DW−16 1025 mW 8.2 mW/ °C 656 mW 533 mW 205 mW FK 1375 mW 11.0 mW/ °C 880 mW 715 mW 275 mW J−14 1375 mW 11.0 mW/ °C 880 mW 715 mW 275 mW JG−8 1050 mW 8.4 mW/ °C 672 mW 546 mW 210 mW N−14 1150 mW 9.2 mW/ °C 736 mW 598 mW 230 mW P−8 1000 mW 8.0 mW/ °C 640 mW 520 mW 200 mW PW−8 525 mW 4.2 mW/°C 336 mW — — recommended operating conditions C SUFFIX I SUFFIX M SUFFIX UNITMIN MAX MIN MAX MIN MAX UNIT Supply voltage, VCC ±2 ±20 ±2 ±20 ±2 ±20 V Common-mode input voltage, VIC VCC = ± 5 V 0 3.5 0 3.2 0 3.2 VCommon-mode input voltage, VIC VCC ± = ±15 V −15 13.5 −15 13.2 −15 13.2 V Operating free-air temperature, TA 0 70 −40 85 −55 125 °C

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 POST OFFICE BOX 655303 DALLAS, TEXAS 75265• 9 TLE2021 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † TLE2021C TLE2021AC TLE2021BC UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT VIO Input offset voltage 25°C 120 600 100 300 80 200 VVIO Input offset voltage Full range 850 600 300 µV αVIO Temperature coefficient of input offset voltage Full range 2 2 2 µV/°C Input offset voltage long-term drift (see Note 4) VIC = 0, RS = 50 Ω 25°C 0.005 0.005 0.005 µV/mo IIO Input offset current VIC = 0, RS = 50 Ω 25°C 0.2 6 0.2 6 0.2 6 nAIIO Input offset current Full range 10 10 10 nA IIB Input bias current 25°C 25 70 25 70 25 70 nAIIB Input bias current Full range 90 90 90 nA VICR Common-mode input voltage range R S = 50 Ω 25°C to 3.5 − 0.3 to to 3.5 − 0.3 to to 3.5 − 0.3 to VVICR Common-mode input voltage range R S = 50 Ω Full range to 3.5 to 3.5 to 3.5 V VOH High-level output voltage 25°C 4 4.3 4 4.3 4 4.3 VVOH High-level output voltage R L= 10 kΩ Full range 3.9 3.9 3.9 V VOL Low-level output voltage VVOL Low-level output voltage Full range 0.85 0.85 0.85 V AVD V/ VAVD Large-signal differential voltage amplification VO = 1.4 V to 4 V, R L = 10 kΩ Full range 0.3 0.3 0.3 V/µV CMRR Common-mode rejection ratio VIC = VICRmin, 25°C 85 110 85 110 85 110 dBCMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω Full range 80 80 80 dB kSVR Supply-voltage rejection ratio VCC = 5 V to 30 V 25°C 105 120 105 120 105 120 dBkSVR Supply-voltage rejection ratio (∆VCC /∆VIO) VCC = 5 V to 30 V Full range 100 100 100 dB ICC Supply current 25°C 200 300 200 300 200 300 AICC Supply current VO = 2.5 V, No loadFull range 300 300 300 µA ∆ICC Supply-current change over operating temperature range VO = 2.5 V, No load Full range 5 5 5 µA † Full range is 0°C to 70°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

10 POST OFFICE BOX 655303 DALLAS, TEXAS 75265•

TLE2021 electrical characteristics at specified free-air temperature, VCC = ±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † TLE2021C TLE2021AC TLE2021BC UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT VIO Input offset voltage 25°C 120 500 80 200 40 100 VVIO Input offset voltage Full range 750 500 200 µV αVIO Temperature coefficient of input offset voltage Full range 2 2 2 µV/°C Input offset voltage long-term drift (see Note 4) VIC = 0, RS = 50 Ω 25°C 0.006 0.006 0.006 µV/mo IIO Input offset current IC S 25°C 0.2 6 0.2 6 0.2 6 nAIIO Input offset current Full range 10 10 10 nA IIB Input bias current 25°C 25 70 25 70 25 70 nAIIB Input bias current Full range 90 90 90 nA VICR Common-mode input voltage range R S = 50 Ω 25°C −15 to 13.5 −15.3 to −15 to 13.5 −15.3 to −15 to 13.5 −15.3 to VVICR Common-mode input voltage range R S = 50 Ω Full range −15 to 13.5 −15 to 13.5 −15 to 13.5 V VOM+ Maximum positive peak 25°C 14 14.3 14 14.3 14 14.3 VVOM+ Maximum positive peak output voltage swing R L = 10 kΩ Full range 13.9 13.9 13.9 V VOM − Maximum negative peak VVOM − Maximum negative peak output voltage swing Full range −13.7 −13.7 −13.7 V AVD Large-signal differential VO =± 10 V, 25°C 1 6.5 1 6.5 1 6.5 V/ VAVD Large-signal differential voltage amplification VO =± 10 V, R L = 10 kΩ Full range 1 1 1 V/µV CMRR Common-mode rejection ratio VIC = VICR min, 25°C 100 115 100 115 100 115 dBCMRR Common-mode rejection ratio VIC = VICR min, R S = 50 Ω Full range 96 96 96 dB kSVR Supply-voltage rejection ratio VCC ± = ± 2.5 V 25°C 105 120 105 120 105 120 dBkSVR Supply-voltage rejection ratio (∆VCC /∆VIO) VCC ± = ± 2.5 V to ± 15 V Full range 100 100 100 dB ICC Supply current 25°C 240 350 240 350 240 350 AICC Supply current VO = 0, No load Full range 350 350 350 µA ∆ICC Supply-current change over operating temperature range VO = 0, No load Full range 6 6 6 µA † Full range is 0°C to 70°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 POST OFFICE BOX 655303 DALLAS, TEXAS 75265• 11 TLE2022 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † TLE2022C TLE2022AC TLE2022BC UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT VIO Input offset voltage 25°C 600 400 250 VVIO Input offset voltage Full range 800 550 400 µV αVIO Temperature coefficient of Full range 2 2 2 V/°CαVIO Temperature coefficient of input offset voltage Full range 2 2 2 µV/°C Input offset voltage long-termVIC = 0, R S = 50 Ω 25°C 0.005 0.005 0.005 V/moInput offset voltage long-term drift (see Note 4) VIC = 0, R S = 50 Ω 25°C 0.005 0.005 0.005 µV/mo IIO Input offset current 25°C 0.5 6 0.4 6 0.3 6 nAIIO Input offset current Full range 10 10 10 nA IIB Input bias current 25°C 35 70 33 70 30 70 nAIIB Input bias current Full range 90 90 90 nA 25°C to −0.3 to to −0.3 to to −0.3 to VICR Common-mode input R S = 50 Ω

25 C to

3.5 to to 3.5 to to 3.5 to VVICR Common-mode input voltage range R S = 50 Ω 0 0 0 Vvoltage range Full range to to toFull range to 3.5 to 3.5 to 3.5 VOH High-level output voltage 25°C 4 4.3 4 4.3 4 4.3 VVOH High-level output voltage R L = 10 kΩ Full range 3.9 3.9 3.9 V VOL Low-level output voltage VVOL Low-level output voltage Full range 0.85 0.85 0.85 V AVD Large-signal differential VO = 1.4 V to 4 V,R L = 10 kΩ V/ VAVD Large-signal differential voltage amplification VO = 1.4 V to 4 V, R L = 10 kΩ Full range 0.3 0.4 0.5 V/µV CMRR Common-mode rejection ratioVIC = VICRmin, R S = 50 Ω 25°C 85 100 87 102 90 105 dBCMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω Full range 80 82 85 dB kSVR Supply-voltage rejection ratioVCC = 5 V to 30 V 25°C 100 115 103 118 105 120 dBkSVR Supply-voltage rejection ratio (∆VCC ±/∆VIO) VCC = 5 V to 30 V Full range 95 98 100 dB ICC Supply current 25°C 450 600 450 600 450 600 AICC Supply current VO = 2.5 V, No load Full range 600 600 600 µA ∆ICC Supply current change over VO = 2.5 V, No load Full range 7 7 7 µA∆ICC Supply current change over operating temperature range Full range 7 7 7 µA † Full range is 0°C to 70°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

12 POST OFFICE BOX 655303 DALLAS, TEXAS 75265•

TLE2022 electrical characteristics at specified free-air temperature, VCC =±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † TLE2022C TLE2022AC TLE2022BC UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT VIO Input offset voltage 25°C 150 500 120 300 70 150 VVIO Input offset voltage Full range 700 450 300 µV VIO Temperature coefficient of Full range 2 2 2 V/°CαVIO Temperature coefficient of input offset voltage Full range 2 2 2 µV/°C Input offset voltage long-termVIC = 0, R S = 50 Ω 25°C 0.006 0.006 0.006 V/moInput offset voltage long-term drift (see Note 4) VIC = 0, R S = 50 Ω 25°C 0.006 0.006 0.006 µV/mo IIO Input offset current 25°C 0.5 6 0.4 6 0.3 6 nAIIO Input offset current Full range 10 10 10 nA IIB Input bias current 25°C 35 70 33 70 30 70 nAIIB Input bias current Full range 90 90 90 nA 25°C −15 to −15.3 to −15 to −15.3 to −15 to −15.3 to VICR Common-mode input R S = 50 Ω 13.5 to to 13.5 to to 13.5 to VVICR Common-mode input voltage range R S = 50 Ω −15 −15 −15 Vvoltage range Full range −15 to −15 to −15 toFull range to 13.5 to 13.5 to 13.5 VOM + Maximum positive peak 25°C 14 14.3 14 14.3 14 14.3 VVOM + Maximum positive peak output voltage swing R L = 10 kΩ Full range 13.9 13.9 13.9 V VOM− Maximum negative peak VVOM− Maximum negative peak output voltage swing Full range −13.7 −13.7 −13.7 V AVD Large-signal differential VO = ±10 V, R L = 10 kΩ 25°C 0.8 4 1 7 1.5 10 V/ VAVD Large-signal differential voltage amplification VO = ±10 V, R L = 10 kΩ Full range 0.8 1 1.5 V/µV CMRR Common-mode rejection ratioVIC = VICRmin, R S = 50 Ω 25°C 95 106 97 109 100 112 dBCMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω Full range 91 93 96 dB kSVR Supply-voltage rejection ratioVCC = ±2.5 V to ±15 V 25°C 100 115 103 118 105 120 dBkSVR Supply-voltage rejection ratio (∆VCC ±/∆VIO) VCC ± = ±2.5 V to ±15 V Full range 95 98 100 dB ICC Supply current 25°C 550 700 550 700 550 700 AICC Supply current VO = 0, No load Full range 700 700 700 µA ∆ICC Supply current change over VO = 0, No load Full range 9 9 9 µA∆ICC Supply current change over operating temperature range Full range 9 9 9 µA † Full range is 0°C to 70°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 POST OFFICE BOX 655303 DALLAS, TEXAS 75265• 13 TLE2024 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † TLE2024C TLE2024AC TLE2024BC UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT VIO Input offset voltage 25°C 1100 850 600 VVIO Input offset voltage Full range 1300 1050 800 µV αVIO Temperature coefficient of input offset voltage Full range 2 2 2 µV/°C Input offset voltage long-term drift (see Note 4) VIC = 0, R S = 50 Ω 25°C 0.005 0.005 0.005 µV/mo IIO Input offset current IC S 25°C 0.6 6 0.5 6 0.4 6 nAIIO Input offset current Full range 10 10 10 nA IIB Input bias current 25°C 45 70 40 70 35 70 nAIIB Input bias current Full range 90 90 90 nA VICR Common-mode input voltage R S = 50 Ω 25°C to 3.5 −0.3 to to 3.5 −0.3 to to 3.5 −0.3 to VVICR Common-mode input voltage range R S = 50 Ω Full range to 3.5 to 3.5 to 3.5 V VOH High-level output voltage VVOH High-level output voltage R L = 10 kΩ Full range 3.7 3.7 3.8 V VOL Low-level output voltage VVOL Low-level output voltage Full range 0.95 0.95 0.95 V AVD Large-signal differential VO = 1.4 V to 4 V,R L = 10 kΩ V/ VAVD Large-signal differential voltage amplification VO = 1.4 V to 4 V,R L = 10 kΩ Full range 0.1 0.1 0.1 V/µV CMRR Common-mode rejection ratioVIC = VICRmin, R S = 50 Ω 25°C 80 90 82 92 85 95 dBCMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω Full range 80 82 85 dB kSVR Supply-voltage rejection ratioVCC = 5 V to 30 V 25°C 98 112 100 115 103 117 dBkSVR Supply-voltage rejection ratio (∆VCC /∆VIO) VCC = 5 V to 30 V Full range 93 95 98 dB ICC Supply current 25°C 800 1200 800 1200 800 1200 AICC Supply current VO = 2.5 V, No load Full range 1200 1200 1200 µA ∆ICC Supply current change over operating temperature range VO = 2.5 V, No load Full range 15 15 15 µA † Full range is 0°C to 70°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

14 POST OFFICE BOX 655303 DALLAS, TEXAS 75265•

TLE2024 electrical characteristics at specified free-air temperature, VCC = ±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † TLE2024C TLE2024AC TLE2024BC UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT VIO Input offset voltage 25°C 1000 750 500 VVIO Input offset voltage Full range 1200 950 700 µV αVIO Temperature coefficient of input offset voltage Full range 2 2 2 µV/°C Input offset voltage long-term drift (see Note 4) VIC = 0, R S = 50 Ω 25°C 0.006 0.006 0.006 µV/mo IIO Input offset current IC S 25°C 0.6 6 0.5 6 0.4 6 nAIIO Input offset current Full range 10 10 10 nA IIB Input bias current 25°C 50 70 45 70 40 70 nAIIB Input bias current Full range 90 90 90 nA VICR Common-mode input voltage R S = 50 Ω 25°C −15 to 13.5 −15.3 to −15 to 13.5 −15.3 to −15 to 13.5 −15.3 to VVICR Common-mode input voltage range R S = 50 Ω Full range −15 to 13.5 −15 to 13.5 −15 to 13.5 V VOM+ VVOM+ Maximum positive peak output voltage swing R L = 10 kΩ Full range 13.7 13.8 13.9 V VOM− Maximum negative peak output VVOM− Maximum negative peak output voltage swing Full range −13.6 −13.6 −13.6 V AVD Large-signal differential VO = ±10 V, R L = 10 kΩ 25°C 0.4 2 0.8 4 1 7 V/ VAVD Large-signal differential voltage amplification VO = ±10 V, R L = 10 kΩ Full range 0.4 0.8 1 V/µV CMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω 25°C 92 102 94 105 97 108 dBCMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω Full range 88 90 93 dB kSVR Supply-voltage rejection ratioVCC = ± 2.5 V to ±15 V 25°C 98 112 100 115 103 117 dBkSVR Supply-voltage rejection ratio (∆VCC ±/∆VIO) VCC ± = ± 2.5 V to ±15 V Full range 93 95 98 dB ICC Supply current 25°C 1050 1400 1050 1400 1050 1400 AICC Supply current VO = 0, No load Full range 1400 1400 1400 µA ∆ICC Supply current change over VO = 0, No load Full range 20 20 20 µA∆ICC Supply current change over operating temperature range Full range 20 20 20 µA † Full range is 0°C to 70°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 POST OFFICE BOX 655303 DALLAS, TEXAS 75265• 15 TLE2021 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † TLE2021I TLE2021AI TLE2021BI UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT VIO Input offset voltage 25°C 120 600 100 300 80 200 VVIO Input offset voltage Full range 950 600 300 µV αVIO Temperature coefficient of input offset voltage Full range 2 2 2 µV/°C Input offset voltage long-term drift (see Note 4) VIC = 0, RS = 50 Ω 25°C 0.005 0.005 0.005 µV/mo IIO Input offset current IC S 25°C 0.2 6 0.2 6 0.2 6 nAIIO Input offset current Full range 10 10 10 nA IIB Input bias current 25°C 25 70 25 70 25 70 nAIIB Input bias current Full range 90 90 90 nA VICR Common-mode input voltage range R S = 50 Ω 25°C to 3.5 −0.3 to to 3.5 −0.3 to to 3.5 − 0.3 to VVICR Common-mode input voltage range R S = 50 Ω Full range to 3.2 to 3.2 to 3.2 V VOH High-level output voltage 25°C 4 4.3 4 4.3 4 4.3 VVOH High-level output voltage R L = 10 kΩ Full range 3.9 3.9 3.9 V VOL Low-level output voltage VVOL Low-level output voltage Full range 0.9 0.9 0.9 V AVD V/ VAVD Large-signal differential voltage amplification VO = 1.4 V to 4 V, R L = 10 kΩ Full range 0.25 0.25 0.25 V/µV CMRR Common-mode rejection ratio VIC = VICR min, 25°C 85 110 85 110 85 110 dBCMRR Common-mode rejection ratio VIC = VICR min, R S = 50 Ω Full range 80 80 80 dB kSVR Supply-voltage rejection ratio VCC = 5 V to 30 V 25°C 105 120 105 120 105 120 dBkSVR Supply-voltage rejection ratio (∆VCC /∆VIO) VCC = 5 V to 30 V Full range 100 100 100 dB ICC Supply current 25°C 200 300 200 300 200 300 AICC Supply current VO = 2.5 V, No load Full range 300 300 300 µA ∆ICC Supply-current change over operating temperature range VO = 2.5 V, No load Full range 6 6 6 µA † Full range is − 40°C to 85°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

16 POST OFFICE BOX 655303 DALLAS, TEXAS 75265•

TLE2021 electrical characteristics at specified free-air temperature, VCC = ± 15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † TLE2021I TLE2021AI TLE2021BI UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT VIO Input offset voltage 25°C 120 500 80 200 40 100 VVIO Input offset voltage Full range 850 500 200 µV αVIO Temperature coefficient of input offset voltage Full range 2 2 2 µV/°C Input offset voltage long-term drift (see Note 4) VIC = 0, RS = 50 Ω 25°C 0.006 0.006 0.006 µV/mo IIO Input offset current IC S 25°C 0.2 6 0.2 6 0.2 6 nAIIO Input offset current Full range 10 10 10 nA IIB Input bias current 25°C 25 70 25 70 25 70 nAIIB Input bias current Full range 90 90 90 nA VICR Common-mode input voltage range R S = 50 Ω 25°C −15 to 13.5 −15.3 to −15 to 13.5 −15.3 to −15 to 13.5 −15.3 to VVICR Common-mode input voltage range R S = 50 Ω Full range −15 to 13.2 −15 to 13.2 −15 to 13.2 V VOM + Maximum positive peak output 25°C 14 14.3 14 14.3 14 14.3 VVOM + Maximum positive peak output voltage swing R L = 10 kΩ Full range 13.9 13.9 13.9 V VOM − Maximum negative peak output VVOM − Maximum negative peak output voltage swing Full range −13.6 −13.6 −13.6 V AVD Large-signal differential VO =1 0 V , 25°C 1 6.5 1 6.5 1 6.5 V/ VAVD Large-signal differential voltage amplification VO =1 0 V , R L = 10 kΩ Full range 0.75 0.75 0.75 V/µV CMRR Common-mode rejection ratio VIC = VICR min, 25°C 100 115 100 115 100 115 dBCMRR Common-mode rejection ratio VIC = VICR min, R S = 50 Ω Full range 96 96 96 dB kSVR Supply-voltage rejection ratio VCC ± = ± 2. 5 V 25°C 105 120 105 120 105 120 dBkSVR Supply-voltage rejection ratio (∆VCC /∆VIO) VCC ± = ± 2. 5 V to ± 15 V Full range 100 100 100 dB ICC Supply current 25°C 240 350 240 350 240 350 AICC Supply current VO = 0 V, No load Full range 350 350 350 µA ∆ICC Supply-current change over operating temperature range VO = 0 V, No load Full range 7 7 7 µA † Full range is − 40°C to 85°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 POST OFFICE BOX 655303 DALLAS, TEXAS 75265• 17 TLE2022 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † TLE2022I TLE2022AI TLE2022BI UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT VIO Input offset voltage 25°C 600 400 250 VVIO Input offset voltage Full range 800 550 400 µV VIO Temperature coefficient of Full range 2 2 2 V/°CαVIO Temperature coefficient of input offset voltage Full range 2 2 2 µV/°C Input offset voltage long-term VIC = 0, R S = 50 Ω 25°C 0.005 0.005 0.005 V/moInput offset voltage long-term drift (see Note 4) VIC = 0, R S = 50 Ω 25°C 0.005 0.005 0.005 µV/mo IIO Input offset current 25°C 0.5 6 0.4 6 0.3 6 nAIIO Input offset current Full range 10 10 10 nA IIB Input bias current 25°C 35 70 33 70 30 70 nAIIB Input bias current Full range 90 90 90 nA 25°C to −0.3 to to −0.3 to to −0.3 to VICR Common-mode input R S = 50 Ω 3.5 to to 3.5 to to 3.5 to VVICR Common-mode input voltage range R S = 50 Ω 0 0 0 Vvoltage range Full range to to toFull range to 3.2 to 3.2 to 3.2 VOH High-level output voltage 25°C 4 4.3 4 4.3 4 4.3 VVOH High-level output voltage R L = 10 kΩ Full range 3.9 3.9 3.9 V VOL Low-level output voltage VVOL Low-level output voltage Full range 0.9 0.9 0.9 V AVD Large-signal differential VO = 1.4 V to 4 V,R L = 10 kΩ V/ VAVD Large-signal differential voltage amplification VO = 1.4 V to 4 V,R L = 10 kΩ Full range 0.2 0.2 0.2 V/µV CMRR Common-mode rejection ratioVIC = VICRmin, R S = 50 Ω 25°C 85 100 87 102 90 105 dBCMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω Full range 80 82 85 dB kSVR Supply-voltage rejection ratioVCC = 5 V to 30 V 25°C 100 115 103 118 105 120 dBkSVR Supply-voltage rejection ratio (∆VCC ±/∆VIO) VCC = 5 V to 30 V Full range 95 98 100 dB ICC Supply current 25°C 450 600 450 600 450 600 AICC Supply current VO = 2.5 V, No load Full range 600 600 600 µA ∆ICC Supply current change over VO = 2.5 V, No load Full range 15 15 15 µA∆ICC Supply current change over operating temperature range Full range 15 15 15 µA † Full range is −40°C to 85°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

18 POST OFFICE BOX 655303 DALLAS, TEXAS 75265•

TLE2022 electrical characteristics at specified free-air temperature, VCC = ± 15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † TLE2022I TLE2022AI TLE2022BI UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT VIO Input offset voltage 25°C 150 500 120 300 70 150 VVIO Input offset voltage Full range 700 450 300 µV VIO Temperature coefficient of Full range 2 2 2 V/°CαVIO Temperature coefficient of input offset voltage Full range 2 2 2 µV/°C Input offset voltage long-term VIC = 0, R S = 50 Ω 25°C 0.006 0.006 0.006 V/moInput offset voltage long-term drift (see Note 4) VIC = 0, R S = 50 Ω 25°C 0.006 0.006 0.006 µV/mo IIO Input offset current 25°C 0.5 6 0.4 6 0.3 6 nAIIO Input offset current Full range 10 10 10 nA IIB Input bias current 25°C 35 70 33 70 30 70 nAIIB Input bias current Full range 90 90 90 nA 25°C −1 5 to −15.3 to −1 5 to −15.3 to −1 5 to −15.3 to VICR Common-mode input R S = 50 Ω 13.5 to to 13.5 to to 13.5 to VVICR Common-mode input voltage range R S = 50 Ω −1 5 −1 5 −1 5 Vvoltage range Full range −1 5 to −1 5 to −1 5 toFull range to 13.2 to 13.2 to 13.2 VOM + Maximum positive peak 25°C 14 14.3 14 14.3 14 14.3 VVOM + Maximum positive peak output voltage swing R L = 10 kΩ Full range 13.9 13.9 13.9 V VOM − Maximum negative peak VVOM − Maximum negative peak output voltage swing Full range − 13.6 − 13.6 − 13.6 V AVD Large-signal differential VO = ± 10 V, R L = 10 kΩ 25°C 0.8 4 1 7 1.5 10 V/ VAVD Large-signal differential voltage amplification VO = ± 10 V, R L = 10 kΩ Full range 0.8 1 1.5 V/µV CMRR Common-mode rejection ratioVIC = VICRmin, R S = 50 Ω 25°C 95 106 97 109 100 112 dBCMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω Full range 91 93 96 dB kSVR Supply-voltage rejection ratioVCC = ±2.5 V to ±15 V 25°C 100 115 103 118 105 120 dBkSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC = ±2.5 V to ±15 V Full range 95 98 100 dB ICC Supply current 25°C 550 700 550 700 550 700 AICC Supply current VO = 0, No load Full range 700 700 700 µA ∆ICC Supply current change over VO = 0, No load Full range 30 30 30 µA∆ICC Supply current change over operating temperature range Full range 30 30 30 µA † Full range is −40°C to 85°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 POST OFFICE BOX 655303 DALLAS, TEXAS 75265• 19 TLE2024 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † TLE2024I TLE2024AI TLE2024BI UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT VIO Input offset voltage 25°C 1100 850 600 VVIO Input offset voltage Full range 1300 1050 800 µV αVIO Temperature coefficient of input offset voltage Full range 2 2 2 µV/°C Input offset voltage long-term drift (see Note 4) VIC = 0, R S = 50 Ω 25°C 0.005 0.005 0.005 µV/mo IIO Input offset current IC S 25°C 0.6 6 0.5 6 0.4 6 nAIIO Input offset current Full range 10 10 10 nA IIB Input bias current 25°C 45 70 40 70 35 70 nAIIB Input bias current Full range 90 90 90 nA VICR Common-mode input voltage R S = 50 Ω 25°C to 3.5 −0.3 to to 3.5 −0.3 to to 3.5 −0.3 to VVICR Common-mode input voltage range R S = 50 Ω Full range to 3.2 to 3.2 to 3.2 V VOM+ VVOM+ Maximum positive peak output voltage swing R L = 10 kΩ Full range 3.7 3.7 3.8 V VOM− Maximum negative peak VVOM− Maximum negative peak output voltage swing Full range 0.95 0.95 0.95 V AVD Large-signal differential VO = 1.4 V to 4 V,R L = 10 kΩ V/ VAVD Large-signal differential voltage amplification VO = 1.4 V to 4 V,R L = 10 kΩ Full range 0.1 0.1 0.1 V/µV CMRR Common-mode rejection ratioVIC = VICRmin, R S = 50 Ω 25°C 80 90 82 92 85 95 dBCMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω Full range 80 82 85 dB kSVR Supply-voltage rejection ratioVCC = ±2.5 V to ±15 V 25°C 98 112 100 115 103 117 dBkSVR Supply-voltage rejection ratio (∆VCC ±/∆VIO) VCC ± = ±2.5 V to ±15 V Full range 93 95 98 dB ICC Supply current 25°C 800 1200 800 1200 800 1200 AICC Supply current VO = 0, No load Full range 1200 1200 1200 µA ∆ICC Supply current change over operating temperature range VO = 0, No load Full range 30 30 30 µA † Full range is −40°C to 85°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

20 POST OFFICE BOX 655303 DALLAS, TEXAS 75265•

TLE2024 electrical characteristics at specified free-air temperature, VCC = ±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † TLE2024I TLE2024AI TLE2024BI UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT VIO Input offset voltage 25°C 1000 750 500 VVIO Input offset voltage Full range 1200 950 700 µV αVIO Temperature coefficient of input offset voltage Full range 2 2 2 µV/°C Input offset voltage long-term drift (see Note 4) VIC = 0, R S = 50 Ω 25°C 0.006 0.006 0.006 µV/mo IIO Input offset current IC S 25°C 0.6 6 0.5 6 0.4 6 nAIIO Input offset current Full range 10 10 10 nA IIB Input bias current 25°C 50 70 45 70 40 70 nAIIB Input bias current Full range 90 90 90 nA VICR Common-mode input voltage R S = 50 Ω 25°C −15 to 13.5 −15.3 to −15 to 13.5 −15.3 to −15 to 13.5 −15.3 to VVICR Common-mode input voltage range R S = 50 Ω Full range −15 to 13.2 −15 to 13.2 −15 to 13.2 V VOM+ VVOM+ Maximum positive peak output voltage swing R L = 10 kΩ Full range 13.7 13.7 13.8 V VOM− Maximum negative peak output VVOM− Maximum negative peak output voltage swing Full range −13.6 −13.6 −13.6 V AVD Large-signal differential VO = ±10 V, R L = 10 kΩ 25°C 0.4 2 0.8 4 1 7 V/ VAVD Large-signal differential voltage amplification VO = ±10 V, R L = 10 kΩ Full range 0.4 0.8 1 V/µV CMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω 25°C 92 102 94 105 97 108 dBCMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω Full range 88 90 93 dB kSVR Supply-voltage rejection ratioVCC = ± 2.5 V to ±15 V 25°C 98 112 100 115 103 117 dBkSVR Supply-voltage rejection ratio (∆VCC ±/∆VIO) VCC ± = ± 2.5 V to ±15 V Full range 93 95 98 dB ICC Supply current 25°C 1050 1400 1050 1400 1050 1400 AICC Supply current VO = 0, No load Full range 1400 1400 1400 µA ∆ICC Supply current change over VO = 0, No load Full range 50 50 50 µA∆ICC Supply current change over operating temperature range Full range 50 50 50 µA † Full range is −40°C to 85°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 POST OFFICE BOX 655303 DALLAS, TEXAS 75265• 21 TLE2021 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † TLE2021M TLE2021AM TLE2021BM UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT VIO Input offset voltage 25°C 120 600 100 300 80 200 VVIO Input offset voltage Full range 1100 600 300 µV αVIO Temperature coefficient of input offset voltage Full range 2 2 2 µV/°C Input offset voltage long-term drift (see Note 4) VIC = 0, R S = 50 Ω 25°C 0.005 0.005 0.005 µV/mo IIO Input offset current IC S 25°C 0.2 6 0.2 6 0.2 6 nAIIO Input offset current Full range 10 10 10 nA IIB Input bias current 25°C 25 70 25 70 25 70 nAIIB Input bias current Full range 90 90 90 nA VICR Common-mode input R S = 50 Ω 25°C to 3.5 −0.3 to to 3.5 −0.3 to to 3.5 −0.3 to VVICR Common-mode input voltage range R S = 50 Ω Full range to 3.2 to 3.2 to 3.2 V VOH High-level output voltage 25°C 4 4.3 4 4.3 4 4.3 VVOH High-level output voltage R L = 10 kΩ Full range 3.8 3.8 3.8 V VOL Low-level output voltage VVOL Low-level output voltage Full range 0.95 0.95 0.95 V AVD Large-signal differential VO = 1.4 V to 4 V,R L = 10 kΩ V/ VAVD Large-signal differential voltage amplification VO = 1.4 V to 4 V,R L = 10 kΩ Full range 0.1 0.1 0.1 V/µV CMRR Common-mode rejection ratioVIC = VICRmin, R S = 50 Ω 25°C 85 110 85 110 85 110 dBCMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω Full range 80 80 80 dB kSVR Supply-voltage rejection ratioVCC = 5 V to 30 V 25°C 105 120 105 120 105 120 dBkSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC = 5 V to 30 V Full range 100 100 100 dB ICC Supply current 25°C 170 230 170 230 170 230 AICC Supply current VO = 2.5 V, No load Full range 230 230 230 µA ∆ICC Supply current change over operating temperature range VO = 2.5 V, No load Full range 9 9 9 µA † Full range is −55°C to 125°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

22 POST OFFICE BOX 655303 DALLAS, TEXAS 75265•

TLE2021 electrical characteristics at specified free-air temperature, VCC = ±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † TLE2021M TLE2021AM TLE2021BM UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT VIO Input offset voltage 25°C 120 500 80 200 40 100 VVIO Input offset voltage Full range 1000 500 200 µV αVIO Temperature coefficient of input offset voltage Full range 2 2 2 µV/°C Input offset voltage long-term drift (see Note 4) VIC = 0, R S = 50 Ω 25°C 0.006 0.006 0.006 µV/mo IIO Input offset current IC S 25°C 0.2 6 0.2 6 0.2 6 nAIIO Input offset current Full range 10 10 10 nA IIB Input bias current 25°C 25 70 25 70 25 70 nAIIB Input bias current Full range 90 90 90 nA VICR Common-mode input R S = 50 Ω 25°C −15 to 13.5 −15.3 to −15 to 13.5 −15.3 to −15 to 13.5 −15.3 to VVICR Common-mode input voltage range R S = 50 Ω Full range −15 to 13.2 −15 to 13.2 −15 to 13.2 V VOM+ Maximum positive peak 25°C 14 14.3 14 14.3 14 14.3 VVOM+ Maximum positive peak output voltage swing R L = 10 kΩ Full range 13.8 13.8 13.8 V VOM − Maximum negative peak VVOM − Maximum negative peak output voltage swing Full range −13.6 −13.6 −13.6 V AVD Large-signal differential VO = ±10 V, R L = 10 kΩ 25°C 1 6.5 1 6.5 1 6.5 V/ VAVD Large-signal differential voltage amplification VO = ±10 V, R L = 10 kΩ Full range 0.5 0.5 0.5 V/µV CMRR Common-mode rejection ratioVIC = VICRmin, R S = 50 Ω 25°C 100 115 100 115 100 115 dBCMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω Full range 96 96 96 dB kSVR Supply-voltage rejection ratioVCC = ± 2.5 V to ±15 V 25°C 105 120 105 120 105 120 dBkSVR Supply-voltage rejection ratio (∆VCC ±/∆VIO) VCC ± = ± 2.5 V to ±15 V Full range 100 100 100 dB ICC Supply current 25°C 200 300 200 300 200 300 AICC Supply current VO = 0, No load Full range 300 300 300 µA ∆ICC Supply current change over operating temperature range VO = 0, No load Full range 10 10 10 µA † Full range is −55°C to 125°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 POST OFFICE BOX 655303 DALLAS, TEXAS 75265• 23 TLE2022 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † TLE2022M TLE2022AM TLE2022BM UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT VIO Input offset voltage 25°C 600 400 250 VVIO Input offset voltage Full range 800 550 400 µV VIO Temperature coefficient of Full range 2 2 2 V/°CαVIO Temperature coefficient of input offset voltage Full range 2 2 2 µV/°C Input offset voltage long-term VIC = 0, R S = 50 Ω 25°C 0.005 0.005 0.005 V/moInput offset voltage long-term drift (see Note 4) VIC = 0, R S = 50 Ω 25°C 0.005 0.005 0.005 µV/mo IIO Input offset current 25°C 0.5 6 0.4 6 0.3 6 nAIIO Input offset current Full range 10 10 10 nA IIB Input bias current 25°C 35 70 33 70 30 70 nAIIB Input bias current Full range 90 90 90 nA 25°C to −0.3 to to −0.3 to to −0.3 to VICR Common-mode input R S = 50 Ω 3.5 to to 3.5 to to 3.5 to VVICR Common-mode input voltage range R S = 50 Ω 0 0 0 Vvoltage range Full range to to toFull range to 3.2 to 3.2 to 3.2 VOH High-level output voltage 25°C 4 4.3 4 4.3 4 4.3 VVOH High-level output voltage R L = 10 kΩ Full range 3.8 3.8 3.8 V VOL Low-level output voltage VVOL Low-level output voltage Full range 0.95 0.95 0.95 V AVD Large-signal differential VO = 1.4 V to 4 V,R L = 10 kΩ V/ VAVD Large-signal differential voltage amplification VO = 1.4 V to 4 V,R L = 10 kΩ Full range 0.1 0.1 0.1 V/µV CMRR Common-mode rejection ratioVIC = VICRmin, R S = 50 Ω 25°C 85 100 87 102 90 105 dBCMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω Full range 80 82 85 dB kSVR Supply-voltage rejection ratioVCC = 5 V to 30 V 25°C 100 115 103 118 105 120 dBkSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC = 5 V to 30 V Full range 95 98 100 dB ICC Supply current 25°C 450 600 450 600 450 600 AICC Supply current VO = 2.5 V, No load Full range 600 600 600 µA ∆ICC Supply current change over VO = 2.5 V, No load Full range 37 37 37 µA∆ICC Supply current change over operating temperature range Full range 37 37 37 µA † Full range is −55°C to 125°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

24 POST OFFICE BOX 655303 DALLAS, TEXAS 75265•

TLE2022 electrical characteristics at specified free-air temperature, VCC =±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † TLE2022M TLE2022AM TLE2022BM UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT VIO Input offset voltage 25°C 150 500 120 300 70 150 VVIO Input offset voltage Full range 700 450 300 µV αVIO Temperature coefficient of Full range 2 2 2 V/°CαVIO Temperature coefficient of input offset voltage Full range 2 2 2 µV/°C Input offset voltage long-term VIC = 0, R S = 50 Ω 25°C 0.006 0.006 0.006 V/moInput offset voltage long-term drift (see Note 4) VIC = 0, R S = 50 Ω 25°C 0.006 0.006 0.006 µV/mo IIO Input offset current 25°C 0.5 6 0.4 6 0.3 6 nAIIO Input offset current Full range 10 10 10 nA IIB Input bias current 25°C 35 70 33 70 30 70 nAIIB Input bias current Full range 90 90 90 nA 25°C −15 to −15.3 to −15 to −15.3 to −15 to −15.3 to VICR Common-mode input R S = 50 Ω 13.5 to to 13.5 to to 13.5 to VVICR Common-mode input voltage range R S = 50 Ω −15 −15 −15 Vvoltage range Full range −15 to −15 to −15 toFull range to 13.2 to 13.2 to 13.2 VOM + Maximum positive peak 25°C 14 14.3 14 14.3 14 14.3 VVOM + Maximum positive peak output voltage swing R L = 10 kΩ Full range 13.9 13.9 13.9 V VOM− Maximum negative peak VVOM− Maximum negative peak output voltage swing Full range −13.6 −13.6 −13.6 V AVD Large-signal differential VO = ±10 V, R L = 10 kΩ 25°C 0.8 4 1 7 1.5 10 V/ VAVD Large-signal differential voltage amplification VO = ±10 V, R L = 10 kΩ Full range 0.8 1 1.5 V/µV CMRR Common-mode rejection ratioVIC = VICRmin, R S = 50 Ω 25°C 95 106 97 109 100 112 dBCMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω Full range 91 93 96 dB kSVR Supply-voltage rejection ratioVCC = ±2.5 V to ±15 V 25°C 100 115 103 118 105 120 dBkSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC ± = ±2.5 V to ±15 V Full range 95 98 100 dB ICC Supply current 25°C 550 700 550 700 550 700 AICC Supply current VO = 0, No load Full range 700 700 700 µA ∆ICC Supply current change over VO = 0, No load Full range 60 60 60 µA∆ICC Supply current change over operating temperature range Full range 60 60 60 µA † Full range is 0°C to 70°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 POST OFFICE BOX 655303 DALLAS, TEXAS 75265• 25 TLE2024 electrical characteristics at specified free-air temperature, VCC = 5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † TLE2024M TLE2024AM TLE2024BM UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT VIO Input offset voltage 25°C 1100 850 600 VVIO Input offset voltage Full range 1300 1050 800 µV αVIO Temperature coefficient of input offset voltage Full range 2 2 2 µV/°C Input offset voltage long-term drift (see Note 4) VIC = 0, R S = 50 Ω 25°C 0.005 0.005 0.005 µV/mo IIO Input offset current IC S 25°C 0.6 6 0.5 6 0.4 6 nAIIO Input offset current Full range 10 10 10 nA IIB Input bias current 25°C 45 70 40 70 35 70 nAIIB Input bias current Full range 90 90 90 nA VICR Common-mode input voltage R S = 50 Ω 25°C to 3.5 −0.3 to to 3.5 −0.3 to to 3.5 −0.3 to VVICR Common-mode input voltage range R S = 50 Ω Full range to 3.2 to 3.2 to 3.2 V VOM+ VVOM+ Maximum positive peak output voltage swing R L = 10 kΩ Full range 3.7 3.7 3.8 V VOM− Maximum negative peak VVOM− Maximum negative peak output voltage swing Full range 0.95 0.95 0.95 V AVD Large-signal differential VO = 1.4 V to 4 V,R L = 10 kΩ V/ VAVD Large-signal differential voltage amplification VO = 1.4 V to 4 V,R L = 10 kΩ Full range 0.1 0.1 0.1 V/µV CMRR Common-mode rejection ratioVIC = VICRmin, R S = 50 Ω 25°C 80 90 82 92 85 95 dBCMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω Full range 80 82 85 dB kSVR Supply-voltage rejection ratioVCC = ±2.5 V to ±15 V 25°C 98 112 100 115 103 117 dBkSVR Supply-voltage rejection ratio (∆VCC ±/∆VIO) VCC ± = ±2.5 V to ±15 V Full range 93 95 98 dB ICC Supply current 25°C 800 1200 800 1200 800 1200 AICC Supply current VO = 0, No load Full range 1200 1200 1200 µA ∆ICC Supply current change over operating temperature range VO = 0, No load Full range 50 50 50 µA † Full range is −55°C to 125°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

26 POST OFFICE BOX 655303 DALLAS, TEXAS 75265•

TLE2024 electrical characteristics at specified free-air temperature, VCC = ±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † TLE2024M TLE2024AM TLE2024BM UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT VIO Input offset voltage 25°C 1000 750 500 VVIO Input offset voltage Full range 1200 950 700 µV αVIO Temperature coefficient of input offset voltage Full range 2 2 2 µV/°C Input offset voltage long-term drift (see Note 4) VIC = 0, R S = 50 Ω 25°C 0.006 0.006 0.006 µV/mo IIO Input offset current IC S 25°C 0.6 6 0.5 6 0.4 6 nAIIO Input offset current Full range 10 10 10 nA IIB Input bias current 25°C 50 70 45 70 40 70 nAIIB Input bias current Full range 90 90 90 nA VICR Common-mode input voltage R S = 50 Ω 25°C −15 to 13.5 −15.3 to −15 to 13.5 −15.3 to −15 to 13.5 −15.3 to VVICR Common-mode input voltage range R S = 50 Ω Full range −15 to 13.2 −15 to 13.2 −15 to 13.2 V VOM+ VVOM+ Maximum positive peak output voltage swing R L = 10 kΩ Full range 13.7 13.7 13.8 V VOM− Maximum negative peak output VVOM− Maximum negative peak output voltage swing Full range −13.6 −13.6 −13.6 V AVD Large-signal differential VO = ±10 V, R L = 10 kΩ 25°C 0.4 2 0.8 4 1 7 V/ VAVD Large-signal differential voltage amplification VO = ±10 V, R L = 10 kΩ Full range 0.4 0.8 1 V/µV CMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω 25°C 92 102 94 105 97 108 dBCMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω Full range 88 90 93 dB kSVR Supply-voltage rejection ratioVCC = ± 2.5 V to ±15 V 25°C 98 112 100 115 103 117 dBkSVR Supply-voltage rejection ratio (∆VCC ±/∆VIO) VCC ± = ± 2.5 V to ±15 V Full range 93 95 98 dB ICC Supply current 25°C 1050 1400 1050 1400 1050 1400 AICC Supply current VO = 0, No load Full range 1400 1400 1400 µA ∆ICC Supply current change over VO = 0, No load Full range 85 85 85 µA∆ICC Supply current change over operating temperature range Full range 85 85 85 µA † Full range is −55°C to 125°C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 POST OFFICE BOX 655303 DALLAS, TEXAS 75265• 27 TLE2021 operating characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS TA C SUFFIX I SUFFIX M SUFFIX UNITPARAMETER TEST CONDITIONS TA MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT SR Slew rate at unity gain VO = 1 V to 3 V,See Figure 1 25°C 0.5 0.5 0.5 V/µs Vn Equivalent input noise voltagef = 10 Hz 25°C 21 50 21 50 21 nV/HzVn Equivalent input noise voltage (see Figure 2) f = 1 kHz 25°C 17 30 17 30 17 nV/Hz VN(PP) Peak-to-peak equivalent inputf = 0.1 to 1 Hz 25°C 0.16 0.16 0.16 VVN(PP ) Peak-to-peak equivalent input noise voltage f = 0.1 to 10 Hz 25°C 0.47 0.47 0.47 µV In Equivalent input noise current 25°C 0.09 0.09 0.9 pA/Hz B1 Unity-gain bandwidth See Figure 3 25°C 1.2 1.2 1.2 MHz φm Phase margin at unity gain See Figure 3 25°C 42° 42° 42° TLE2021 operating characteristics at specified free-air temperature, VCC = ±15 V PARAMETER TEST CONDITIONS TA † C SUFFIX I SUFFIX M SUFFIX UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT SR Slew rate at unity gain VO = 1V to 3 V,See Figure 1 V/ sSR Slew rate at unity gain V O = 1V to 3 V,See Figure 1Full range 0.45 0.42 0.45 V/µs Vn Equivalent input noise voltagef = 10 Hz 25°C 19 50 19 50 19 nV/HzVn Equivalent input noise voltage (see Figure 2) f = 1 kHz 25°C 15 30 15 30 15 nV/Hz VN(PP) Peak-to-peak equivalent inputf = 0.1 to 1 Hz 25°C 0.16 0.16 0.16 VVN(PP ) Peak-to-peak equivalent input noise voltage f = 0.1 to 10 Hz 25°C 0.47 0.47 0.47 µV In Equivalent input noise current 25°C 0.09 0.09 0.09 pA/Hz B1 Unity-gain bandwidth See Figure 3 25°C 2 2 2 MHz φm Phase margin at unity gain See Figure 3 25°C 46° 46° 46° † Full range is 0°C to 70°C for the C-suffix devices, −40°C to 85°C for the I-suffix devices, and −55°C to 125°C for the M-suffix devices.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

28 POST OFFICE BOX 655303 DALLAS, TEXAS 75265•

TLE2022 operating characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS C SUFFIX I SUFFIX M SUFFIX UNITPARAMETER TEST CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT SR Slew rate at unity gain VO = 1 V to 3 V,See Figure 1 0.5 0.5 0.5 V/µs Vn Equivalent input noise voltage f = 10 Hz 21 50 21 50 21 nV/√HzVn Equivalent input noise voltage (see Figure 2) f = 1 kHz 17 30 17 30 17 nV/√Hz VN(PP) Peak-to-peak equivalent input noise voltage f = 0.1 to 1 Hz 0.16 0.16 0.16 VVN(PP ) Peak-to-peak equivalent input noise voltagef = 0.1 to 10 Hz 0.47 0.47 0.47 µV In Equivalent input noise current 0.1 0.1 0.1 pA/√Hz B1 Unity-gain bandwidth See Figure 3 1.7 1.7 1.7 MHz φm Phase margin at unity gain See Figure 3 47° 47° 47° TLE2022 operating characteristics at specified free-air temperature, VCC = ±15 V PARAMETER TEST CONDITIONS TA † C SUFFIX I SUFFIX M SUFFIX UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT SR Slew rate at unity gain VO = ±10 V, See Figure 1 V/ sSR Slew rate at unity gain V O = ±10 V, See Figure 1 Full range 0.45 0.42 0.4 V/µs Vn Equivalent input noise f = 10 Hz 25°C 19 50 19 50 19 nV/√HzVn Equivalent input noise voltage (see Figure 2) f = 1 kHz 25°C 15 30 15 30 15 nV/√Hz VN(PP) Peak-to-peak equivalent f = 0.1 to 1 Hz 25°C 0.16 0.16 0.16 VVN(PP ) Peak-to-peak equivalent input noise voltage f = 0.1 to 10 Hz 25°C 0.47 0.47 0.47 µV In Equivalent input noise current 25°C 0.1 0.1 0.1 pA/√Hz B1 Unity-gain bandwidth See Figure 3 25°C 2.8 2.8 2.8 MHz φm Phase margin at unity gain See Figure 3 25°C 52° 52° 52° † Full range is 0°C to 70°C.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044/C0032/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082/C0032/C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068/C0032/C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082/C0032/C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076/C0032/C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 POST OFFICE BOX 655303 DALLAS, TEXAS 75265• 29 TLE2024 operating characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS C SUFFIX I SUFFIX M SUFFIX UNITPARAMETER TEST CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT SR Slew rate at unity gain VO = 1 V to 3 V,See Figure 1 0.5 0.5 0.5 V/µs Vn Equivalent input noise voltage (see Figure 2) f = 10 Hz 21 50 21 50 21 nV/√HzVn Equivalent input noise voltage (see Figure 2)f = 1 kHz 17 30 17 30 17 nV/√Hz VN(PP) Peak-to-peak equivalent input noise voltage f = 0.1 to 1 Hz 0.16 0.16 0.16 VVN(PP ) Peak-to-peak equivalent input noise voltagef = 0.1 to 10 Hz 0.47 0.47 0.47 µV In Equivalent input noise current 0.1 0.1 0.1 pA/√Hz B1 Unity-gain bandwidth See Figure 3 1.7 1.7 1.7 MHz φm Phase margin at unity gain See Figure 3 47° 47° 47° TLE2024 operating characteristics at specified free-air temperature, VCC = ±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † C SUFFIX I SUFFIX M SUFFIX UNITPARAMETER TEST CONDITIONS TA † MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT SR Slew rate at unity gain VO = ±10 V, See Figure 1 V/ sSR Slew rate at unity gain V O = ±10 V, See Figure 1 Full range 0.45 0.42 0.4 V/µs Vn Equivalent input noise voltage f = 10 Hz 25°C 19 50 19 50 19 nV/√HzVn Equivalent input noise voltage (see Figure 2) f = 1 kHz 25°C 15 30 15 30 15 nV/√Hz VN(PP) Peak-to-peak equivalent input noisef = 0.1 to 1 Hz 25°C 0.16 0.16 0.16 VVN(PP ) Peak-to-peak equivalent input noise voltage f = 0.1 to 10 Hz 25°C 0.47 0.47 0.47 µV In Equivalent input noise current 25°C 0.1 0.1 0.1 pA/√Hz B1 Unity-gain bandwidth See Figure 3 25°C 2.8 2.8 2.8 MHz φm Phase margin at unity gain See Figure 3 25°C 52° 52° 52° † Full range is 0°C to 70°C.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

30 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLE2021Y electrical characteristics at VCC = 5 V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS TLE2021Y UNITPARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIO Input offset voltage 150 µV Input offset voltage long-term drift (see Note 4) VIC = 0, R S = 50 Ω 0.005 µV/mo IIO Input offset current VIC = 0, R S = 50 Ω 0.5 nA IIB Input bias current 35 nA VICR Common-mode input voltage range R S = 50 Ω − 0.3 to V VOH Maximum high-level output voltage R L = 10 kΩ 4.3 V VOL Maximum low-level output voltage R L = 10 kΩ 0.7 V AVD Large-signal differential voltage amplification VO = 1.4 to 4 V,R L = 10 kΩ 1.5 V/µV CMRR Common-mode rejection ratio VIC = VICR min, R S = 50 Ω 100 dB kSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC = 5 V to 30 V 115 dB ICC Supply current VO = 2.5 V, No load 400 µA NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. TLE2021Y operating characteristics at VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS TLE2021Y UNITPARAMETER TEST CONDITIONS MIN TYP MAX UNIT SR Slew rate at unity gain VO = 1 V to 3 V 0.5 V/µs Vn Equivalent input noise voltage f = 10 Hz 21 nV/√HzVn Equivalent input noise voltage f = 1 kHz 17 nV/√Hz VN(PP) Peak-to-peak equivalent input noise voltage f = 0.1 to 1 Hz 0.16 VVN(PP ) Peak-to-peak equivalent input noise voltage f = 0.1 to 10 Hz 0.47 µV In Equivalent input noise current 0.1 pA/√Hz B1 Unity-gain bandwidth 1.7 MHz φm Phase margin at unity gain 47°

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 31POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TLE2022Y electrical characteristics, VCC = 5 V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS TLE2022Y UNITPARAMETER TEST CONDITIONS MIN TYP MAX UNIT VIO Input offset voltage 150 600 µV Input offset voltage long-term drift (see Note 4) VIC = 0, R S = 50 Ω 0.005 µV/mo IIO Input offset current VIC = 0, R S = 50 Ω 0.5 nA IIB Input bias current 35 nA VICR Common-mode input voltage range R S = 50 Ω − 0.3 to V VOH Maximum high-level output voltage R L = 10 kΩ 4.3 V VOL Maximum low-level output voltage R L = 10 kΩ 0.7 V AVD Large-signal differential voltage amplificationVO = 1.4 to 4 V,R L= 10 kΩ 1.5 V/µV CMRR Common-mode rejection ratio VIC = VICR min, R S = 50 Ω 100 dB kSVR Supply-voltage rejection ratio (∆VCC ± /∆VIO) VCC = 5 V to 30 V 115 dB ICC Supply current VO = 2.5 V, No load 450 µA NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. TLE2022Y operating characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS TLE2022Y UNITPARAMETER TEST CONDITIONS MIN TYP MAX UNIT SR Slew rate at unity gain VO = 1 V to 3 V,See Figure 1 0.5 V/µs Vn Equivalent input noise voltage (see Figure 2) f = 10 Hz 21 nV/√HzVn Equivalent input noise voltage (see Figure 2) f = 1 kHz 17 nV/√Hz VN(PP) Peak-to-peak equivalent input noise voltage f = 0.1 to 1 Hz 0.16 VVN(PP ) Peak-to-peak equivalent input noise voltage f = 0.1 to 10 Hz 0.47 µV In Equivalent input noise current 0.1 pA/√Hz B1 Unity-gain bandwidth See Figure 3 1.7 MHz φm Phase margin at unity gain See Figure 3 47°

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

32 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLE2024Y electrical characteristics, VCC = 5 V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS TLE2024Y UNITPARAMETER TEST CONDITIONS MIN TYP MAX UNIT Input offset voltage long-term drift (see Note 4) 0.005 µV/mo IIO Input offset current VIC = 0, R S = 50 Ω 0.6 nA IIB Input bias current VIC = 0, R S = 50 Ω 45 nA VICR Common-mode input voltage range R S = 50 Ω −0.3 to V VOH High-level output voltage R L = 10 kΩ 4.2 V VOL Low-level output voltage R L = 10 kΩ 0.7 V AVD Large-signal differential voltage amplification VO = 1.4 V to 4 V,R L = 10 kΩ 1.5 V/µV CMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω 90 dB kSVR Supply-voltage rejection ratio (∆VCC /∆VIO) VCC = 5 V to 30 V 112 dB ICC Supply current VO = 2.5 V, No load 800 µA NOTE 4. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. TLE2024Y operating characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS TLE2024Y UNITPARAMETER TEST CONDITIONS MIN TYP MAX UNIT SR Slew rate at unity gain VO = 1 V to 3 V,See Figure 1 0.5 V/µs Vn Equivalent input noise voltage (see Figure 2) f = 10 Hz 21 nV/√HzVn Equivalent input noise voltage (see Figure 2) f = 1 kHz 17 nV/√Hz VN(PP) Peak-to-peak equivalent input noise voltage f = 0.1 to 1 Hz 0.16 VVN(PP ) Peak-to-peak equivalent input noise voltage f = 0.1 to 10 Hz 0.47 µV In Equivalent input noise current 0.1 pA/√Hz B1 Unity-gain bandwidth See Figure 3 1.7 MHz φm Phase margin at unity gain See Figure 3 47°

34 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

NOTE A: CL includes fixture capacitance. Figure 4. Small-Signal Pulse-Response Test Circuit Typical values presented in this data sheet represent the median (50% point) of device parametric performance.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 35POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO Input offset voltage Distribution 5, 6, 7 IIB Input bias current vs Common-mode input voltage vs Free-air temperature 8, 9, 10 11, 12, 13 II Input current vs Differential input voltage 14 VOM Maximum peak output voltage vs Output current vs Free-air temperature 15, 16, 17 VOH High-level output voltage vs High-level output current vs Free-air temperature 19, 20 VOL Low-level output voltage vs Low-level output current vs Free-air temperature VO(PP) Maximum peak-to-peak output voltage vs Frequency 24, 25 AVD Large-signal differential voltage amplificationvs Frequency vs Free-air temperature 27, 28, 29 IOS Short-circuit output current vs Supply voltage vs Free-air temperature 30 − 33 34 − 37 ICC Supply current vs Supply voltage vs Free-air temperature 38, 39, 40 41, 42, 43 CMRR Common-mode rejection ratio vs Frequency 44, 45, 46 SR Slew rate vs Free-air temperature 47, 48, 49 Voltage-follower small-signal pulse response 50, 51 Voltage-follower large-signal pulse response 52 − 57 VN(PP) Peak-to-peak equivalent input noise voltage0.1 to 1 Hz 0.1 to 10 Hz Vn Equivalent input noise voltage vs Frequency 60 B1 Unity-gain bandwidth vs Supply voltage vs Free-air temperature 61, 62 63, 64 φm Phase margin vs Supply voltage vs Load capacitance vs Free-air temperature 65, 66 67, 68 69, 70 Phase shift vs Frequency 26

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

36 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

3000−300 600 VIO − Input Offset Voltage − µV Percentage of Units − % −600 ÏÏÏÏ P Package VCC ± = ±15 V

231 Units Tested From 1 Wafer Lot

TA = 25°C −450 −150 150 450 Figure 6 −600 Percentage of Units − % VIO − Input Offset Voltage − µV 200 −400 −200 0 400 600 DISTRIBUTION OF TLE2022 INPUT OFFSET VOLTAGE ÏÏÏÏÏÏÏÏÏÏÏ

398 Amplifiers Tested From 1 Wafer Lot

VCC ± = ±15 V TA = 25°C P Package Figure 7 Percentage of Units − % VIO − Input Offset Voltage − mV −0.5 0 0.5

796 Amplifiers Tested From 1 Wafer Lot

VCC ± = ±15 V TA = 25°C N Package DISTRIBUTION OF TLE2024 INPUT OFFSET VOLTAGE Figure 8 TA = 25°C VCC ± = ±15 V −35 −30 −25 −20 −15 −10 1050−5−10 −40 VIC − Common-Mode Input Voltage − V IIB − Input Bias Current − nA −15 IBI TLE2021 INPUT BIAS CURRENT vs COMMON-MODE INPUT VOLTAGE

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

38 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TA − Free-Air Temperature − °C −75 IIB − Input Bias Current − nA −60 −20 −50 −25 0 25 50 75 100 −50 −30 −40 125 ÁÁ ÁÁ IIB ÏÏÏ ÏÏÏ ÏÏÏ VO = 0 VIC = 0 ÏÏÏÏÏ VCC ± = ±15 V TLE2024 INPUT BIAS CURRENT † vs FREE-AIR TEMPERATURE Figure 14 TA = 25°C VIC = 0 VCC ± = ±15 V 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 |VID| − Differential Input Voltage − V II − Input Current − mA INPUT CURRENT vs DIFFERENTIAL INPUT VOLTAGE II Figure 15 VOM − Maximum Peak Output Voltage − V IO − Output Current − mA 2 4 6 8 VCC ± = ±15 V TA = 25°C ÁÁÁ ÁÁÁ ÁÁÁ VOM ÏÏÏÏ ÏÏÏÏ VOM− ÏÏÏÏ ÏÏÏÏ VOM+ TLE2021 MAXIMUM PEAK OUTPUT VOLTAGE vs OUTPUT CURRENT Figure 16 VOM| − Maximum Peak Output Voltage − V |IO | − Output Current − mA 24 6 TA = 25°C 81 0 1 2 ÁÁ ÁÁ |VOM ÏÏÏ ÏÏÏ VOM+ ÏÏÏÏ ÏÏÏÏ VOM− VCC ± = ±15 V TLE2022 MAXIMUM PEAK OUTPUT VOLTAGE vs OUTPUT CURRENT † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

40 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

−75 TA − Free-Air Temperature − °C 125 −50 −25 0 25 50 75 100 4.2 4.6 4.8 VOH − High-Level Output Voltage − V VCC = 5 V R L = 10 kΩ No Load HIGH-LEVEL OUTPUT VOLTAGE † vs FREE-AIR TEMPERATURE ÁÁ ÁÁ VOH 4.4 Figure 22 VOL − Low-Level Output Voltage − V IOL − Low-Level Output Current − mA 30 0.5 1 1.5 2 2.5 VCC = 5 V TA = 25°C LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT ÁÁ ÁÁ ÁÁ VOL Figure 23 −75 TA − Free-Air Temperature − °C 125 −50 −25 0 25 50 75 100 0.25 0.5 0.75 IOL = 1 mA IOL = 0 VCC ± = ±5 V LOW-LEVEL OUTPUT VOLTAGE † vs FREE-AIR TEMPERATURE VOL − Low-Level Output Voltage − V ÁÁÁ ÁÁÁ VOL Figure 24 100 VOPP − Maximum Peak-to-Peak Output Voltage − V f − Frequency − Hz 1 M0 1 k 10 k 100 k MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ TA = 25°C VCC =5 V R L = 10 kΩ ÁÁ ÁÁ ÁÁ VO(PP) † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 41POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TYPICAL CHARACTERISTICS Figure 25 100 f − Frequency − Hz 1 M 1 k 10 k 100 k MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ TA = 25°C VCC ± = ± 15 V R L = 10 kΩ VOPP − Maximum Peak-to-Peak Output Voltage − V ÁÁ ÁÁ ÁÁ ÁÁ VO(PP) ÏÏÏÏÏ ÏÏÏÏÏ VCC ± = ±15 V ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ R L = 10 kΩ C L = 30 pF TA = 25°C Phase Shift AVD 180° 60° 200° 160° 140° 120° 100° 80°100

1 M100 k10 k1 k100

−20 10 M 120 f − Frequency − Hz LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY ÏÏÏÏÏ ÏÏÏÏÏ Phase Shift VCC = 5 V − Large-Signal DifferentialA VD Voltage Amplification − dB Figure 26

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

42 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

R L = 10 kΩ ÏÏÏÏ ÏÏÏÏ VCC = 5 V 1007550250−25−50 125 TA − Free-Air Temperature − °C −75 ÏÏÏÏÏÏ ÏÏÏÏÏÏ VCC ± = ±15 V VµV/Voltage Amplification − − Large-Signal DifferentialA VD TLE2021 LARGE-SCALE DIFFERENTIAL VOLTAGE AMPLIFICATION † vs FREE-AIR TEMPERATURE Figure 28 −75 TA − Free-Air Temperature − °C 125 −50 −25 0 25 50 75 100 VCC = 5 V VCC ± = ±15 V R L = 10 kΩ AVD − Large-Signal Differential ÁÁ ÁÁ ÁÁ A VD Voltage Amplification − V/µV TLE2022 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION † vs FREE-AIR TEMPERATURE Figure 29 VCC ± = ±5 V 1007550250−25−50 125 TA − Free-Air Temperature − °C −75 ÏÏÏÏÏ ÏÏÏÏÏ VCC ± = ±15 V ÏÏÏÏÏ ÏÏÏÏÏ R L = 10 kΩ VµV/Voltage Amplification − A − Large-Signal DifferentialVD TLE2024 LARGE-SCALE DIFFERENTIAL VOLTAGE AMPLIFICATION † vs FREE-AIR TEMPERATURE Figure 30 ÏÏÏÏÏ VID = 100 mV TA = 25°C VID = −100 mV VO = 0 1412108642 −10 |VCC ±| − Supply Voltage − V IOS − Short-Circuit Output Current − mA ÁÁ ÁÁ OSI TLE2021 SHORT-CIRCUIT OUTPUT CURRENT vs SUPPLY VOLTAGE † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

44 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

−75 125 −10 −50 −25 02 5 5 0 7 5 100 VID = −100 mVVCC = 5 V VO = 5 V TA − Free-Air Temperature −°C IOS − Short-Circuit Output Current − mAIOS ÏÏÏÏÏ VID = 100 mV ÏÏÏ ÏÏÏ VO = 0 TLE2022 AND TLE2024 SHORT-CIRCUIT OUTPUT CURRENT † vs FREE-AIR TEMPERATURE Figure 36 −75 IOS − Short-Circuit Output Current − mA TA − Free-Air Temperature − °C 125 −12 −50 −25 0 25 50 75 100 VO = 0 VCC ± = ±15 V VID = −100 mV VID = 100 mV ÁÁ ÁÁ OSI TLE2021 SHORT-CIRCUIT OUTPUT CURRENT † vs FREE-AIR TEMPERATURE Figure 37 −75 TA − Free-Air Temperature − °C 125 −15 −10 VO = 0 VID = −100 mV VID = 100 mV VCC ± = ±15 V IOS − Short-Circuit Output Current − mA −50 −25 0 25 50 75 100 IOS TLE2022 AND TLE2024 SHORT-CIRCUIT OUTPUT CURRENT † vs FREE-AIR TEMPERATURE Figure 38 ICC − Supply Current − ua |VCC ±| − Supply Voltage − V 250 100 150 200 2 4 6 8 10 12 14 VO = 0 No Load ÁÁ ÁÁ CCI Aµ ÏÏÏÏ ÏÏÏÏ TA = 25°C ÏÏÏÏ ÏÏÏÏ TA = 125°C ÏÏÏÏ ÏÏÏÏ TA = −55°C TLE2021 SUPPLY CURRENT vs SUPPLY VOLTAGE † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

46 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

−75 125−50 −25 0 25 50 75 100 TA − Free-Air Temperature − °C 1000 800 600 400 200 ÏÏÏÏÏ ÏÏÏÏÏ VCC ± = ±15 V ÏÏÏÏÏ VCC ± = ±2.5 V VO = 0 No Load − Supply Current −µ AICC TLE2024 SUPPLY CURRENT † vs FREE-AIR TEMPERATURE Figure 44 TA = 25°C ÏÏÏÏÏ ÏÏÏÏÏ VCC = 5 V ÏÏÏÏÏ ÏÏÏÏÏ VCC ± = ±15 V 100 f − Frequency − Hz CMRR − Common-Mode Rejection Ratio − dB TLE2021 COMMON-MODE REJECTION RATIO vs FREQUENCY Figure 45 CMRR − Common-Mode Rehection Ratio − dB f − Frequency − Hz 120 10 M 100 1 k 10 k 100 k 1 M 100 VCC ± = ±15 V VCC = 5 V ÏÏÏÏÏ TA = 25°C TLE2022 COMMON-MODE REJECTION RATIO vs FREQUENCY Figure 46 CMRR − Common-Mode Rejection Ratio − dB f − Frequency − Hz 120 10 M 100 1 k 10 k 100 k 1 M 100 ÏÏÏÏ ÏÏÏÏ VCC = 5 V TA = 25°C ÏÏÏÏÏ ÏÏÏÏÏ VCC ± = ±15 V TLE2024 COMMON-MODE REJECTION RATIO vs FREQUENCY † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

48 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TA = 25°C C L = 30 pF ÏÏÏÏÏ See Figure 4 R L = 10 kΩ t − Time − µs VCC = 5 V 2.5 6040200 2.4 2.6 VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE VO − Output Voltage − V ÁÁÁ ÁÁÁ VO 2.55 2.45 Figure 52 t − Time − µs 0 20 40 60 VCC = 5 V R L = 10 kΩ C L = 30 pF TA = 25°C ÏÏÏÏÏ ÏÏÏÏÏ See Figure 1 VO − Output Voltage − V ÁÁ ÁÁ VO TLE2021 VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE Figure 53 t − Time − µs 0 20 40 60 VCC = 5 V R L = 10 kΩ C L = 30 pF TA = 25°C See Figure 1 VO − Output Voltage − V ÁÁÁ ÁÁÁ VO TLE2022 VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE Figure 54 t − Time − µs 0 20 40 60 ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ VCC ± = 5 V R L = 10 kΩ C L = 30 pF TA = 25°C See Figure 1 VO − Output Voltage − VVO TLE2024 VOLTAGE-FOLLOWER LARGE-SCALE PULSE RESPONSE

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007 49POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TYPICAL CHARACTERISTICS Figure 55 VO − Output Voltage − V t − Time − µs −15 0 20 40 60 −10 VCC ± = ±15 V R L = 10 kΩ C L = 30 pF TA = 25°C See Figure 1 ÁÁ ÁÁ VO TLE2021 VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE Figure 56 VO − Output Voltage − V t − Time − µs −15 0 20 40 60 −10 ÏÏÏÏÏÏ ÏÏÏÏÏÏ VCC ± = ±15 V R L = 10 kΩ C L = 30 pF TA = 25°C See Figure 1 ÁÁ ÁÁ VO TLE2022 VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE Figure 57 VO − Output Voltage − V t − Time − µs −15 0 20 40 60 −10 ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ VCC ± = ±15 V R L = 10 kΩ C L = 30 pF TA = 25°C See Figure 1 VO TLE2024 VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE Figure 58 0.5 − 0.5 1 2 3 4 5 6 7 8 9 − 0.4 − 0.3 − 0.2 − 0.1 0.1 0.2 0.3 0.4 t − Time − s ÏÏÏÏÏÏ ÏÏÏÏÏÏ VCC ± = ±15 V TA = 25°C PEAK-TO-PEAK EQUIVALENT INPUT NOISE VOLTAGE

0.1 TO 1 Hz

VNPP − Peak-to-Peak Equivalent Input Noise Voltage − uVVµ ÁÁ ÁÁ ÁÁ VN(PP)

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

50 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

t − Time − s 0.4 0.3 0.2 0.1 − 0.1 − 0.2 − 0.3 − 0.4 − 0.5 0.5 9876543211 00 VCC ± = ±15 V TA = 25°C PEAK-TO-PEAK EQUIVALENT INPUT NOISE VOLTAGE

0.1 TO 10 Hz

VNPP − Peak-to-Peak Equivalent Input Noise Voltage − uVVµ ÁÁÁ ÁÁÁ ÁÁÁ VN(PP) Figure 60 Vn − Equivalent Input Noise Voltage − nVHz f − Frequency − Hz 200 10 k 120 160 10 100 1 k EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY V n ÁÁ ÁÁ ÁÁ nV/ Hz ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ ÏÏÏÏÏ ÏÏÏÏÏ VCC ± = ±15 V R S = 20 Ω ÏÏÏÏ TA = 25°C ÏÏÏÏÏ ÏÏÏÏÏ See Figure 2 Figure 61 B1 − Unity-Gain Bandwidth − MHz 2 4 6 8 10 12 14 See Figure 3 TA = 25°C C L = 30 pF R L = 10 kΩ B 1 |VCC ±| − Supply Voltage − V TLE2021 UNITY-GAIN BANDWIDTH vs SUPPLY VOLTAGE Figure 62 1412108642 |VCC ±| − Supply Voltage − V B1 − Unity-Gain Bandwidth − MHz B 1 ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ R L = 10 kΩ C L = 30 pF TA = 25°C See Figure 3 TLE2022 AND TLE2024 UNITY-GAIN BANDWIDTH vs SUPPLY VOLTAGE

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

52 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

C L − Load Capacitance − pF 60° 100 20 40 60 80 10° 20° 30° 40° 50° R L = 10 kΩ TA = 30 pF See Figure 3 VCC ± = ±15 V VCC = 5 V m − Phase Margin ÁÁ ÁÁ ÁÁ mφ TLE2021 PHASE MARGIN vs LOAD CAPACITANCE Figure 68 ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ 80604020 VCC = 5 V See Figure 3 TA = 25°C R L = 10 kΩ 60° 50° 40° 30° 20° 10° 100 70° C L − Load Capacitance − pF m − Phase Margin ÁÁ ÁÁ mφ VCC ± = ±15 V TLE2022 AND TLE2024 PHASE MARGIN vs LOAD CAPACITANCE Figure 69 −75 m − Phase Margin TA − Free-Air Temperature − °C 50° 125 36° −50 −25 0 25 50 75 100 38° 40° 42° 44° 46° 48° R L = 10 kΩ C L = 30 pF See Figure 3 VCC ± = ±15 V VCC = 5 V Á Á mφ TLE2021 PHASE MARGIN † vs FREE-AIR TEMPERATURE Figure 70 42° 1007550250−25−50 VCC = 5 V VCC ± = ±15 V 52° 50° 48° 46° 44° 40° 125 54° TA − Free-Air Temperature − °C −75 m − Phase Margin ÁÁ ÁÁ mφ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ See Figure 3 C L = 30 pF R L = 10 kΩ TLE2022 AND TLE2024 PHASE MARGIN † vs FREE-AIR TEMPERATURE † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

/C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0065/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0066/C0044 /C0084/C0076/C0069/C0050/C0048/C0050/C0120/C0089 /C0069/C0088/C0067/C0065/C0076/C0073/C0066/C0085/C0082 /C0072/C0073/C0071/C0072/C0262/C0083/C0080/C0069/C0069/C0068 /C0076/C0079/C0087/C0262/C0080/C0079/C0087/C0069/C0082 /C0080/C0082/C0069/C0067/C0073/C0083/C0073/C0079/C0078 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 /C0261 SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007

54 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

APPLICATION INFORMATION

Macromodel information provided was derived using MicrosimParts, the model generation software used with Microsim PSpice. The Boyle macromodel (see Note 5) and subcircuit in Figure 73, Figure 74, and Figure 75 were generated using the TLE202x typical electrical and operating characteristics at 25°C. Using this information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases): /C0068Unity-gain frequency /C0068Common-mode rejection ratio /C0068Phase margin /C0068DC output resistance /C0068AC output resistance /C0068Short-circuit output current limit /C0068Maximum positive output voltage swing /C0068Maximum negative output voltage swing /C0068Slew rate /C0068Quiescent power dissipation /C0068Input bias current /C0068Open-loop voltage amplification of Solid-State Circuits, SC-9, 353 (1974). OUT − + VCC+ rp IN− IN+ VCC− rc1 Q1 Q2 cee Iee rc2 ve de dp vc dc egnd vb fb gcm ga vlim ro1 ro2 hlim dip din vinvip ree re1 re2 Figure 73. Boyle Subcircuit PSpice and Parts are trademarks of MicroSim Corporation.

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) 5962-9088101M2A ACTIVE LCCC FK 20 TBD Call TI Call TI 5962-9088101MPA ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type 5962-9088102M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type 5962-9088102MPA ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type 5962-9088104Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type 5962-9088104QPA ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type 5962-9088105Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type 5962-9088105QPA ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type 5962-9088106Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type 5962-9088106QCA ACTIVE CDIP J 14 1 TBD A42 SNPB N / A for Pkg Type 5962-9088107Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type 5962-9088107QPA ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type 5962-9088108Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type 5962-9088108QPA ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type TLE2021ACD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021ACDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021ACDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021ACDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021ACP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2021ACPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2021AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021AIP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2021AIPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2021AMFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type TLE2021AMJGB ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type TLE2021BMFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type TLE2021BMJG ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type TLE2021BMJGB ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type TLE2021CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021CDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM PACKAGE OPTION ADDENDUM www.ti.com 12-Oct-2007 Addendum-Page 1

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) no Sb/Br) TLE2021CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2021CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2021CPWLE OBSOLETE TSSOP PW 8 TBD Call TI Call TI TLE2021CPWR ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021CPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2021IPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2021MD ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM TLE2021MDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2021MFKB OBSOLETE LCCC FK 20 TBD Call TI Call TI TLE2021MJG ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type TLE2021MJGB ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type TLE2022ACD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022ACDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022ACDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022ACDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022ACP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2022ACPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2022AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022AIP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type PACKAGE OPTION ADDENDUM www.ti.com 12-Oct-2007 Addendum-Page 2

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) TLE2022AIPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2022AMD ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM TLE2022AMDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022AMDR ACTIVE SOIC D 8 2500 TBD CU NIPDAU Level-1-220C-UNLIM TLE2022AMDRG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022AMFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type TLE2022AMJG OBSOLETE CDIP JG 8 TBD Call TI Call TI TLE2022AMJGB ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type TLE2022BCDR OBSOLETE SOIC D 8 TBD Call TI Call TI TLE2022BMFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type TLE2022BMJG OBSOLETE CDIP JG 8 TBD Call TI Call TI TLE2022BMJGB ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type TLE2022CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022CDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2022CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2022CPSR OBSOLETE SO PS 8 TBD Call TI Call TI TLE2022ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2022IPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2022MD ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM TLE2022MDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022MDR ACTIVE SOIC D 8 2500 TBD CU NIPDAU Level-1-220C-UNLIM TLE2022MDRG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2022MFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type TLE2022MJG ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type TLE2022MJGB ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type PACKAGE OPTION ADDENDUM www.ti.com 12-Oct-2007 Addendum-Page 3

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) TLE2024ACDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024ACDWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024ACDWR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024ACDWRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024ACN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2024ACNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2024AIDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024AIDWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024AIN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2024AINE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2024AMFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type TLE2024AMFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type TLE2024AMJ ACTIVE CDIP J 14 1 TBD A42 SNPB N / A for Pkg Type TLE2024AMJB ACTIVE CDIP J 14 1 TBD A42 SNPB N / A for Pkg Type TLE2024BCDW OBSOLETE SOIC DW 16 TBD Call TI Call TI TLE2024BCN OBSOLETE PDIP N 14 TBD Call TI Call TI TLE2024BIDW OBSOLETE SOIC DW 16 TBD Call TI Call TI TLE2024BIN OBSOLETE PDIP N 14 TBD Call TI Call TI TLE2024CDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024CDWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024CDWR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024CDWRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024CN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2024CNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2024IDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024IDWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TLE2024IN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2024INE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TLE2024MDW ACTIVE SOIC DW 16 40 TBD CU NIPDAU Level-1-220C-UNLIM PACKAGE OPTION ADDENDUM www.ti.com 12-Oct-2007 Addendum-Page 4

(1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 12-Oct-2007 Addendum-Page 5

TAPE AND REEL BOX INFORMATION Device Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant TLE2021ACDR D 8 SITE 60 330 12 6.4 5.2 2.1 8 12 Q1 TLE2021CDR D 8 SITE 60 330 12 6.4 5.2 2.1 8 12 Q1 TLE2021CPWR PW 8 SITE 41 330 12 7.0 3.6 1.6 8 12 Q1 TLE2021IDR D 8 SITE 60 330 12 6.4 5.2 2.1 8 12 Q1 TLE2022ACDR D 8 SITE 27 330 12 6.4 5.2 2.1 8 12 Q1 TLE2022ACDR D 8 SITE 60 330 12 6.4 5.2 2.1 8 12 Q1 TLE2022AIDR D 8 SITE 27 330 12 6.4 5.2 2.1 8 12 Q1 TLE2022AIDR D 8 SITE 60 330 12 6.4 5.2 2.1 8 12 Q1 TLE2022CDR D 8 SITE 27 330 12 6.4 5.2 2.1 8 12 Q1 TLE2022CDR D 8 SITE 60 330 12 6.4 5.2 2.1 8 12 Q1 TLE2022IDR D 8 SITE 27 330 12 6.4 5.2 2.1 8 12 Q1 TLE2022IDR D 8 SITE 60 330 12 6.4 5.2 2.1 8 12 Q1 TLE2024ACDWR DW 16 SITE 60 330 16 10.75 10.7 2.7 12 16 Q1 TLE2024CDWR DW 16 SITE 60 330 16 10.75 10.7 2.7 12 16 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 5-Nov-2007 Pack Materials-Page 1

Device Package Pins Site Length (mm) Width (mm) Height (mm) TLE2021ACDR D 8 SITE 60 346.0 346.0 29.0 TLE2021CDR D 8 SITE 60 346.0 346.0 29.0 TLE2021CPWR PW 8 SITE 41 346.0 346.0 29.0 TLE2021IDR D 8 SITE 60 346.0 346.0 29.0 TLE2022ACDR D 8 SITE 27 342.9 336.6 20.64 TLE2022ACDR D 8 SITE 60 346.0 346.0 29.0 TLE2022AIDR D 8 SITE 27 342.9 336.6 20.64 TLE2022AIDR D 8 SITE 60 346.0 346.0 29.0 TLE2022CDR D 8 SITE 27 342.9 336.6 20.64 TLE2022CDR D 8 SITE 60 346.0 346.0 29.0 TLE2022IDR D 8 SITE 27 342.9 336.6 20.64 TLE2022IDR D 8 SITE 60 346.0 346.0 29.0 TLE2024ACDWR DW 16 SITE 60 346.0 346.0 33.0 TLE2024CDWR DW 16 SITE 60 346.0 346.0 33.0 PACKAGE MATERIALS INFORMATION www.ti.com 5-Nov-2007 Pack Materials-Page 2

MCER001A – JANUARY 1995 – REVISED JANUARY 1997 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.310 (7,87) 0.290 (7,37) 0.014 (0,36) 0.008 (0,20) Seating Plane 4040107/C 08/96 0.065 (1,65) 0.045 (1,14) 0.020 (0,51) MIN 0.400 (10,16) 0.355 (9,00) 0.015 (0,38) 0.023 (0,58) 0.063 (1,60) 0.015 (0,38) 0.200 (5,08) MAX 0.130 (3,30) MIN 0.245 (6,22) 0.280 (7,11) 0.100 (2,54) 0°–15° NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification. E. Falls within MIL STD 1835 GDIP1-T8

MLCC006B – OCTOBER 1996 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 4040140/D 10/96

28 TERMINAL SHOWN

B 0.358 (9,09) MAX (11,63) 0.560 (14,22) 0.560 0.458 0.858 (21,8) 1.063 (27,0) (14,22) ANO. OF MINMAX 0.358 0.660 0.761 0.458 0.342 (8,69) MIN (11,23) (16,26) 0.640 0.739 0.442 (9,09) (11,63) (16,76) 0.962 1.165 (23,83) 0.938 (28,99) 1.141 (24,43) (29,59) (19,32)(18,78) 0.020 (0,51) TERMINALS 0.080 (2,03) 0.064 (1,63) (7,80) 0.307 (10,31) 0.406 (12,58) 0.495 (12,58) 0.495 (21,6) 0.850 (26,6) 1.047 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.035 (0,89) 0.010 (0,25) 121314151618 17 432 0.020 (0,51) 0.010 (0,25) 12826 27 B SQ A SQ 0.055 (1,40) 0.045 (1,14) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a metal lid. D. The terminals are gold plated. E. Falls within JEDEC MS-004

MPDI001A – JANUARY 1995 – REVISED JUNE 1999 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 P (R-PDIP-T8) PLASTIC DUAL-IN-LINE 0.015 (0,38) Gage Plane 0.325 (8,26) 0.300 (7,62) 0.010 (0,25) NOM MAX 0.430 (10,92) 4040082/D 05/98 0.200 (5,08) MAX 0.125 (3,18) MIN 0.355 (9,02) 0.020 (0,51) MIN 0.070 (1,78) MAX 0.240 (6,10) 0.260 (6,60) 0.400 (10,60) 0.015 (0,38) 0.021 (0,53) Seating Plane M0.010 (0,25) 0.100 (2,54) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0,65 M0,10 0,10 0,25 0,50 0,75 0,15 NOM Gage Plane 9,80 9,60 7,90 7,70 2016 6,60 6,40 4040064/F 01/97 0,30 6,60 6,20 0,19 4,30 4,50 0,15 A 1,20 MAX 5,10 4,90 3,10 2,90 A MAX A MIN DIM PINS ** 0,05 4,90 5,10 Seating Plane 0°–8° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-153

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Product Information

TLE2021ACDG4 specifications and overview.

Summary

EXCALIBUR HIGH-SPEED LOW-POWER PRECISION OPERATIONAL AMPLIFIERS

Description

EXCALIBUR HIGH-SPEED LOW-POWER PRECISION OPERATIONAL AMPLIFIERS

Source title TLE2021ACDG4 Datasheet(PDF) - Texas Instruments

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