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TLC04/MF4A-50, TLC14/MF4A-100 BUTTERWORTH FOURTH-ORDER LOW-PASS SWITCHED-CAPACITOR FILTERS SLAS021A – NOVEMBER 1986 – REVISED MARCH 1995 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068Low Clock-to-Cutoff-Frequency Ratio Error TLC04/MF4A-5 0... ± 0.8% TLC14/MF4A-100 . . .± 1% /C0068Filter Cutoff Frequency Dependent Only on External-Clock Frequency Stability /C0068Minimum Filter Response Deviation Due to External Component Variations Over Time and Temperature /C0068Cutoff Frequency Range From 0.1 Hz to 30 kHz, V CC ± = ± 2.5 V /C00685-V to 12-V Operation /C0068Self Clocking or TTL-Compatible and CMOS-Compatible Clock Inputs /C0068Low Supply-Voltage Sensitivity /C0068Designed to be Interchangeable With National MF4-50 and MF4-100

description

The TLC04/MF4A-50 and TLC14/MF4A-100 are monolithic Butterworth low-pass switched-capacitor filters. Each is designed as a low-cost, easy-to-use device providing accurate fourth-order low-pass filter functions in circuit design configurations. Each filter features cutoff frequency stability that is dependent only on the external-clock frequency stability. The cutoff frequency is clock tunable and has a clock-to-cutoff frequency ratio of 50:1 with less than ± 0. 8% error for the TLC04/MF4A-50 and a clock-to-cutoff frequency ratio of 100:1 with less than ± 1% error for the TLC14/MF4A-100. The input clock features self-clocking or TTL- or CMOS-compatible options in conjunction with the level shift (LS) terminal. The TLC04C/MF4A-50C and TLC14C/MF4A-100C are characterized for operation from 0°C to 70°C. The TLC04I/MF4A-50I and TLC14I/MF4A-100I are characterized for operation from –40°C to 85°C. The TLC04M/MF4A-50M and TLC14M/MF4A-100M are characterized over the full military temperature range of –55°C to 125°C. AVAILABLE OPTIONS CLOCK TO CUTOFF PACKAGE TA CLOCK -TO -CUTOFF FREQUENCY RATIO SMALL OUTLINE PLASTIC DIPFREQUENCY RATIO (D) (P) 0°C to 70°C 50:1 100:1 TLC04CD/MF4A-50CD TLC14CD/MF4A-100CD TLC04CP/MF4A-50CP TLC14CP/MF4A-100CP –40°C to 85°C 50:1 100:1 TLC04ID/MF4A-50ID TLC14ID/MF4A-100ID TLC04IP/MF4A-50IP TLC14IP/MF4A-100IP –55°C to 125°C 50:1 100:1 TLC04MP/MF4A-50MP TLC14MP/MF4A-100MP The D package is available taped and reeled. Add the suffix R to the device type (e.g., TLC04CDR/MF4A-50CDR). Copyright  1995, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. CLKIN CLKR LS VCC– FILTER IN V CC+ AGND FILTER OUT D OR P PACKAGE (TOP VIEW)

TLC04/MF4A-50, TLC14/MF4A-100 BUTTERWORTH FOURTH-ORDER LOW-PASS SWITCHED-CAPACITOR FILTERS SLAS021A – NOVEMBER 1986 – REVISED MARCH 1995

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φ2φ1 Butterworth Fourth-Order Low-Pass Filter Nonoverlapping Clock Generator 2CLKR 1CLKIN 3LS Level Shift FILTER IN Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION AGND 6 I Analog ground. The noninverting input to the operational amplifiers of the Butterworth fourth-order low-pass filter. CLKIN 1 I Clock in. CLKIN is the clock input terminal for CMOS-compatible clock or self-clocking options. For either option, LS is at VCC– . For self-clocking, a resistor is connected between CLKIN and CLKR and a capacitor is connected from CLKIN to ground. CLKR 2 I Clock R. CLKR is the clock input for a TTL-compatible clock. For a TTL clock, LS is connected to midsupply and CLKIN can be left open, but it is recommended that it be connected to either VCC+ or VCC– . FILTER IN 8 I Filter input FILTER OUT 5 O Butterworth fourth-order low-pass filter output LS 3 I Level shift. LS accommodates the various input clocking options. For CMOS-compatible clocks or self-clocking, LS is at VCC– and for TTL-compatible clocks, LS is at midsupply. VCC+ 7 I Positive supply voltage terminal VCC– 4 I Negative supply voltage terminal

TLC04/MF4A-50, TLC14/MF4A-100 BUTTERWORTH FOURTH-ORDER LOW-PASS SWITCHED-CAPACITOR FILTERS SLAS021A – NOVEMBER 1986 – REVISED MARCH 1995 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† TLC04M/MF4A-50M, TLC14M/MF4A-100M –55 °C to 125°C. . . † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to the AGND terminal. recommended operating conditions TLC04/MF4A-50 TLC14/MF4A-100 UNIT MIN MAX MIN MAX UNIT Positive supply voltage, VCC+ 2.25 6 2.25 6 V Negative supply voltage, VCC– –2.25 –6 –2.25 –6 V High-level input voltage, VIH 2 2 V Low-level input voltage, VIL 0.8 0.8 V Clock frequency flk (see Note 2) VCC ± = ± 2.5 V 5 1.5x106 5 1.5x106 HzClock frequency, fclock (see Note 2) VCC ± = ± 5 V 5 2x10 6 5 2x10 6 H z Cutoff frequency, fco (see Note 3) 0.1 40x10 3 0.05 20x10 3 Hz TLC04C/MF4A-50C, TLC14C/MF4A-100C 0 70 0 70 Operating free-air temperature, TA TLC04I/MF4A-50I, TLC14I/MF4A-100I –40 85 –40 85 °C TLC04M/MF4A-50M, TLC14M/MF4A-100M –55 125 –55 125 NOTES: 2. Above 250 kHz, the input clock duty cycle should be 50% to allow the operational amplifiers the maximum time to settle while processing analog samples. 3. The cutoff frequency is defined as the frequency where the response is 3.01 dB less than the dc gain of the filter. electrical characteristics over recommended operating free-air temperature range, VCC+ = 2.5 V, VCC– = –2.5 V, fclock ≤ 250 kHz (unless otherwise noted) filter section PARAMETER TEST CONDITIONS TLC04/MF4A-50 TLC14/MF4A-100 UNITPARAMETER TEST CONDITIONS MIN TYP ‡ MAX MIN TYP ‡ MAX UNIT VOO Output offset voltage 25 50 mV VOM Peak output voltage VOM+ R L =1 0kΩ 1.8 2 1.8 2 VVOM Peak output voltage VOM– R L = 10 kΩ V IOS Short circuit output current Source TA =2 5°C See Note 4 –0.5 –0.5 mAIOS Short-circuit output current Sink TA = 25°C , See Note 4 4 4 mA ICC Supply current fclock = 250 kHz 1.2 2.25 1.2 2.25 mA ‡ All typical values are at TA = 25°C. NOTE 4: IOS(source) is measured by forcing the output to its maximum positive voltage and then shorting the output to the VCC– terminal IOS(sink) is measured by forcing the output to its maximum negative voltage and then shorting the output to the VCC+ terminal.

TLC04/MF4A-50, TLC14/MF4A-100 BUTTERWORTH FOURTH-ORDER LOW-PASS SWITCHED-CAPACITOR FILTERS SLAS021A – NOVEMBER 1986 – REVISED MARCH 1995

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range, VCC+ = 5 V, VCC– = –5 V, fclock ≤ 250 kHz (unless otherwise noted) filter section PARAMETER TEST TLC04/MF4A-50 TLC14/MF4A-100 UNITPARAMETER CONDITIONS MIN TYP † MAX MIN TYP † MAX UNIT VOO Output offset voltage 150 200 mV VOM Peak output voltage VOM+ R L =1 0kΩ 3.75 4.3 3.75 4.5 VVOM Peak output voltage VOM– R L = 10 kΩ V IOS Short circuit output current Source TA = 25°C, –2 –2 mAIOS Short-circuit output current Sink A , See Note 4 5 5 mA ICC Supply current fclock = 250 kHz 1.8 3 1.8 3 mA kSVS Supply voltage sensitivity (see Figures 1 and 2) –30 –30 dB † All typical values are at TA = 25°C. NOTE 4: IOS(source) is measured by forcing the output to its maximum positive voltage and then shorting the output to the VCC– terminal. IOS(sink) is measured by forcing the output to its maximum negative voltage and then shorting the output to the VCC+ terminal. clocking section PARAMETER TEST CONDITIONS MIN TYP † MAX UNIT VIT Positive going input threshold voltage VCC+ = 10 V,VCC– = 0 6.1 7 8.9 VVIT+ Positive-going input threshold voltage VCC+ = 5 V, VCC– = 0 3.1 3.5 4.4 V VIT Negative going input threshold voltage CLKIN VCC+ = 10 V,VCC– = 0 1.3 3 3.8 VVIT– Negative-going input threshold voltage CLKIN VCC+ = 5 V, VCC– = 0 0.6 1.5 1.9 V Vh Hysteresis voltage (VIT VIT ) VCC+ = 10 V,VCC– = 0 2.3 4 7.6 VVhys H ysteresis voltage (VIT+ – VIT–) VCC+ = 5 V, VCC– = 0 1.2 2 3.8 V VOH High level output voltage VCC = 10 V IO =1 0 µA VVOH High-level output voltage VCC = 5 V IO = –10 µA 4.5 V VOL Low level output voltage VCC = 10 V IO =1 0µA VVOL Low-level output voltage VCC = 5 V IO = 10 µA 0.5 V Input leakage current CLKR VCC = 10 V LS at midsupply, 2 µAInput leakage current CLKR VCC = 5 V TA = 25°C 2 µA VCC = 10 V CLKR and CLKIN –3 –7 mA IO Output current VCC = 5 V shortened to VCC– –0.75 –2 mA IO O utput current VCC = 10 V CLKR and CLKIN 3 7 mA VCC = 5 V shortened to VCC+ 0.75 2 mA † All typical values are at TA = 25°C.

TLC04/MF4A-50, TLC14/MF4A-100 BUTTERWORTH FOURTH-ORDER LOW-PASS SWITCHED-CAPACITOR FILTERS SLAS021A – NOVEMBER 1986 – REVISED MARCH 1995 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 operating characteristics over recommended operating free-air temperature range, VCC+ = 2.5 V, VCC– = –2.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TLC04/MF4A-50 TLC14/MF4A-100 UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN TYP † MAX UNIT Maximum clock frequency, fmax See Note 2 1.5 3 1.5 3 MHz Clock-to-cutoff-frequency ratio (fclock/fco) fclock ≤ 250 kHz, TA = 25°C 49.27 50.07 50.87 99 100 101 Hz/Hz Temperature coefficient of clock-to-cutoff frequency ratio fclock ≤ 250 kHz ± 25 ± 25 ppm/°C fco = 5 kHz, f lk 250 kHz dB Frequency response above and below fclock = 250 kHz, dB qy cutoff frequency (see Note 5) fco = 5 kHz, f lk 250 kHz dBfclock = 250 kHz, dB Dynamic range (see Note 6) TA = 25°C 80 78 dB Stop-band frequency attentuation at 2 fco fclock ≤ 250 kHz 24 25 24 25 dB Voltage amplification, dc fclock ≤ 250 kHz, RS ≤ 2 kΩ –0.15 0 0.15 –0.15 0 0.15 dB Peak-to-peak clock feedthrough voltageTA = 25°C 5 5 mV † All typical values are at TA = 25°C. NOTES: 2. Above 250 kHz, the input clock duty cycle should be 50% to allow the operational amplifiers the maximum time to settle while processing analog samples. 5. The frequency responses at f are referenced to a dc gain of 0 dB. 6. The dynamic range is referenced to 1.06 V rms (1.5 V peak) where the wideband noise over a 30-kHz bandwidth is typically 106 µV rms for the TLC04/MF4A-50 and 135 µV rms for the TLC14/MF4A-100. operating characteristics over recommended operating free-air temperature range, VCC+ = 5 V, VCC– = –5 V (unless otherwise noted) PARAMETER TEST CONDITIONS TLC04/MF4A-50 TLC14/MF4A-100 UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN TYP † MAX UNIT Maximum clock frequency, fmax See Note 2 2 4 2 4 MHz Clock-to-cutoff-frequency ratio (fclock/fco) fclock ≤ 250 kHz, TA = 25°C 49.58 49.98 50.38 99 100 101 Hz/Hz Temperature coefficient of clock-to-cutoff frequency ratio fclock ≤ 250 kHz ± 15 ± 15 ppm/°C fco = 5 kHz, f lk 250 kHz dB Frequency response above and below fclock = 250 kHz, dB qy cutoff frequency (see Note 5) fco = 5 kHz, f lk 250 kHz dBfclock = 250 kHz, dB Dynamic range (see Note 6) TA = 25°C 86 84 dB Stop-band frequency attentuation at 2 fco fclock ≤ 250 kHz 24 25 24 25 dB Voltage amplification, dc fclock ≤ 250 kHz, RS ≤ 2 kΩ –0.15 0 0.15 –0.15 0 0.15 dB Peak-to-peak clock feedthrough voltageTA = 25°C 7 7 mV † All typical values are at TA = 25°C. NOTES: 2. Above 250 kHz, the input clock duty cycle should be 50% to allow the operational amplifiers the maximum time to settle while processing analog samples. 5. The frequency responses at f are referenced to a dc gain of 0 dB. 6. The dynamic range is referenced to 2.82 V rms (4 V peak) where the wideband noise over a 30-kHz bandwidth is typically 142 µV rms for the TLC04/MF4A-50 and 178 µV rms for the TLC14/MF4A-100.

TLC04/MF4A-50, TLC14/MF4A-100 BUTTERWORTH FOURTH-ORDER LOW-PASS SWITCHED-CAPACITOR FILTERS SLAS021A – NOVEMBER 1986 – REVISED MARCH 1995

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Filter Output – dB Supply Voltage VCC+ Ripple Frequency – kHz VCC– = –5 V Filter in at 0 V fclock = 250 kHz (0 to 40 kHz) VCC+ = 5 V + 50-mV Sine Wave – 10 – 20 – 30 – 40 – 50 – 60 4035302520151050 FILTER OUTPUT vs SUPPLY VOLTAGE V CC+ RIPPLE FREQUENCY Figure 1 Filter Output – dB 0 5 10 15 20 25 30 35 40 VCC– = –5 V + 50-mV Sine Wave (0 to 40 kHz) VCC+ = 5 V Filter in at 0 V fclock = 250 kHz Supply Voltage VCC– Ripple Frequency – kHz FILTER OUTPUT vs SUPPLY VOLTAGE V CC– RIPPLE FREQUENCY – 10 – 20 – 30 – 40 – 50 – 60 Figure 2

TLC04/MF4A-50, TLC14/MF4A-100 BUTTERWORTH FOURTH-ORDER LOW-PASS SWITCHED-CAPACITOR FILTERS SLAS021A – NOVEMBER 1986 – REVISED MARCH 1995 7POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

APPLICATION INFORMATION

–5 V CMOS CLKIN –5 V 5 V 5 V VCC–

6 AGND

8 FILTER IN

2 CLKR

1 CLKIN

φ1 φ2 Figure 3. CMOS-Clock-Driven Dual-Supply Operation Figure 4. TTL-Clock-Driven Dual-Supply Operation

TLC04/MF4A-50, TLC14/MF4A-100 BUTTERWORTH FOURTH-ORDER LOW-PASS SWITCHED-CAPACITOR FILTERS SLAS021A – NOVEMBER 1986 – REVISED MARCH 1995

8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

V CC –V IT– V CC –V IT/C0041 /C0467/C0466 V IT/C0041 V IT– /C0467/C0427 For VCC = 10 V fclock = 1 1.69 RC –5 V 5 V VCC–

8 FILTER IN FILTER

φ1 φ2 Filter Input R C Filter Output Figure 5. Self-Clocking Through Schmitt-Trigger Oscillator Dual-Supply Operation

TLC04/MF4A-50, TLC14/MF4A-100 BUTTERWORTH FOURTH-ORDER LOW-PASS SWITCHED-CAPACITOR FILTERS SLAS021A – NOVEMBER 1986 – REVISED MARCH 1995 9POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

5 VOCFILTER IN

(see Note B) 10 kΩ 0.1 µF 10 kΩ See Note A –5 V 0 V TTL CLKR OUT CMOS CLKIN 0 V 10 V 10 V VCC– φ2φ1 Butterworth Fourth-Order Low-Pass Filter Nonoverlapping Clock Generator NOTES: A. The external clock used must be of CMOS level because the clock is input to a CMOS Schmitt trigger. B. The filter input signal should be dc-biased to midsupply or ac-coupled to the terminal. C. AGND must be biased to midsupply. Figure 6. External-Clock-Driven Single-Supply Operation

TLC04/MF4A-50, TLC14/MF4A-100 BUTTERWORTH FOURTH-ORDER LOW-PASS SWITCHED-CAPACITOR FILTERS SLAS021A – NOVEMBER 1986 – REVISED MARCH 1995

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C R 10 kΩ 10 kΩ 10 V VCC– φ2φ1 Butterworth Fourth-Order Low-Pass Filter Nonoverlapping Clock Generator V CC –V IT– V CC –V IT/C0041 /C0467/C0466 V IT/C0041 V IT– /C0467/C0427 For VCC = 10 V fclock = 1 1.69 RC See Note A 0.1 µF NOTE A: AGND must be biased to midsupply. Figure 7. Self Clocking Through Schmitt-Trigger Oscillator Single-Supply Operation

TLC04/MF4A-50, TLC14/MF4A-100 BUTTERWORTH FOURTH-ORDER LOW-PASS SWITCHED-CAPACITOR FILTERS SLAS021A – NOVEMBER 1986 – REVISED MARCH 1995 11POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 –5 V 10 kΩ Clock Input OUT 5 V VCC– φ2φ1 Butterworth Fourth-Order Low-Pass Filter Nonverlapping Clock Generator 0.1 µF Figure 8. DC Offset Adjustment

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TLC04IDR SOIC D 8 2500 350.0 350.0 43.0 Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) TLC04CD D SOIC 8 75 505.46 6.76 3810 4 TLC04CD.A D SOIC 8 75 505.46 6.76 3810 4 TLC04ID D SOIC 8 75 505.46 6.76 3810 4 TLC04ID.A D SOIC 8 75 505.46 6.76 3810 4 TLC14CD D SOIC 8 75 505.46 6.76 3810 4 TLC14CD.A D SOIC 8 75 505.46 6.76 3810 4 TLC14ID D SOIC 8 75 505.46 6.76 3810 4 TLC14ID.A D SOIC 8 75 505.46 6.76 3810 4 TLC14IDG4 D SOIC 8 75 505.46 6.76 3810 4 Pack Materials-Page 3

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