TL852 TI | Alldatasheet

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/C0084/C0076/C0056/C0053/C0050 /C0083/C0079/C0078/C0065/C0082 /C0082/C0065/C0078/C0071/C0073/C0078/C0071 /C0082/C0069/C0067/C0069/C0073/C0086/C0069/C0082 SLSS003 − SEPTEMBER 1983 − REVISED MARCH 1988 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 /C0068Designed for Use With the TL851 in Sonar Ranging Modules Like the SN28827 /C0068Digitally Controlled Variable-Gain Variable-Bandwidth Amplifier /C0068Operational Frequency Range of 20 kHz to 90 kHz /C0068TTL-Compatible /C0068Operates From Power Sources of 4.5 V to 6.8 V /C0068Interfaces to Electrostatic or Piezoelectric Transducers /C0068Overall Gain Adjustable With One External Resistor

description

The TL852 is an economical sonar ranging receiver integrated circuit for use with the TL851 control integrated circuit. A minimum of external components is required for operation, and this amplifier easily interfaces to Polaroid’s 50-kHz electrostatic transducer. An external 68-kΩ ±5% resistor from BIAS to GND provides the internal biasing reference. Amplifier gain can be set with a resistor from G1IN to GADJ. Required amplifier gain will vary for different applications. Using the detect-level measurement circuit of Figure 1, a nominal peak-to-peak value of 230 mV input during gain step 2 is recommended for most applications. For reliable operation, a level no lower than 50 mV should be used. The recommended detect level of 230 mV can be obtained for most amplifiers with an R1 value between 5 kΩ and 20 kΩ Digital control of amplifier gain is provided with gain control inputs GCA, GCB, GCC, and GCD. These inputs must be driven synchronously (all inputs stable within 0.1 µs) to avoid false receive output signals due to invalid logic counts. This can be done easily with the TL851 control integrated circuit. A plot showing relative gain for the various gain steps versus time can be seen in Figure 2. To dampen ringing of the 50-kHz electrostatic transducer, a 5-kΩ resistor from G1IN to XIN is recommended. An external parallel combination of inductance and capacitance between LC and V CC provides an amplifier with an externally controlled gain and Q. This not only allows control of gain to compensate for attenuation of signal with distance, but also maximizes noise and sidelobe rejection. Care must be taken to accurately tune the L-C combination at operating frequency or gain and Q will be greatly reduced at higher gain steps. AC coupling between stages of the amplifier is accomplished with a 0.01-mF capacitor for proper biasing. The receive output is normally held at a low level by an internal 1-µA current source. When an input of sufficient amplitude is received, the output is driven alternately by the 1-µA discharge current and a 50-µA charging current. A 1000-pF capacitor is required from REC to GND to integrate the received signal so that one or two noise pulses will not be recognized. XIN provides clamping for the transformer secondary when used for transducer transmit drive as shown in Figure 4 of the SN28827 data sheet. The TL852 is characterized for operation from 0°C to 40°C. Copyright  1988, Texas Instruments Incorporated/C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 G1IN XIN GADJ LC VCC G1OUT G2IN BIAS GND GCD GCA GCB GCC NC NC REC N PACKAGE (TOP VIEW) NC − No internal connection

/C0084/C0076/C0056/C0053/C0050 /C0083/C0079/C0078/C0065/C0082 /C0082/C0065/C0078/C0071/C0073/C0078/C0071 /C0082/C0069/C0067/C0069/C0073/C0086/C0069/C0082 SLSS003 − SEPTEMBER 1983 − REVISED MARCH 1988

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 functional block diagram Gain Control Reg Ref VCC − 2.1 V 0.3 V G2IN GCA GCB GCC GCD BIAS 0.7 V 50 µA 1 µA G1IN GADJ LC XIN GND REC G1OUT VCC schematic of gain control inputs VCC INPUT GND GCA, GCB, GCC, AND GCD

/C0084/C0076/C0056/C0053/C0050 /C0083/C0079/C0078/C0065/C0082 /C0082/C0065/C0078/C0071/C0073/C0078/C0071 /C0082/C0069/C0067/C0069/C0073/C0086/C0069/C0082 SLSS003 − SEPTEMBER 1983 − REVISED MARCH 1988 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond those indicated in the recommended operating conditions section of this specification is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: For operation above 25°C, derate linearly at the rate of 9.2 mW/°C. recommended operating conditions MIN MAX UNIT Supply voltage, VCC 4.5 6.8 V High-level input voltage, VIH GCA, GCB, GCC, GCD 2.1 VLow-level input voltage, VIL GCA, GCB, GCC, GCD 0.6 V Bias resistor between BIAS and GND 64 72 kΩ Operating free-air temperature, TA 0 40 °C electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP ‡ MAX UNIT Input clamp voltage at XIN II = 40 mA 2.5 VInput clamp voltage at XIN II = − 40 mA − 1.5 V Open-circuit input voltage at GCA, GCB, GCC, GCD VCC = 5 V, II = 0 2.5 V High-level input current, IIH, into GCA, GCB, GCC, GCD VCC = 5 V, VIH = 2 V − 0.5 mA Low-level input current, IIL, into GCA, GCB, GCC, GCD VCC = 5 V, VIL = 0 − 3 mA Raceive output current IG2IN = − 100 µA, VO = 0.3 V 1 ARaceive output current IG2IN = 100 µA, VO = 0.1 V − 50 µA Supply current, ICC 45 mA ‡ Typical values are at VCC = 5 V and TA = 25°C.

/C0084/C0076/C0056/C0053/C0050 /C0083/C0079/C0078/C0065/C0082 /C0082/C0065/C0078/C0071/C0073/C0078/C0071 /C0082/C0069/C0067/C0069/C0073/C0086/C0069/C0082 SLSS003 − SEPTEMBER 1983 − REVISED MARCH 1988

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443

APPLICATION INFORMATION

detect level versus gain step Detect level is measured by applying a 15-cycle burst of 49.4 kHz square wave just after the beginning of the gain step to be tested. The least burst amplitude that makes REC reach the trip level is defined to be the detect level. System gain is then inversely proportional to detect level. See the test circuit in Figure 1. 490 kΩ 5 kΩ 5 kΩ 0.01 µF 0.0022 µF 21 mH 500 pF 0.01 µF 1 mH VCC 1000 pF Trip Level Detect 15-Cycle 49.4-kHz Variable-Amplitude Burst Generator 68 kΩ BIAS G2IN G1OUT VCC LC GADJ XIN G1IN REC NC NC GCC GCB GCA GCD GND TL331

15 Pulses

All Resistors ±1%, 1/4 W All Capacitors ±1%, Film L1 Q > 60 at 50 kHz C1 Q > 500 at 50 kHz Figure 1. Detect-Level Measurement Circuit and Waveforms

/C0084/C0076/C0056/C0053/C0050 /C0083/C0079/C0078/C0065/C0082 /C0082/C0065/C0078/C0071/C0073/C0078/C0071 /C0082/C0069/C0067/C0069/C0073/C0086/C0069/C0082 SLSS003 − SEPTEMBER 1983 − REVISED MARCH 1988 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 L L L L L L L L H H H H L L L L H H H H L L L L L L H H L L H H L L H H L H L H L H L H L H L H Receiver Gain vs Gain Step Numbers 100 0.1 0.7 0.4 0.2 0123456789 1 0 1 1 Gain Steps Relative Receiver Gain Figure 2

www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TL852CDR Active Production SOIC (D) | 16 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM - TL852C TL852CDR.A Active Production SOIC (D) | 16 2500 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM See TL852CDR TL852C TL852CN Active Production PDIP (N) | 16 25 | TUBE Yes NIPDAU N/A for Pkg Type - TL852CN TL852CN.A Active Production PDIP (N) | 16 25 | TUBE Yes NIPDAU N/A for Pkg Type See TL852CN TL852CN TL852CNE4 Active Production PDIP (N) | 16 25 | TUBE Yes NIPDAU N/A for Pkg Type See TL852CN TL852CN (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TL852CDR SOIC D 16 2500 350.0 350.0 43.0 Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) TL852CN N PDIP 16 25 506 13.97 11230 4.32 TL852CN.A N PDIP 16 25 506 13.97 11230 4.32 TL852CNE4 N PDIP 16 25 506 13.97 11230 4.32 Pack Materials-Page 3

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