TL598MFKB

TL598 (Rev. D)

Document overview

• Manufacturer or author: Texas Instruments, Incorporated [SLVS053,D]
• PDF pages: 17

Technical content

/C0084/C0076/C0053/C0057/C0056 /C0080/C0085/C0076/C0083/C0069/C0262/C0087/C0073/C0068/C0084/C0072/C0262/C0077/C0079/C0068/C0085/C0076/C0065/C0084/C0073/C0079/C0078 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 /C0067/C0073/C0082/C0067/C0085/C0073/C0084/C0083 /C0261 SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068Complete PWM Power-Control Function /C0068Totem-Pole Outputs for 200-mA Sink or Source Current /C0068Output Control Selects Parallel or Push-Pull Operation /C0068Internal Circuitry Prohibits Double Pulse at Either Output /C0068Variable Dead-Time Provides Control Over Total Range /C0068Internal Regulator Provides a Stable 5-V Reference Supply, Trimmed to 1% Tolerance /C0068On-Board Output Current-Limiting Protection /C0068Undervoltage Lockout for Low-VCC Conditions /C0068Separate Power and Signal Grounds description/ordering information The TL598 incorporates all the functions required in the construction of pulse-width-modulated (PWM) controlled systems on a single chip. Designed primarily for power-supply control, the TL598 provides the systems engineer with the flexibility to tailor the power-supply control circuits to a specific application. The TL598 contains two error amplifiers, an internal oscillator (externally adjustable), a dead-time control (DTC) comparator, a pulse-steering flip-flop, a 5-V precision reference, undervoltage lockout control, and output control circuits. Two totem-pole outputs provide exceptional rise- and fall-time performance for power FET control. The outputs share a common source supply and common power ground terminals, which allow system designers to eliminate errors caused by high current-induced voltage drops and common-mode noise. The error amplifier has a common-mode voltage range of 0 V to V CC − 2 V. The DTC comparator has a fixed offset that prevents overlap of the outputs during push-pull operation. A synchronous multiple supply operation can be achieved by connecting RT to the reference output and providing a sawtooth input to CT. The TL598 device provides an output control function to select either push-pull or parallel operation. Circuit architecture prevents either output from being pulsed twice during push-pull operation. The output frequency for push-pull applications is one-half the oscillator frequency /C0466fO /C00431 2R TC T/C0467. For single-ended applications: fO /C00431 RT CT .

ORDERING INFORMATION

TA PACKAGE † ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP (N) Tube of 25 TL598CN TL598CN 0°C to 70°C SOIC (D) Tube of 40 TL598CD TL598C

0 C to 70C

SOIC (D) Reel of 2500 TL598CDR TL598C † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Copyright  2003, Texas Instruments Incorporated/C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 /C0261 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1IN+ 1IN− FEEDBACK DTC CT RT SIGNAL GND OUT1 2IN+ 2IN− REF OUTPUT CTRL VCC VC POWER GND OUT2 D OR N PACKAGE (TOP VIEW) ERROR AMP 1 ERROR AMP 2

/C0084/C0076/C0053/C0057/C0056 /C0080/C0085/C0076/C0083/C0069/C0262/C0087/C0073/C0068/C0084/C0072/C0262/C0077/C0079/C0068/C0085/C0076/C0065/C0084/C0073/C0079/C0078 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 /C0067/C0073/C0082/C0067/C0085/C0073/C0084/C0083 /C0261 SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003

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VI = GND Single-ended or parallel output VI = REF Normal push-pull operation functional block diagram GND SIGNAL REF VCC Reference Regulator Undervoltage Lockout Control GND POWER OUT2 OUT1 VC Pulse-Steering Flip-Flop FEEDBACK 1IN+ DTC CT RT PWM Comparator Error Amplifier Error Amplifier ≈0.1 V DTC Comparator Oscillator OUTPUT CTRL (see Function Table) 1IN− 2IN+ 2IN− 0.7 mA absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the signal ground terminal. 2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can impact reliability. 3. The package thermal impedance is calculated in accordance with JESD 51-7.

/C0084/C0076/C0053/C0057/C0056 /C0080/C0085/C0076/C0083/C0069/C0262/C0087/C0073/C0068/C0084/C0072/C0262/C0077/C0079/C0068/C0085/C0076/C0065/C0084/C0073/C0079/C0078 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 /C0067/C0073/C0082/C0067/C0085/C0073/C0084/C0083 /C0261 SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 recommended operating conditions MIN MAX UNIT VCC Supply voltage 7 40 V VI Amplifier input voltage 0 VCC −2 V IO Collector voltage 40 V IIL Output current (each output), sink or source 200 mA Current into feedback terminal 0.3 mA C T Timing capacitor 0.00047 10 µF R T Timing resistor 1.8 500 kΩ fosc Oscillator frequency 1 300 kHz TA Operating free-air temperature 0 70 °C electrical characteristics over recommended operating free-air temperature range, VCC = 15 V (unless otherwise noted) reference section (see Note 4) PARAMETER TEST CONDITIONS † MIN TYP ‡ MAX UNIT Output voltage (REF) IO = 1 mA TA = 25°C 4.95 5 5.05 VOutput voltage (REF) IO = 1 mA TA = full range 4.9 5.1 V Input regulation VCC = 7 V to 40 V TA = 25°C 2 25 mV Output regulation IO = 1 mA to 10 mA TA = 25°C 1 15 mVOutput regulation IO = 1 mA to 10 mA TA = full range 50 mV Output voltage change with temperature ∆TA = MIN to MAX 2 10 mV/V Short-circuit output current§ REF = 0 V −10 −48 mA † Full range is 0°C to 70°C. ‡ All typical values, except for parameter changes with temperature, are at TA = 25°C. § Duration of the short circuit should not exceed one second. NOTE 4: Pulse-testing techniques that maintain the junction temperature as close to the ambient temperature as possible must be used. oscillator section, CT = 0.001 µF, RT = 12 kΩ (see Figure 1) (see Note 4) PARAMETER TEST CONDITIONS † MIN TYP ‡ MAX UNIT Frequency 100 kHz Standard deviation of frequency¶ All values of VCC , CT, RT, TA constant 100 Hz/kHz Frequency change with voltage VCC = 7 V to 40 V,TA = 25°C 1 10 Hz/kHz Frequency change with temperature# ∆TA = full range 70 120 Hz/kHzFrequency change with temperature# ∆TA = full range, C T = 0.01 µF 50 80 Hz/kHz † Full range is 0°C to 70°C. ‡ All typical values, except for parameter changes with temperature, are at TA = 25°C. ¶ Standard deviation is a measure of the statistical distribution about the mean, as derived from the formula: # Effects of temperature on external RT and CT are not taken into account. NOTE 4. Pulse-testing techniques that maintain the junction temperature as close to the ambient temperature as possible must be used. /C0115/C0043 /C0525 N n/C00431 (xn /C0042X)2 N /C00421 /C0504

/C0084/C0076/C0053/C0057/C0056 /C0080/C0085/C0076/C0083/C0069/C0262/C0087/C0073/C0068/C0084/C0072/C0262/C0077/C0079/C0068/C0085/C0076/C0065/C0084/C0073/C0079/C0078 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 /C0067/C0073/C0082/C0067/C0085/C0073/C0084/C0083 /C0261 SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003

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electrical characteristics over recommended operating free-air temperature range, VCC = 15 V (unless otherwise noted) (continued) error amplifier section (see Note 4) PARAMETER TEST CONDITIONS MIN TYP † MAX UNIT Input offset voltage FEEDBACK = 2.5 V 2 10 mV Input offset current FEEDBACK = 2.5 V 25 250 nA Input bias current FEEDBACK = 2.5 V 0.2 1 µA Common-mode input voltage rangeVCC = 7 V to 40 V 0 to VCC −2 V Open-loop voltage amplification∆VO (FEEDBACK) = 3 V, VO (FEEDBACK) = 0.5 V to 3.5 V 70 95 dB Unity-gain bandwidth 800 kHz Common-mode rejection ratio VCC = 40 V, ∆VIC = 6.5 V, TA = 25°C 65 80 dB Output sink current (FEEDBACK) FEEDBACK = 0.5 V 0.3 0.7 mA Output source current (FEEDBACK)FEEDBACK = 3.5 V −2 mA Phase margin at unity gain FEEDBACK = 0.5 V to 3.5 V, R L = 2 kΩ 65° Supply-voltage rejection ratio FEEDBACK = 2.5 V, ∆VCC = 33 V, R L = 2 kΩ 100 dB † All typical values, except for parameter changes with temperature, are at TA = 25°C. NOTE 4. Pulse-testing techniques that maintain the junction temperature as close to the ambient temperature as possible must be used. electrical characteristics over recommended operating free-air temperature range, VCC =1 5V (unless otherwise noted) undervoltage lockout section (see Note 4) PARAMETER TEST CONDITIONS ‡ MIN MAX UNIT Threshold voltage TA = 25°C 4 6 VThreshold voltage ∆TA = full range 3.5 6.9 V Hysteresis§ TA = 25°C 100 mVHysteresis§ TA = full range 50 mV ‡ Full range is 0°C to 70°C. § Hysteresis is the difference between the positive-going input threshold voltage and the negative-going input threshold voltage. NOTE 4. Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible. output section (see Note 4) PARAMETER TEST CONDITIONS MIN MAX UNIT High-level output voltage VCC = 15 V, IO = −200 mA 12 VHigh-level output voltage VCC = 15 V, VC = 15 V IO = −20 mA 13 V Low-level output voltage VCC = 15 V, IO = 200 mA 2 VLow-level output voltage VCC = 15 V, VC = 15 V IO = 20 mA 0.4 V Output-control input current VI = Vref 3.5 mA Output-control input current VI = Vref VI = 0.4 V 100 µA NOTE 4. Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.

/C0084/C0076/C0053/C0057/C0056 /C0080/C0085/C0076/C0083/C0069/C0262/C0087/C0073/C0068/C0084/C0072/C0262/C0077/C0079/C0068/C0085/C0076/C0065/C0084/C0073/C0079/C0078 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 /C0067/C0073/C0082/C0067/C0085/C0073/C0084/C0083 /C0261 SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating free-air temperature range, VCC =1 5V (unless otherwise noted) (continued) dead-time control section (see Figure 1) (see Note 4) PARAMETER TEST CONDITIONS MIN TYP † MAX UNIT Input bias current (DTC) VI = 0 to 5.25 V −2 −10 µA Maximum duty cycle, each output DTC = 0 V 0.45 Input threshold voltage (DTC) Zero duty cycle 3 3.3 VInput threshold voltage (DTC) Maximum duty cycle 0 V † All typical values, except for parameter changes with temperature, are at TA = 25°C. NOTE 4. Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible. pwm comparator section (see Note 4) PARAMETER TEST CONDITIONS MIN TYP † MAX UNIT Input threshold voltage (FEEDBACK) DTC = 0 V 3.75 4.5 V Input sink current (FEEDBACK) V(FEEDBACK) = 0.5 V 0.3 0.7 mA † All typical values, except for parameter changes with temperature, are at TA = 25°C. NOTE Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible. total device (see Figure 1) (see Note 4) PARAMETER TEST CONDITIONS MIN TYP † MAX UNIT Standby supply current RT = Vref, All other inputs and outputs open VCC = 15 V 15 21 mAStandby supply current RT = Vref, All other inputs and outputs openVCC = 40 V 20 26 mA Average supply current DTC = 2 V 15 mA † All typical values, except for parameter changes with temperature, are at TA = 25°C. NOTE 4. Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible. switching characteristics, TA = 25°C (see Note 4) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Output-voltage rise time CL = 1500 pF, VC = 15 V, VCC = 15 V, See Figure 2 60 150 nsOutput-voltage fall time CL = 1500 pF, VC = 15 V, VCC = 15 V, See Figure 2 35 75 ns NOTE 4. Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.

6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Figure 1. Test Circuits Figure 2. Switching Output Configuration and Voltage Waveform

/C0084/C0076/C0053/C0057/C0056 /C0080/C0085/C0076/C0083/C0069/C0262/C0087/C0073/C0068/C0084/C0072/C0262/C0077/C0079/C0068/C0085/C0076/C0065/C0084/C0073/C0079/C0078 /C0067/C0079/C0078/C0084/C0082/C0079/C0076 /C0067/C0073/C0082/C0067/C0085/C0073/C0084/C0083 /C0261 SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003 7POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TYPICAL CHARACTERISTICS † Frequency variation (∆f) is the change in predicted oscillator frequency that occurs over the full temperature range. Figure 4 Df = 1%† 100 1 k 4 k 10 k 40 k 100 k 400 k 1 M − Oscillator Frequency − Hz OSCILLATOR FREQUENCY AND FREQUENCY VARIATION vs TIMING RESISTANCE 400 1 k 4 k 10 k 40 k 100 k −2% −1% C T = 1 µF 0.01 µF 0.001 µF VCC = 15 V R T − Timing Resistance − Ω 0.1 µF 1 k 10 k 100 k 1 M Amplifier Voltage Amplification − dB f − Frequency − Hz AMPLIFIER VOLTAGE AMPLIFICATION vs FREQUENCY VCC = 15 V ∆VO = 3 V TA = 25°C fosc Figure 3

www.ti.com 10-Jun-2014 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples 5962-9166801QEA OBSOLETE CDIP J 16 TBD Call TI Call TI -55 to 125 TL598CD ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL598C TL598CDG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL598C TL598CDR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL598C TL598CDRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL598C TL598CN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL598CN TL598CNE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL598CN TL598MFKB OBSOLETE LCCC FK 20 TBD Call TI Call TI -55 to 125 TL598MJB OBSOLETE CDIP J 16 TBD Call TI Call TI -55 to 125 TL598QD OBSOLETE SOIC D 16 TBD Call TI Call TI -40 to 125 TL598QDR OBSOLETE SOIC D 16 TBD Call TI Call TI -40 to 125 TL598QN OBSOLETE PDIP N 16 TBD Call TI Call TI -40 to 125 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

www.ti.com 10-Jun-2014 Addendum-Page 2 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 19-Mar-2008 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TL598CDR SOIC D 16 2500 333.2 345.9 28.6 PACKAGE MATERIALS INFORMATION www.ti.com 19-Mar-2008 Pack Materials-Page 2

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