TL35072 TI | Alldatasheet
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/C0084/C0076/C0051/C0120/C0048/C0055/C0049/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0049/C0065/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0050/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0050/C0065/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0052/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0052/C0065 /C0072/C0073/C0071/C0072/C0262/C0083/C0076/C0069/C0087/C0262/C0082/C0065/C0084/C0069/C0044 /C0083/C0073/C0078/C0071/C0076/C0069/C0262/C0083/C0085/C0080/C0080/C0076/C0089 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS097C − MARCH 1991 − REVISED AUGUST 1996 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 /C0068Wide Gain-Bandwidth Product. . . 4.5 MHz /C0068High Slew Rate. . . 13 V/µs /C0068Wide-Range Single-Supply Operation
4 V to 44 V
/C0068Wide Input Common-Mode Range Includes Ground (V CC− ) /C0068Low Total Harmonic Distortion. . . 0.02% /C0068Low Input Offset Voltage...3 m V Max (A Suffix) /C0068Large Output Voltage Swing −14.7 V to 14 V (With ±15-V Supplies) /C0068Large Capacitance Drive Capability 10,000 pF /C0068Excellent Phase Margin...6 0° /C0068Excellent Gain Margin. . . 12 dB /C0068Output Short-Circuit Protection OFSET N1 IN− IN+ VCC− /GND NC VCC+ OUT OFSET N2 D OR P PACKAGE (SINGLE, TOP VIEW) NC − No internal connection 1OUT 1IN− 1IN+ VCC− /GND VCC+ 2OUT 2IN− 2IN+ D OR P PACKAGE (DUAL, TOP VIEW) 1OUT 1IN− 1IN+ VCC+ 2IN+ 2IN− 2OUT NC 4OUT 4IN− 4IN+ VCC− /GND 3IN+ 3IN− 3OUT NC (QUAD, TOP VIEW) DW PACKAGE 1OUT 1IN− 1IN+ VCC+ 2IN+ 2IN− 2OUT 4OUT 4IN− 4IN+ VCC− /GND 3IN+ 3IN− 3OUT N PACKAGE (QUAD, TOP VIEW) AVAILABLE OPTIONS PACKAGE TA COMPLEXITY PLASTIC DIP SMALL OUTLINETA COMPLEXITY STANDARD GRADE PRIME GRADE STANDARD GRADE PRIME GRADE 0°C Single TL34071P TL34071AP TL34071D TL34071AD0 C to Single Dual TL34071P TL34072P TL34071AP TL34072AP TL34071D TL34072D TL34071AD TL34072ADto 70°C Dual Quad TL34072P TL34074N TL34072AP TL34074AN TL34072D TL34074DW TL34072AD TL34074ADW −40°C Single TL33071P TL33071AP TL33071D TL33071AD−40 C to Single Dual TL33071P TL33072P TL33071AP TL33072AP TL33071D TL33072D TL33071AD TL33072ADto 105°C Dual Quad TL33072P TL33074N TL33072AP TL33074AN TL33072D TL33074DW TL33072AD TL33074ADW −55°C Single TL35071P TL35071AP TL35071D TL35071AD−55 C to Single Dual TL35071P TL35072P TL35071AP TL35072AP TL35071D TL35072D TL35071AD TL35072ADto 125°C Dual Quad TL35072P TL35074N TL35072AP TL35074AN TL35072D TL35074DW TL35072AD TL35074ADW D and DW packages are available taped and reeled. Add R suffix to device type (e.g., TL34071ADR). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. /C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046 Copyright 1996, Texas Instruments Incorporated
/C0084/C0076/C0051/C0120/C0048/C0055/C0049/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0049/C0065/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0050/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0050/C0065/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0052/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0052/C0065 /C0072/C0073/C0071/C0072/C0262/C0083/C0076/C0069/C0087/C0262/C0082/C0065/C0084/C0069/C0044 /C0083/C0073/C0078/C0071/C0076/C0069/C0262/C0083/C0085/C0080/C0080/C0076/C0089 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS097C − MARCH 1991 − REVISED AUGUST 1996
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
description
Quality, low cost, bipolar fabrication with innovative design concepts are employed for the TL33071/2/4, TL34071/2/4, and TL35071/2/4 series of monolithic operational amplifiers. This series of operational amplifiers offers 4.5 MHz of gain bandwidth product, 13 V/µs slew rate, and fast settling time without the use of JFET device technology. Although this series can be operated from split supplies, it is particularly suited for single-supply operation since the common-mode input voltage range includes ground potential (V CC− ). With a Darlington transistor input stage, this series exhibits high input resistance, low input offset voltage, and high gain. The all-npn output stage, characterized by no dead-band crossover distortion and large output voltage swing, provides high-capacitance drive capability, excellent phase and gain margins, low open-loop high-frequency output impedance, and symmetrical source/sink ac frequency response. The TL34071/2/4 devices are avaliable in standard or prime performance (A-suffix) grades and are specified over the commercial (0°C to 70°C) temperature range. The TL33071/2/4 devices are available in standard or prime performance (A-suffix) grades and are specified over industrial/vehicular (−40°C to 105°C) temperature range. The TL35071/2/4 devices are avaliable in standard or prime performance (A-suffix) grades and are specified over the military (−55°C to 125°C) temperature range. These low-cost amplifiers are available in single, dual, and quad configurations and are pin compatible with the MC33071/2/4, MC34071/2/4, and MC35071/2/4 series of amplifiers. Packaging options include standard plastic DIP and SO packages. symbol OFFSET N1 IN+ IN− OFFSET N2 OUT Single OUT IN+ IN− Dual and Quad (per amplifier)
/C0084/C0076/C0051/C0120/C0048/C0055/C0049/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0049/C0065/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0050/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0050/C0065/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0052/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0052/C0065 /C0072/C0073/C0071/C0072/C0262/C0083/C0076/C0069/C0087/C0262/C0082/C0065/C0084/C0069/C0044 /C0083/C0073/C0078/C0071/C0076/C0069/C0262/C0083/C0085/C0080/C0080/C0076/C0089 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS097C − MARCH 1991 − REVISED AUGUST 1996 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC− . 2. Differential voltages are at the noninverting input with respect to the inverting input. Excessive current flows if input is brought below VCC− −0.3 V. 3. The output can be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C DERATING FACTOR TA = 70°C TA = 105°C TA = 125°C PACKAGE TA ≤ 25C POWER RATING DERATING FACTOR ABOVE T A = 25°C TA = 70C POWER RATING TA = 105C POWER RATING TA = 125C POWER RATING D 725 mW 5.8 mW/°C 464 mW 261 mW 145 mWD DW 725 mW 1025 mW 5.8 mW/ C 8.2 mW/°C 464 mW 656 mW 261 mW 369 mW 145 mW 205 mWDW N P 1025 mW 1150 mW 1000 mW 8.2 mW/ C 9.2 mW/°C 8.0 mW/ C 656 mW 736 mW 640 mW 369 mW 414 mW 360 mW 205 mW 230 mW 200 mW N P 1150 mW 1000 mW 9.2 mW/ C 8.0 mW/°C 736 mW 640 mW 414 mW 360 mW 230 mW 200 mW recommended operating conditions TL3307x TL3407x TL3507x UNITMIN MAX MIN MAX MIN MAX UNIT Supply voltage, VCC ± ±2 ±22 ±2 ±22 ±2 ±22 V Common-mode input voltage, VIC VCC = 5 V 0 2.7 0 2.9 0 2.7 VCommon-mode input voltage, VIC VCC ± = ±15 V −15 12.7 −15 12.9 −15 12.7 V Operating free-air temperature, TA −40 105 0 70 −55 125 °C
/C0084/C0076/C0051/C0120/C0048/C0055/C0049/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0049/C0065/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0050/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0050/C0065/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0052/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0052/C0065 /C0072/C0073/C0071/C0072/C0262/C0083/C0076/C0069/C0087/C0262/C0082/C0065/C0084/C0069/C0044 /C0083/C0073/C0078/C0071/C0076/C0069/C0262/C0083/C0085/C0080/C0080/C0076/C0089 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS097C − MARCH 1991 − REVISED AUGUST 1996
4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 electrical characteristics at specified free-air temperature, VCC ± = ±15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA † TL3x07xA TL3x07x PARAMETER TEST CONDITIONS TA † MIN TYP ‡ MAX MIN TYP ‡ MAX UNIT VCC = 5 V 25°C 0.5 3 1.5 5 VIO Input offset voltage VCC = ±15 V 25°C 0.5 3 1.0 5 mVVIO Input offset voltage VCC = ±15 V Full range 5 7 mV αVIO Temperature coefficient of input offset voltage VIC = 0, V = 0, VCC = ±15 V Full range 10 10 µV/°C IIO Input offset current VIC = 0, VO = 0, R S = 50 Ω VCC = ±15 V 25°C 7 100 7 100 nAIIO Input offset current R S = 50 Ω VCC = ±15 V Full range 250 250 nA VCC = 5 V IIB Input bias current VCC = 5 V Full range −2.3 −2.3 AIIB Input bias current VCC = ±15 V VCC = ±15 V Full range −1.8 −1.8 VICR Common-mode input R S = 50 Ω 25°C −15 to 13.2 −15 to 13.2 VVICR Common-mode input voltage range R S = 50 Ω Full range −15 to 12.8 −15 to 12.8 V VOH High-level output voltage VCC+ = 5 V, VCC− = 0, R L = 2 kΩ 25°C 3.7 4 3.7 4 VVOH High-level output voltageR L = 10 kΩ 25°C 13.6 14 13.6 14 V R L = 2 kΩ Full range 13.4 13.4 VOL Low-level output voltage VCC+ = 5 V, VCC− = 0, R L = 2 kΩ 25°C 0.1 0.3 0.1 0.3 VVOL Low-level output voltageR L = 10 kΩ 25°C −14.7 −14.3 −14.7 −14.3 V R L = 2 kΩ Full range −13.5 −13.5 AVD Large-signal differentialVO = ±10 V, RL = 2 kΩ 25°C 50 100 25 100 V/mVAVD Large-signal differential voltage amplification VO = ±10 V, RL = 2 kΩ Full range 25 20 V/mV IOS Short-circuit output current Source: VID = 1 V, VO = 0 25°C −10 −30 −10 −30 mAIOS Short-circuit output currentSink: VID = −1 V, VO = 0 25°C 20 30 20 30 mA CMRR Common-mode VIC = VICRmin, 25°C 80 97 70 97 dBCMRR Common-mode rejection ratio VIC = VICRmin, R S = 50 Ω 25°C 80 97 70 97 dB kSVR Supply-voltage rejectionVCC ± = ±13.5 V 25°C 80 97 70 97 dBkSVR Supply-voltage rejection ratio (∆VCC ±/∆VIO) VCC ± = ±13.5 V to ±16.5 V, R S = 100 Ω 25°C 80 97 70 97 dB VO = 0, No Load 25°C 3.5 4.5 3.5 4.5 ICC Supply current VO = 0, No Load Full range 4.7 4.7 mAICC Supply current (per channel) VCC+ = 5 V, VCC− = 0, 25°C 3.4 4.4 3.4 4.4 mA(per channel) VO = 0, No Load Full range 4.6 4.6 † Full range is 0°C to 70°C for the TL3407x devices, and −40°C to 105°C for the TL3307x devices, and −55°C to 125°C for the TL3507x devices. ‡ All typical values are at TA = 25°C.
/C0084/C0076/C0051/C0120/C0048/C0055/C0049/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0049/C0065/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0050/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0050/C0065/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0052/C0044 /C0084/C0076/C0051/C0120/C0048/C0055/C0052/C0065 /C0072/C0073/C0071/C0072/C0262/C0083/C0076/C0069/C0087/C0262/C0082/C0065/C0084/C0069/C0044 /C0083/C0073/C0078/C0071/C0076/C0069/C0262/C0083/C0085/C0080/C0080/C0076/C0089 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082/C0083 SLOS097C − MARCH 1991 − REVISED AUGUST 1996 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 operating characteristics, VCC ± = ±15 V, TA = 25°C PARAMETER TEST CONDITIONS TL3x07xA TL3x07x UNITPARAMETER TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNIT SR+ Positive slew rate VI = −10 V to 10 V, AV = 1 8 10 8 10 V/ sSR− Negative slew rate VI = −10 V to 10 V, RL = 2 kΩ AV = −1 13 13 V/µs ts Settling time AVD = −1, 10-V step To 0.1% 1.1 1.1 sts Settling time A VD = −1, 10-V stepTo 0.01% 2.2 2.2 µs Vn Equivalent input noise voltagef = 1 kHz, R S = 100 Ω 32 32 nV/√Hz In Equivalent input noise currentf = 1 kHz 0.22 0.22 pA/√Hz THD Total harmonic distortion VO = 2 V to 20 V, RL = 2 kΩ, 0.02 0.02 %THD Total harmonic distortion AVD = 10, f = 10 kHz 0.02 0.02 % GBW Gain-bandwidth product f =100 kHz 3.5 4.5 3.5 4.5 MHz BW Power bandwidth R L = 2 kΩ, VO(PP) = 20 V, 200 200 kHzBW Power bandwidth R L = 2 kΩ, AVD = 1, VO(PP) = 20 V, THD = 5.0% 200 200 kHz φm Phase margin R L = 2 kΩ, C L = 0 60° 60° φm Phase margin R L = 2 kΩ, C L = 300 pF 40° 40° Gain margin R L = 2 kΩ, C L = 0 12 12 dBGain margin R L = 2 kΩ, C L = 300 pF 4 4 dB ri Differential input resistanceVIC = 0 150 150 M Ω C i Input capacitance VIC = 0 2.5 2.5 pF Channel separation f = 10 kHZ 120 120 dB zo Open-loop output impedance f = 1 MHZ 30 30 Ω
www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TL35072P Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type - TL35072P TL35072P.A Active Production PDIP (P) | 8 50 | TUBE Yes NIPDAU N/A for Pkg Type See TL35072P TL35072P (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) TL35072P P PDIP 8 50 506 13.97 11230 4.32 TL35072P.A P PDIP 8 50 506 13.97 11230 4.32 Pack Materials-Page 1
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