TL092 TI | Alldatasheet
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/C0084/C0076/C0048/C0057/C0050 /C0068/C0085/C0065/C0076 /C0074/C0070/C0069/C0084/C0262/C0073/C0078/C0080/C0085/C0084 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082 SLOS372 − JUNE 2001 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068Wide Range of Supply Voltages; Single Supply ...3 V t o 3 6 V , o r Dual Supplies /C0068Class AB Output Stage /C0068High-Impedance N-Channel-JFET Input Stage ...1 012 Ω Typ /C0068Internal Frequency Compensation /C0068Short-Circuit Protection /C0068Input Common Mode Includes VCC− /C0068Low Input Offset Current. . . 50 pA /C0068Low Input Bias Current. . . 200 pA Typ
description
The TL092 JFET-input operational amplifier is similar in performance to the MC3403 family, but with much higher input impedance derived from a FET input stage. The N-channel-JFET input stage allows a common-mode input voltage range that includes the negative supply voltage and offers a typical input impedance of 10 12 Ω/C0044 a typical input offset current of 50 pA, and a typical input bias current of 200 pA. This device is designed to operate from a single supply over a range of 3 V to 36 V. Operation from split supplies also is possible, provided the difference between the two supplies is 3 V to 36 V. Output voltage range is from V CC− to VCC+ − 1.3 V, with a load resistor to VCC− . The TL092 is characterized for operation from 0°C to 70°C. AVAILABLE OPTIONS PACKAGED DEVICE TA PLASTIC SMALL OUTLINE (PS) 0°C to 70°C TL092CPSR The PS package is only available taped and reeled. Add the suffix R to device type for ordering (e.g., TL092CPSR). symbol IN+ IN− OUT Copyright 2001, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1OUT 1IN− 1IN+ VCC− VCC+ 2OUT 2IN− 2IN+ PS PACKAGE (TOP VIEW) /C0080/C0082/C0079/C0068/C0085/C0067/C0084/C0073/C0079/C0078 /C0068/C0065/C0084/C0065 /C0105/C0110/C0102/C0111/C0114/C0109/C0097/C0116/C0105/C0111/C0110 /C0105/C0115 /C0099/C0117/C0114/C0114/C0101/C0110/C0116 /C0097/C0115 /C0111/C0102 /C0112/C0117/C0098/C0108/C0105/C0099/C0097/C0116/C0105/C0111/C0110 /C0100/C0097/C0116/C0101/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0115 /C0099/C0111/C0110/C0102/C0111/C0114/C0109 /C0116/C0111 /C0115/C0112/C0101/C0099/C0105/C0102/C0105/C0099/C0097/C0116/C0105/C0111/C0110/C0115 /C0112/C0101/C0114 /C0116/C0104/C0101 /C0116/C0101/C0114/C0109/C0115 /C0111/C0102 /C0084/C0101/C0120/C0097/C0115 /C0073/C0110/C0115/C0116/C0114/C0117/C0109/C0101/C0110/C0116/C0115 /C0115/C0116/C0097/C0110/C0100/C0097/C0114/C0100 /C0119/C0097/C0114/C0114/C0097/C0110/C0116/C0121/C0046 /C0080/C0114/C0111/C0100/C0117/C0099/C0116/C0105/C0111/C0110 /C0112/C0114/C0111/C0099/C0101/C0115/C0115/C0105/C0110/C0103 /C0100/C0111/C0101/C0115 /C0110/C0111/C0116 /C0110/C0101/C0099/C0101/C0115/C0115/C0097/C0114/C0105/C0108/C0121 /C0105/C0110/C0099/C0108/C0117/C0100/C0101 /C0116/C0101/C0115/C0116/C0105/C0110/C0103 /C0111/C0102 /C0097/C0108/C0108 /C0112/C0097/C0114/C0097/C0109/C0101/C0116/C0101/C0114/C0115/C0046
/C0084/C0076/C0048/C0057/C0050 /C0068/C0085/C0065/C0076 /C0074/C0070/C0069/C0084/C0262/C0073/C0078/C0080/C0085/C0084 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082 SLOS372 − JUNE 2001
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
VCC − OU T IN+ IN−
/C0084/C0076/C0048/C0057/C0050 /C0068/C0085/C0065/C0076 /C0074/C0070/C0069/C0084/C0262/C0073/C0078/C0080/C0085/C0084 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082 SLOS372 − JUNE 2001 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC− . 2. Differential voltages are at the noninverting input with respect to the inverting input. 3. Neither input must ever be more positive than VCC+ or more negative than VCC− − 0.3 V. 4. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can impact reliability. 5. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions MIN MAX UNIT VCC ± Supply voltage 3 36 V TA Operating free-air temperature range 0 70 °C
/C0084/C0076/C0048/C0057/C0050 /C0068/C0085/C0065/C0076 /C0074/C0070/C0069/C0084/C0262/C0073/C0078/C0080/C0085/C0084 /C0079/C0080/C0069/C0082/C0065/C0084/C0073/C0079/C0078/C0065/C0076 /C0065/C0077/C0080/C0076/C0073/C0070/C0073/C0069/C0082 SLOS372 − JUNE 2001
4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VCC ± = ±15 V (all characteristics are specified under open-loop conditions, unless otherwise noted) PARAMETER TEST CONDITIONS TA MIN TYP † MAX UNIT VIO Input offset voltage R S = 50 Ω 25°C 5 15 mVVIO Input offset voltage R S = 50 Ω Full range 20 mV αVIO Temperature coefficient of input offset voltage 25°C 10 µV/°C IIO‡ Input offset current 25°C 50 200 pA IIO‡ Input offset current Full range 5 nA IIB‡ Input bias current 25°C 200 400 pA IIB‡ Input bias current Full range 10 nA VICR Common-mode input voltage range 25°C VCC− to 12 VCC− to 13 V R L = 2 kΩ 25°C ±10 ±13 VO(PP) Peak output voltage swing R L = 10 kΩ 25°C ±12 ±13.5 VVO(PP) Peak output voltage swing R L = 2 kΩ Full range ±10 V AVD Large-signal differential R L = 2 kΩ, VO = ±10 V 25°C 20 200 V/mVAVD Large-signal differential voltage amplification R L = 2 kΩ, VO = ±10 V Full range 15 V/mV BOM Maximum output swing bandwidth R L = 2 kΩ, AVD = 1, VO(PP) = 20 V, THD < 5% 25°C 9 kHz B1 Unity gain bandwidth R L = 10 kΩ, VO = 50 mV 25°C 1 MHz φm Phase margin R L = 2 kΩ, C L = 200 pF 25°C 60° ri Input resistance f = 20 Hz 25°C 1012 Ω ro Output resistance f = 20 Hz 25°C 75 Ω CMRR Common-mode rejection ratioR S = 50 Ω, VIC = VICR 25°C 70 90 dB kSVR Supply-voltage rejection ratio (∆VCC /∆VIO) R S = 50 Ω, VCC ± = ±3 V to ±15 V 25°C 75 90 dB IOS Short-circuit output current 25°C 40 mA ICC Supply current (per amplifier)VO = 0, No load 25°C 1.5 2.5 mA † All typical values are at TA = 25°C. ‡ Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive. Pulse techniques that maintain the junction temperature as close to the ambient temperature as possible must be used. electrical characteristics at specified free-air temperature, VCC+ = 5 V, VCC− = 0 V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP † MAX UNIT VIO Input offset voltage R S = 50 Ω, VO = 2.5 V 5 15 mV IIO Input offset current VO = 2.5 V 50 200 pA IIB Input bias current VO = 2.5 V 200 400 pA VO(PP) Peak output voltage swing R L = 10 kΩ 3.3 3.5 V VO(PP) Peak output voltage swing R L = 10 kΩ, VCC+ = 5 V to 30 V VCC+ −1.7 V AVD Large-signal differential voltage amplification R L = 2 kΩ, ∆VO =1.6 V 20 200 V/mV kSVR Supply-voltage rejection ratio (∆VCC /∆VIO) R S = 50 Ω, VCC ± = ±3 V to ±15 V 75 dB ICC Supply current (per amplifier)VO = 2.5 V, No load 1.5 2.5 mA VO1 /VO2 Channel separation f = 1 kHz to 20 kHz 120 dB † All typical values are at TA = 25°C.
Figure 1. Unity-Gain Amplifier
www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) TL092CPSR Active Production SO (PS) | 8 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 T092 TL092CPSR.A Active Production SO (PS) | 8 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM 0 to 70 T092 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 13-May-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 13-May-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TL092CPSR SO PS 8 2000 356.0 356.0 35.0 Pack Materials-Page 2
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