TL081_08 STMICROELECTRONICS | Alldatasheet
Document overview
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Technical content
Features
■ Wide common-mode (up to VCC +) and differential voltage range ■ Low input bias and offset current ■ Output short-circuit protection ■ High input impedance JFET input stage ■ Internal frequency compensation ■ Latch-up free operation ■ High slew rate: 16 V/µs (typ)
Description
The TL081, TL081A and TL081B are high-speed JFET input single operational amplifiers incorporating well matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit. The devices feature high slew rates, low input bias and offset currents, and low offset voltage temperature coefficient. N DIP8 (Plastic package) D SO-8 (Plastic micropackage) 1 - Offset null 1 2 - Inverting input 3 - Non-inverting input 4 - V CC 5 - Offset null 2 6 - Output 7 - V CC 8 - N.C. Pin connections (top view)
1 Schematic diagram
Figure 1. Schematic diagram Figure 2. Input offset voltage null circuit
2 Absolute maximum ratings
Table 1. Absolute maximum ratings
- All voltage values, except differential voltage, are with respect to the zero reference level (ground) of the
- The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 volts,
- Differential voltages are the non-inverting input termi nal with respect to the inverting input terminal.
- The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be
limited to ensure that the dissipation rating is not exceeded.
- Short-circuits can c ause excessive heating and destructive dissipation.
- Human body model: 100 pF discharged through a 1.5k Ω resistor between two pins of the device, done for
all couples of pin combinations with other pins floating.
- Machine model: a 200 pF cap is charged to the spec ified voltage, then discharged directly between two
combinations with other pins floating.
- Charged device model: all pins plus package ar e charged together to the specified voltage and then
discharged directly to the ground. Table 2. Operating conditions
3 Electrical characteristics
Table 3. V CC = ±15V, Tamb = +25°C (unless otherwise specified)
200 V/mV
- The input bias currents are junction l eakage currents which approximately double for every 10°C increase in the junction
Table 3. V CC = ±15V, Tamb = +25°C (unless otherwise specified) (continued)
4 Parameter measurement information
Figure 20. Voltage follower Figure 21. Gain-of-10 inverting amplifier
5 Typical applications
Figure 22. 0.5 Hz square wave oscillator Figure 23. High Q notch filter
6 Package information
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
6.1 DIP 8 package information
Figure 24. DIP8 package mechanical drawing Table 4. DIP8 package mechanical data
6.2 SO-8 package information
Figure 25. SO-8 package mechanical drawing Table 5. SO-8 package mechanical data
7 Ordering information
8 Revision history
Table 6. Order codes
- Qualification and characterizati on according to AEC Q100 and Q003 or equivalent, advanced screening
according to AEC Q001 & Q 002 or equivalent are on-going. Table 7. Document revision history 30-Apr-2001 1 Initial release. Added Table 2: Operating conditions. Added automotive grade part numbers in Table 6: Order codes. (TL081Mx, TL081AMx, TL081BMx). updated footnote in Table 6: Order codes.