TL05

TL05X TI | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 65

Technical content

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068Direct Upgrades to TL07x and TL08x BiFET Operational Amplifiers /C0068Faster Slew Rate (20 V/ms Typ) Without Increased Power Consumption /C0068On-Chip Offset Voltage Trimming for Improved DC Performance and Precision Grades Are Available (1.5 mV, TL051A) /C0068Available in TSSOP for Small Form-Factor Designs

description

The TL05x series of JFET-input operational amplifiers offers improved dc and ac characteristics over the TL07x and TL08x families of BiFET operational amplifiers. On-chip zener trimming of offset voltage yields precision grades as low as 1.5 mV (TL051A) for greater accuracy in dc-coupled applications. Texas Instruments improved BiFET process and optimized designs also yield improved bandwidth and slew rate without increased power consumption. The TL05x devices are pin-compatible with the TL07x and TL08x and can be used to upgrade existing circuits or for optimal performance in new designs. BiFET operational amplifiers offer the inherently higher input impedance of the JFET-input transistors, without sacrificing the output drive associated with bipolar amplifiers. This makes them better suited for interfacing with high-impedance sensors or very low-level ac signals. They also feature inherently better ac response than bipolar or CMOS devices having comparable power consumption. The TL05x family was designed to offer higher precision and better ac response than the TL08x with the low noise floor of the TL07x. Designers requiring significantly faster ac response or ensured lower noise should consider the Excalibur TLE208x and TLE207x families of BiFET operational amplifiers. AVAILABLE OPTIONS PACKAGED DEVICES CHIP TA VIOmax AT 25°C SMALL OUTLINE † (D) CHIP CARRIER (FK) CERAMIC DIP (J) CERAMIC DIP (JG) PLASTIC DIP (N) PLASTIC DIP (P) CHIP FORM ‡ (Y) 800 mV TL051ACD TL052ACD — — — — TL051ACP TL052ACP TL051Y 0°C to 70°C 1.5 mV TL051CD TL052CD TL054ACD — — — TL054ACN TL051CP TL052CP TL051Y TL052Y TL054Y 4 mV TL054CD — — — TL054CN — 800 mV TL051AID TL052AID — — — — TL051AIP TL052AIP –40°C to 85°C 1.5 mV TL051ID TL052ID TL054AID — — — TL054AIN TL051IP TL052IP 4 mV TL054ID — — TL054IN — 800 mV TL051AMD TL052AMD TL051AMFK TL052AMFK — TL051AMJG TL052AMJG — TL051AMP TL052AMP –55°C to 125°C 1.5 mV TL051MD TL052MD TL054AMD TL051MFK TL052MFK TL054AMFK TL054AMJ TL051MJG TL052MJG TL054AMN TL051MP TL052MP 4 mV TL054MD TL054MFK TL054MJ — TL054MN — † The D packages are available taped and reeled. Add R suffix to device type (e.g., TL054CDR). ‡ Chip forms are tested at 25°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  1997, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

description (continued) Because BiFET operational amplifiers are designed for use with dual power supplies, care must be taken to observe common-mode input voltage limits and output swing when operating from a single supply. DC biasing of the input signal is required and loads should be terminated to a virtual-ground node at midsupply. Texas Instruments TLE2426 integrated virtual ground generator is useful when operating BiFET amplifiers from single supplies. The TL05x are fully specified at ±15 V and ± 5 V. For operation in low-voltage and/or single-supply systems, Texas Instruments LinCMOS families of operational amplifiers (TLC-prefix) are recommended. When moving from BiFET to CMOS amplifiers, particular attention should be paid to the slew rate and bandwidth requirements, and also the output loading. 3212 0 1 9 91 0 1 1 1 2 1 3 4IN+ NC V CC– NC 3IN+ 1IN+ NC V CC+ NC 2IN+ 1IN – 1OUT NC 3OUT 3IN – 4IN – 2IN – NC 4OUT 2OUT 1OUT 1IN– 1IN+ VCC+ 2IN+ 2IN– 2OUT 4OUT 4IN– 4IN+ V CC– 3IN+ 3IN– 3OUT OFFSET N1 IN– IN+ VCC– NC V CC+ OUT OFFSET N2 3 2 1 20 19 91 0 1 1 1 2 1 3 NC VCC+ NC OUT NC NC IN– NC IN+ NC TL051 FK PACKAGE (TOP VIEW)NC OFFSET N1 NC OFFSET N2 NC NC NC NC NC – No internal connection CC –V NC 1OUT 1IN– 1IN+ VCC – VCC+ 2OUT 2IN– 2IN+ 3212 0 1 9 91 0 1 1 1 2 1 3 NC 2OUT NC 2IN – NC NC 1IN – NC 1IN+ NC TL052 FK PACKAGE (TOP VIEW)NC 1OUT NC 2IN + NC NC NC NC CC +V CC –V TL054 D, J, OR N PACKAGE (TOP VIEW) TL054 FK PACKAGE (TOP VIEW) TL051 D, JG, OR P PACKAGE (TOP VIEW) TL052 D, JG, OR P PACKAGE (TOP VIEW)

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 symbol (each amplifier) –IN– IN+ OUT equivalent schematic (each amplifier) OFFSET N2 OFFSET N1 IN– IN+ VCC+ Q14 Q10 Q11 Q9Q5 JF1 JF2 Q13 Q16 JF3Q15 Q17 OUT VCC– R2 R3 Q12 R10 D2 See Note A NOTE A: OFFSET N1 and OFFSET N2 are only available on the TL051x. ACTUAL DEVICE COMPONENT COUNT † COMPONENT TL051 TL052 TL054 Transistors 20 34 62 Resistors 10 19 37 Diodes 2 3 5 Capacitors 1 2 4 † These figures include all four amplifiers and all ESD, bias, and trim circuitry.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

This chip, when properly assembled, displays characteristics similar to the TL051. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ± 10%. ALL DIMENSIONS ARE IN MILS. PIN (4) IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP. OUT IN+ IN– VCC+ (7)(3) (2) (6) (1) (4) (5) VCC–OFFSET N1 OFFSET N2 (1) (2) (3) (4) (5) (6)(7)

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 5POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL052Y chip information This chip, when properly assembled, displays characteristics similar to the TL052. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ± 10%. ALL DIMENSIONS ARE IN MILS. PIN (4) IS INTERNALLY CONNECTED TO BACKSIDE OF CHIP. 1OUT 1IN+ 1IN– VCC+ (8) (6) (3) (2) (5) (1) +(7) 2IN+ 2IN– 2OUT (4) VCC– (1) (2) (3) (4) (5)(6)(7) (8)

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

This chip, when properly assembled, displays characteristics similar to the TL054C. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. These chips may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS 1OUT 1IN+ 1IN– VCC+ (4) (6) (3) (2) (5) (1) +(7) 2IN+ 2IN– 2OUT (11) VCC– 3OUT 3IN+ 3IN– (13) (10) (9) (12) (8) +(14) 4OUT 4IN+ 4IN– (6) (7) (8) (9) 122 CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ± 10%. ALL DIMENSIONS ARE IN MILS. PIN (11) IS INTERNALLY CONNECTED TO BACKSIDE OF THE CHIP. (1) (2) (3) (4) (5) (6) (7) (8) (9) (10) (11) (12) (13) (14)

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 7POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC–. 2. Differential voltages are at IN+ with respect to IN–. 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less. 4. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE T A = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING TA = 125°C POWER RATING D–8 725 mW 5.8 mW/°C 464 mW 377 mW 145 mW D–14 950 mW 7.6 mW/ °C 608 mW 494 mW 190 mW FK 1375 mW 11.0 mW/ °C 880 mW 715 mW 275 mW J 1375 mW 11.0 mW/ °C 880 mW 715 mW 275 mW JG 1050 mW 8.4 mW/ °C 672 mW 546 mW 210 mW N 1575 mW 12.6 mW/ °C 1008 mW 819 mW 315 mW P 1000 mW 8.0 mW/°C 640 mW 520 mW 200 mW recommended operating conditions C SUFFIX I SUFFIX M SUFFIX UNITMIN MAX MIN MAX MIN MAX UNIT Supply voltage, VCC ± ± 5 ± 15 ± 5 ± 15 ± 5 ± 15 V Common mode input voltage V VCC ± = ± 5 V –1 4 –1 4 –1 4 VC ommon-mo de input voltage, VIC VCC ± = ± 15 V –1 1 11 –1 1 11 –1 1 11 V Operating free-air temperature, TA 0 70 –40 85 –55 125 °C

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TL051C and TL051AC electrical characteristics at specified free-air temperature TL051C, TL051AC PARAMETER TEST CONDITIONS TA † VCC ± = ± 5 V VCC ± = ± 15 V UNIT MIN TYP MAX MIN TYP MAX TL051C 25°C 0.75 3.5 0.59 1.5 VIO Input offset voltage TL051C Full range 4.5 2.5 mVVIO Input offset voltage TL051AC 25°C 0.55 2.8 0.35 0.8 mV VO =0 TL051AC Full range 3.8 1.8 a VIO Temperature coefficient VO = 0, VIC = 0, R S = 50 W TL051C 25°C to 70°C 8 8 m V/°Ca VIO of input offset voltage‡ R S = 50 W TL051AC 25°C to 70°C 8 8 25 m V/°C Input offset voltage long-term drift§ 25°C 0.04 0.04 mV/mo IIO Input offset current VO = 0, V IC = 0, 25°C 4 100 5 100 pA IIO Input offset current OI C See Figure 5 70°C 0.02 1 0.025 1 nA IIB Input bias current VO = 0, V IC = 0, 25°C 20 200 30 200 pA IIB Input bias current OI C See Figure 5 70°C 0.15 4 0.2 4 nA VICR Common-mode input 25°C to –2.3 to 5.6 –1 1 to –12.3 to 15.6 VVICR voltage range Full range to –1 1 to V R L =1 0kW 25°C 3 4.2 13 13.9 VOM Maximum positive peak R L = 10 kW Full range 3 13 VVOM + output voltage swing R L =2k W 25°C 2.5 3.8 11.5 12.7 V R L = 2 kW Full range 2.5 11.5 R L =1 0kW VOM Maximum negative peak R L = 10 kW Full range –2.5 –12 VVOM – g output voltage swing R L =2k W R L = 2 kW Full range –2.3 –1 1 Large signal differential 25°C 25 59 50 105 AVD Large-signal differential voltage amplification¶ R L = 2 kW 0°C 30 65 60 129 V/mVvoltage am lification¶ 70°C 20 46 30 85 ri Input resistance 25°C 1012 1012 W ci Input capacitance 25°C 10 12 pF Common mode V V min 25°C 65 85 75 93 CMRR C ommon-mo de rejection ratio VIC = VICRm in, VO =0 R S =5 0W 0°C 65 84 75 92 dBrejection ratio VO = 0, R S = 50 W 70°C 65 84 75 91 Supply voltage rejection 25°C 75 99 75 99 kSVR Supply-voltage rejection ratio (DVCC ± /DVIO) VO = 0, R S = 50 W 0°C 75 98 75 98 dBratio (DVCC ± /DVIO) 70°C 75 97 75 97 25°C 2.6 3.2 2.7 3.2 ICC Supply current V O = 0, No load 0°C 2.7 3.2 2.8 3.2 mACC y O 70°C 2.6 3.2 2.7 3.2 † Full range is 0°C to 70°C. ‡ This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters. § Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. ¶ For VCC ± = ± 5 V, VO = ± 2.3 V, or for VCC ± = ± 15 V, VO = ±10 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 9POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL051C and TL051AC operating characteristics at specified free-air temperature TL051C, TL051AC PARAMETER TEST CONDITIONS TA † VCC ± = ± 5 V VCC ± = ± 15 V UNIT MIN TYP MAX MIN TYP MAX Positi e sle rate 25°C 16 13 20 SR+ Positive slew rate at unity gain‡ R L = 2 kW ,C L = 100 pF, Full range 16.4 11 22.6 V/ms Negati e sle rate L , L , See Figure 1 25°C 15 13 18 V/ms SR– N egative slew rate at unity gain‡ Full range 16 11 19.3 25°C 55 56 tr Rise time 0°C 54 55 70°C 63 63 nsVI(PP) = ±10 mV, R2 k W 25°C 55 57 ns tf Fall time R L = 2 kW , C L = 100pF 0°C 54 56C L = 100 F, See Figures 1 and 2 70°C 62 64g 25°C 24% 19% Overshoot factor 0°C 24% 19% 70°C 24% 19% V Equivalent input noise f = 10 Hz 25°C 75 75 nV/√HzVn q voltage§ R S = 20 W, f = 1 kHz 25°C 18 18 30 nV/√H z VN(PP) Peak-to-peak equivalent input noise voltage See Figure 3 f = 10 Hz to 10 kHz 25°C 4 4 mV In Equivalent input noise current f = 1 kHz 25°C 0.01 0.01 pA/√Hz THD Total harmonic distortion¶ R S = 1 kW , f = 1 kHz R L = 2 kW , 25°C 0.003% 0.003% V1 0 V R 2 k W 25°C 3 3.1 B1 Unity-gain bandwidth VI = 10 mV, R L = 2 kW , C L =2 5pF See Figure 4 0°C 3.2 3.3 MHzC L = 25 F, See Figure 4 70°C 2.7 2.8 P h iti t V1 0 V R 2 k W 25°C 59° 62° fm Phase margin at unity gain VI = 10 mV, R L = 2 kW , C L =2 5pF See Figure 4 0°C 58° 62°gain C L = 25 F, See Figure 4 70°C 59° 62° † Full range is 0°C to 70°C. ‡ For VCC ± = ± 5 V, VI(PP) = ± 1 V; for VCC ± = ± 15 V, VI(PP) = ± 5 V. § This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters. ¶ For VCC ± = ± 5 V, VO rms = 1 V; for VCC ± = ± 15 V, VO rms = 6 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TL051I and TL051AI electrical characteristics at specified free-air temperature TL051I, TL051AI PARAMETER TEST CONDITIONS TA † VCC ± = ± 5 V VCC ± = ± 15 V UNITA MIN TYP MAX MIN TYP MAX TL051I 25°C 0.75 3.5 0.59 1.5 VIO Input offset voltage TL051I Full range 5.3 3.3 mVVIO Input offset voltage TL051AI 25°C 0.55 2.8 0.35 0.8 mV VO =0 TL051AI Full range 4.6 2.6 a VIO Temperature coefficient of VO = 0, VIC = 0, R S = 50 W TL051I 25°C to 85°C 7 8 mV/°Ca VIO input offset voltage‡ R S = 50 W TL051AI 25°C to 85°C 8 8 25 mV/°C Input offset voltage long-term drift§ 25°C 0.04 0.04 mV/mo IIO Input offset current VO = 0, V IC = 0, 25°C 4 100 5 100 pA IIO Input offset current OI C See Figure 5 85°C 0.06 10 0.07 10 nA IIB Input bias current VO = 0, V IC = 0, 25°C 20 200 30 200 pA IIB Input bias current OI C See Figure 5 85°C 0.6 20 0.7 20 nA VICR Common-mode input 25°C to –2.3 to 5.6 –1 1 to –12.3 to 15.6 VVICR voltage range Full range to –1 1 to V R L =1 0kW 25°C 3 4.2 13 13.9 VOM Maximum positive peak R L = 10 kW Full range 3 13 VVOM + output voltage swing R L =2k W 25°C 2.5 3.8 11.5 12.7 V R L = 2 kW Full range 2.5 11.5 R L =1 0kW VOM Maximum negative peak R L = 10 kW Full range –2.5 –12 VVOM – g output voltage swing R L =2k W R L = 2 kW Full range –2.3 –1 1 Large signal differential 25°C 25 59 50 105 AVD Large-signal differential voltage amplification¶ R L = 2 kW –40°C 30 74 60 145 V/mVvoltage am lification¶ 85°C 20 43 30 76 ri Input resistance 25°C 1012 1012 W ci Input capacitance 25°C 10 12 pF Common mode VIC = VICRmin, 25°C 65 85 75 93 CMRR C ommon-mo de rejection ratio VIC VICRmin, VO = 0, –40°C 65 83 75 90 dBrejection ratio R S = 50 W 85°C 65 84 75 93 Supply voltage rejection V0 25°C 75 99 75 99 kSVR Supply-voltage rejection ratio (DVCC ± /DVIO) VO = 0, R S =5 0W –40°C 75 98 75 98 dBratio (DVCC ± /DVIO) R S = 50 W 85°C 75 99 75 99 25°C 2.6 3.2 2.7 3.2 ICC Supply current V O = 0, No load –40°C 2.4 3.2 2.6 3.2 mA 85°C 2.5 3.2 2.6 3.2 † Full range is –40°C to 85°C ‡ This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters. § Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. ¶ For VCC ± = ± 5 V, VO = ± 2.3 V, or for VCC ± = ± 15 V, VO = ±10 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 11POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL051I and TL051AI operating characteristics at specified free-air temperature TL051I, TL051AI PARAMETER TEST CONDITIONS TA † VCC ± = ± 5 V VCC ± = ± 15 V UNIT MIN TYP MAX MIN TYP MAX Positi e sle rate 25°C 16 13 20 SR+ Positive slew rate at unity gain‡ R L = 2 kW ,C L = 100 pF, Full range 11 V/ms Negati e sle rate L , L , See Figure 1 25°C 15 13 18 V/ms SR– N egative slew rate at unity gain‡ Full range 11 25°C 55 56 tr Rise time –40°C 52 53 85°C 64 65 nsVI(PP) = ±10 mV, R2 k W 25°C 55 57 ns tf Fall time R L = 2 kW , C L = 100pF –40°C 51 53C L = 100 F, See Figures 1 and 2 85°C 64 65g 25°C 24% 19% Overshoot factor –40°C 24% 19% 85°C 24% 19% V Equivalent input noise f = 10 Hz 25°C 75 75 nV/√HzVn q voltage§ R S = 20 W, f = 1 kHz 25°C 18 18 30 nV/√H z VN(PP) Peak-to-peak equivalent input noise voltage See Figure 3 f = 10 Hz to 10 kHz 25°C 4 4 mV In Equivalent input noise current f = 1 kHz 25°C 0.01 0.01 pA/√Hz THD Total harmonic distortion¶ R S = 1 kW , f = 1 kHz R L = 2 kW , 25°C 0.003% 0.003% V1 0 V R 2 k W 25°C 3 3.1 B1 Unity-gain bandwidth VI = 10 mV, R L = 2 kW , C L =2 5pF See Figure 4 –40°C 3.5 3.6 MHzC L = 25 F, See Figure 4 85°C 2.6 2.7 P h iti t V1 0 V R 2 k W 25°C 59° 62° fm Phase margin at unity gain VI = 10 mV, R L = 2 kW , C L =2 5pF See Figure 4 –40°C 58° 61°gain C L = 25 F, See Figure 4 85°C 59° 62° † Full range is –40°C to 85°C. ‡ For VCC ± = ± 5 V, VI(PP) = ± 1 V; for VCC ± = ± 15 V, VI(PP) = ± 5 V. § This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters. ¶ For VCC ± = ± 5 V, VO rms = 1 V; for VCC ± = ± 15 V, VO rms = 6 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TL051M and TL051AM electrical characteristics at specified free-air temperature TL051M, TL051AM PARAMETER TEST CONDITIONS TA † VCC ± = ± 5 V VCC ± = ± 15 V UNITA MIN TYP MAX MIN TYP MAX TL051M 25C 0.75 3.5 0.59 1.5 VIO Input offset voltage TL051M Full range 6.5 4.5 mVVIO Input offset voltage TL051AM 25°C 0.55 2.8 0.35 0.8 mV VO =0 TL051AM Full range 5.8 3.8 a VIO Temperature coefficient of VO = 0, VIC = 0, R S = 50 W TL051M 25°C to 125°C 8 8 mV/°Ca VIO input offset voltage R S = 50 W TL051AM 25°C to 125°C 8 8 mV/°C Input offset voltage long-term drift‡ 25°C 0.04 0.04 mV/mo IIO Input offset current VO = 0, V IC = 0, 25°C 4 100 5 100 pA IIO Input offset current OI C See Figure 5 125°C 1 20 2 20 nA IIB Input bias current VO = 0, VIC = 0, 25°C 20 200 30 200 pA IIB Input bias current OI C See Figure 5 125°C 10 50 20 50 nA VICR Common-mode input 25°C to –2.3 to 5.6 –1 1 to –12.3 to 15.6 VVICR voltage range Full range to –1 1 to V R L =1 0kW 25°C 3 4.2 13 13.9 VOM Maximum positive peak R L = 10 kW Full range 3 13 VVOM+ output voltage swing R L =2k W 25°C 2.5 3.8 11.5 12.7 V R L = 2 kW Full range 2.5 11.5 R L =1 0kW VOM Maximum negative peak R L = 10 kW Full range –2.5 –12 VVOM– g output voltage swing R L =2k W R L = 2 kW Full range –2.3 –1 1 Large signal differential 25°C 25 59 50 105 AVD Large-signal differential voltage amplification§ R L = 2 kW –55°C 30 76 60 149 V/mVvoltage am lification§ 125°C 10 32 15 49 ri Input resistance 25°C 1012 1012 W ci Input capacitance 25°C 10 12 pF Common mode VIC = VICRmin, 25°C 65 85 75 93 CMRR C ommon-mo de rejection ratio VIC VICRmin, VO = 0, –55°C 65 83 75 92 dBrejection ratio R S = 50 W 125°C 65 84 75 94 Supply voltage rejection 25°C 75 99 75 99 kSVR Supply-voltage rejection ratio (DVCC ± /DVIO) VO = 0, R S = 50 W –55°C 75 98 75 98 dBratio (DVCC ± /DVIO) 125°C 75 100 75 100 25°C 2.6 3.2 2.7 3.2 ICC Supply current V O = 0, No load –55°C 2.3 3.2 2.4 3.2 mACC y O 125°C 2.4 3.2 2.5 3.2 † Full range is –55°C to 125°C. ‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. § For VCC ± = ± 5 V, VO = ± 2.3 V, or for VCC ± = ± 15 V, VO = ± 10 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 13POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL051M and TL051AM operating characteristics at specified free-air temperature TL051M, TL051AM PARAMETER TEST CONDITIONS TA VCC ± = ± 5 V VCC ± = ± 15 V UNITA MIN TYP MAX MIN TYP MAX SR+ Positive slew rate 25°C 16 13 20SR + at unity gain† R L = 2 kW ,C L = 100 pF, 25°C 16 13 20 V/m s SR Negative slew rate L , L , See Figure 1 25°C 15 13 V/m s SR – g at unity gain† 25°C 15 13 25°C 55 56 tr Rise time –55°C 51 52 125°C 68 68 nsVI(PP) = ± 10 mV, R2 k W 25°C 55 57 ns tf Fall time R L = 2 kW , C L = 100pF –55°C 51 52C L = 100 F, See Figures 1 and 2 125°C 68 69g 25°C 24% 19% Overshoot factor –55°C 25% 19% 125°C 25% 19% V Equivalent input noise f = 10 Hz 25°C 75 75 nV/√HzVn q voltage‡ R S = 20 W , f = 1 kHz 25°C 18 19 nV/√H z VN(PP) Peak-to-peak equivalent input noise voltage See Figure 3 f = 10 Hz to 10 kHz 25°C 4 4 mV In Equivalent input noise current f = 1 kHz 25°C 0.01 0.01 pA/√Hz THD Total harmonic distortion§ R S = 1 kW , f = 1 kHz R L = 2kW , 25°C 0.003% 0.003% V1 0 V R2 k W 25°C 3 3.1 B1 Unity-gain bandwidth VI = 10 mV, C L =2 5pF R L = 2 kW , See Figure 4 –55°C 3.6 3.7 MHzC L = 25 F, See Figure 4 125°C 2.3 2.4 P h iti t V1 0 V R2 k W 25°C 59° 62° fm Phase margin at unity gain VI = 10 mV, C L =2 5pF R L = 2 kW , See Figure 4 –55°C 57° 61°gain C L = 25 F, See Figure 4 125°C 59° 62° † For VCC ± = ± 5 V, VI(PP) = ± 1 V; for VCC ± = ± 15 V, VI(PP) = ± 5 V. ‡ This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters. § For VCC ± = ± 5 V, VO rms = 1 V; for VCC ± = ± 15 V, VO rms = 6 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TL051Y electrical characteristics, TA = 25°C TL051Y PARAMETER TEST CONDITIONS VCC ± = ± 5 V VCC ± = ± 15 V UNIT MIN TYP MAX MIN TYP MAX VIO Input offset voltage VO = 0, VIC = 0, 07 5 05 9 mVVIO Input offset voltage O , R S = 50 W IC , 0.75 0.59 mV IIO Input offset current VO = 0, V IC = 0, 4 5 pAIIO Input offset current O , IC , See Figure 5 4 5 pA IIB Input bias current VO = 0, V IC = 0, 20 30 pAIIB Input bias current O , IC , See Figure 5 20 30 pA VICR Common-mode input voltage range –2.3 to 5.6 –12.3 to 15.6 V VOM Maximum positive peak output voltageR L = 10 kW 4.2 13.9 VVOM+ g swing R L = 2 kW 3.8 12.7 V VOM Maximum negative peak output voltageR L = 10 kW –3.5 –13.2 VVOM – gg swing R L = 2 kW –3.2 –12 V AVD Large-signal differential voltage amplification† R L = 2 kW 59 105 V/mV ri Input resistance 1012 1012 W ci Input capacitance 10 12 pF CMRR Common-mode rejection ratio VIC = VICRmin, VO = 0, R S = 50 W 85 93 dB kSVR Supply-voltage rejection ratio (DVCC ± /D VIO) VO = 0, R S = 50 W 99 99 dB ICC Supply current VO = 0, No load 2.6 2.7 mA † For VCC ± = ± 5 V, VO = ± 2.3 V, or for VCC ± = ± 15 V, VO = ± 10 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 15POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL051Y operating characteristics, TA = 25°C TL051Y PARAMETER TEST CONDITIONS VCC ± = ± 5 V VCC ± = ± 15 V UNIT MIN TYP MAX MIN TYP MAX SR+ Positive slew rate at unity gain† R L = 2 kW ,C L = 100 pF, 16 20 V/ms SR– Negative slew rate at unity gain† L , L , See Figure 1 15 18 V/ms tr Rise time VI(PP) = ±10 mV, R2 k W 55 56 ns tf Fall time R L = 2 kW , C L = 100 pF, 55 57 ns Overshoot factor C L = 100 F, See Figures 1 and 2 24% 19% V Eq i alent inp t noise oltage‡ f = 10 Hz 75 75 nV/√HzVn Equivalent input noise voltage‡ R S = 20 W, f = 1 kHz 18 18 nV/√H z VN(PP) Peak-to-peak equivalent input noise voltage See Figure 3 f = 10 Hz to 10 kHz 4 4 mV In Equivalent input noise current f = 1 kHz 0.01 0.01 pA/√Hz THD Total harmonic distortion§ R S = 1 kW ,R L = 2 kW , f = 1 kHz 0.003% 0.003% B1 Unity-gain bandwidth VI = 10 mV, R L = 2 kW , C L = 25 pF, See Figure 4 3 3.1 MHz fm Phase margin at unity gain VI = 10 mV, R L = 2 kW , C L = 25 pF, See Figure 4 59° 62° † For VCC ± = ± 5 V, VI(PP) = ± 1 V; for VCC ± = ± 15 V, VI(PP) = ± 5 V. ‡ This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters. § For VCC ± = ± 5 V, VO rms = 1 V; for VCC ± = ± 15 V, VO rms = 6 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TL052C and TL052AC electrical characteristics at specified free-air temperature TL052C, TL052AC PARAMETER TEST CONDITIONS TA † VCC ± = ± 5 V VCC ± = ± 15 V UNITA MIN TYP MAX MIN TYP MAX TL052C 25°C 0.73 3.5 0.65 1.5 VIO Input offset voltage TL052C Full range 4.5 2.5 mVVIO Input offset voltage V0 TL052AC 25°C 0.51 2.8 0.4 0.8 mV VO = 0, VIC =0 TL052AC Full range 3.8 1.8VIC = 0, R S = 50 W TL052C 25°C to 8 8 a VIO Temperature coefficient R S 50 W TL052C 70°C 8 8 mV/°Ca VIO of input offset voltage‡ TL052AC 25°C to 8 6 25 mV/°C TL052AC 70°C 8 6 25 Input offset voltage long- term drift§ VO = 0, R S = 50 W VIC = 0, 25°C 0.04 0.04 mV/mo IIO Input offset current VO = 0, VIC =0 25°C 4 100 5 100 pA IIO Input offset current O , See Figure 5 VIC = 0, 70°C 0.02 1 0.025 1 nA IIB Input bias current VO = 0, VIC =0 25°C 20 200 30 200 pA IIB Input bias current O , See Figure 5 VIC = 0, 70°C 0.15 4 0.2 4 nA VICR Common-mode input 25°C to –2.3 to 5.6 –1 1 to –12.3 to 15.6 VVICR voltage range Full range to –1 1 to V R L =1 0kW 25°C 3 4.2 13 13.9 VOM Maximum positive peak R L = 10 kW Full range 3 13 VVOM+ output voltage swing R L =2k W 25°C 2.5 3.8 11.5 12.7 V R L = 2 kW Full range 2.5 11.5 R L =1 0kW VOM Maximum negative peak R L = 10 kW Full range –2.5 –12 VVOM– g output voltage swing R L =2k W V R L = 2 kW Full range –2.3 –1 1 L i l diff ti l 25°C 25 59 50 105 AVD Large-signal differential voltage amplification¶ R L = 2 kW 0°C 30 65 60 129 V/mVvoltage am lification¶ 70°C 20 46 30 85 ri Input resistance 25°C 1012 1012 W ci Input capacitance 25°C 10 12 pF Common mode V V min 25°C 65 85 75 93 CMRR C ommon-mo de rejection ratio VIC = VICRm in, VO = 0, R S = 50 W 0°C 65 84 75 92 dBrejection ratio VO = 0, 70°C 65 84 75 91 † Full range is 0°C to 70°C. ‡ This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters. § Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. ¶ For VCC ± =± 5 V, VO = ± 2.3 V; at VCC ± = ± 15 V, VO = ± 10 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 17POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL052C and TL052AC electrical characteristics at specified free-air temperature (continued) TL052C, TL052AC PARAMETER TEST CONDITIONS TA VCC ± = ± 5 V VCC ± = ± 15 V UNITA MIN TYP MAX MIN TYP MAX S l lt j ti 25°C 75 99 75 99 kSVR Supply-voltage rejection ratio (DVCC ± /DVIO) VO = 0, R S = 50 W 0°C 75 98 75 98 dBratio (DVCC ± /DVIO) 70°C 75 97 75 97 Sl t 25°C 4.6 5.6 4.8 5.6 ICC Supply current (two amplifiers) VO = 0, No load 0°C 4.7 6.4 4.8 6.4 mA(two am lifiers) 70°C 4.4 6.4 4.6 6.4 VO1 /VO2 Crosstalk attenuation AVD = 100 25°C 120 120 dB TL052C and TL052AC operating characteristics at specified free-air temperature TL052C, TL052AC PARAMETER TEST CONDITIONS TA † VCC ± = ± 5 V VCC ± = ± 15 V UNITA MIN TYP MAX MIN TYP MAX SR + Slew rate at unity gain 25°C 17.8 9 20.7 SR + Slew rate at unity gain R L = 2 kW, C L = 100 pF,Full range 8 V/ms SR Ne gative slew rate See Figure 1 25°C 15.4 9 17.8 V/ms SR – g at unity gain‡ Full range 8 25°C 55 56 tr Rise time 0°C 54 55 70°C 63 63 nsVI(PP) = ± 10 mV, R2 k W 25°C 55 57 ns tf Fall time R L = 2 kW, C L = 100pF 0°C 54 56C L = 100 F, See Figures 1 and 2 70°C 62 64g 25°C 24% 19% Overshoot factor 0°C 24% 19% 70°C 24% 19% V Equivalent input noise f = 10 Hz 25°C 71 71 nV/√HzVn q voltage§ R S = 20 W , f = 1 kHz 25°C 19 19 30 nV/√H z VN(PP) Peak-to-peak equivalent input noise current See Figure 3f = 10 Hz t 10 kHz 25°C 4 4 mV In Equivalent input noise current f = 1 kHz 25°C 0.01 0.01 pA/√Hz THD Total harmonic distortion¶ R S = 1 kW , f = 1 kHz R L = 2 kW , 25°C 0.003% 0.003% V1 0 V R2 k W 25°C 3 3 B1 Unity-gain bandwidth VI = 10 mV, C L =2 5pF R L = 2 kW , See Figure 4 0°C 3.2 3.2 MHzC L = 25 F, See Figure 4 70°C 2.6 2.7 Phase margin at unity V1 0 m V R2 k W 25°C 60° 63° fm Phase margin at unity gain VI = 10 mV, C L = 25 pF, R L = 2 kW , See Figure 4 0°C 59° 63°gain C L = 25 F, See Figure 4 70°C 60° 63° † Full range is 0°C to 70°C. ‡ For VCC ± =± 5 V, VI(PP) = ± 1 V; for VCC ± = ± 15 V, VI(PP) =± 5 V. § This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters. ¶ For VCC ± = ± 5 V, VO(RMS) = 1 V; for VCC ± =± 15 V, VO(RMS) = 6 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TL052I and TL052AI electrical characteristics at specified free-air temperature TL052I, TL052AI PARAMETER TEST CONDITIONS TA † VCC ± = ± 5 V VCC ± = ± 15 V UNITA MIN TYP MAX MIN TYP MAX TL052I 25°C 0.73 3.5 0.65 1.5 VIO Input offset voltage TL052I Full range 5.3 3.3 mVVIO Input offset voltage V0 TL052AI 25°C 0.51 2.8 0.4 0.8 mV VO = 0, VIC = 0, TL052AI Full range 4.6 2.6 a VIO Temperat re coefficient‡ VIC = 0, R S = 50 W TL052I 25°C to 85°C 7 6 mV/°Ca VIO Temperature coefficient‡ TL052AI 25°C to 85°C 6 6 25 mV/°C Input offset voltage long- term drift§ VO = 0, R S = 50 W VIC = 0, 25°C 0.04 0.04 mV/mo IIO Input offset current VO = 0, VIC = 0, 25°C 4 100 5 100 pA IIO Input offset current O , See Figure 5 IC , 85°C 0.06 10 0.07 10 nA IIB Input bias current VO = 0, VIC = 0, 25°C 20 200 30 200 pA IIB Input bias current O , See Figure 5 IC , 85°C 0.6 20 0.7 20 nA VICR Common-mode input 25°C to –2.3 to 5.6 –1 1 to –12.3 to 15.6 VVICR voltage range Full range to –1 1 to V R L =1 0kW 25°C 3 4.2 13 13.9 VOM Maximum positive peak R L = 10 kW Full range 3 13 VVOM+ output voltage swing R L =2k W 25°C 2.5 3.8 11.5 12.7 V R L = 2 kW Full range 2.5 11.5 R L =1 0kW VOM Maximum negative peak R L = 10 kW Full range –2.5 –12 VVOM– g output voltage swing R L =2k W V R L = 2 kW Full range –2.3 –1 1 L i l diff ti l 25°C 25 59 50 105 AVD Large-signal differential voltage amplification¶ R L = 2 kW –40°C 30 74 60 145 V/mVvoltage am lification¶ 85°C 20 43 30 76 ri Input resistance 25°C 1012 1012 W ci Input capacitance 25°C 10 12 pF Common mode V V min 25°C 65 85 75 93 CMRR C ommon-mo de rejection ratio VIC = VICRm in, VO = 0, R S = 50 W –40°C 65 83 75 90 dBrejection ratio VO = 0, 85°C 65 84 75 93 † Full range is –40°C to 85°C. ‡ This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters § Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. ¶ At VCC ± = ± 5 V, VO = ± 2.3 V; at VCC ± = ± 15 V, VO = ± 10 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 19POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL052I and TL052AI electrical characteristics at specified free-air temperature (continued) TL052I, TL052AI PARAMETER TEST CONDITIONS TA VCC ± = ± 5 V VCC ± = ± 15 V UNITA MIN TYP MAX MIN TYP MAX S l lt j ti 25°C 75 99 75 99 kSVR Supply-voltage rejection ratio (DVCC ± /DVIO) VO = 0, R S = 50 W –40°C 75 98 75 98 dBratio (DVCC ± /DVIO) 85°C 75 99 75 99 Sl t 25°C 4.6 5.6 4.8 5.6 ICC Supply current (two amplifiers) VO = 0, No load –40°C 4.5 6.4 4.7 6.4 mA(two am lifiers) 85°C 4.4 6.4 4.6 6.4 VO1 /VO2 Crosstalk attenuation AVD = 100 25°C 120 120 dB TL052I and TL052AI operating characteristics at specified free-air temperature TL052I, TL052AI PARAMETER TEST CONDITIONS TA † VCC ± = ± 5 V VCC ± = ± 15 V UNITA MIN TYP MAX MIN TYP MAX SR + Sle rate at nit gain‡ 25°C 17.8 9 20.7 SR + Slew rate at unity gain‡ R L = 2 kW, C L = 100 pF, Full range 8 V/ms SR Ne gative slew rate at L , L , See Figure 1 25°C 15.4 9 17.8 V/ms SR – g unity gain‡ Full range 8 25°C 55 56 tr Rise time –40°C 52 53 85°C 64 65 ns VI(PP)= ± 10 mV, 25°C 55 57 ns tf Fall time VI(PP) = ± 10 mV , R L = 2 kW, C L = 100 pF, –40°C 51 53 See Figures 1 and 2 85°C 64 65 25°C 24% 19% Overshoot factor –40°C 24% 19% 85°C 24% 19% V Equivalent input noise f = 10 Hz 25°C 71 71 Vn q voltage§ R S = 20 W , f = 1 kHz 25°C 19 19 30 VN(PP) Peak-to-peak equivalent input noise current See Figure 3 f = 10 Hz to 10 kHz 25°C 4 4 mV In Equivalent input noise current f = 1 kHz 25°C 0.01 0.01 pA/√Hz THD Total harmonic distortion¶ R S = 1 kW , f = 1 kHz R L = 2 kW , 25°C 0.003% 0.003% V1 0 V R2 k W 25°C 3 3 B1 Unity-gain bandwidth VI = 10 mV, C L =2 5pF R L = 2 kW , See Figure 4 –40°C 3.5 3.6 MHzC L = 25 F, See Figure 4 85°C 2.5 2.6 Phase margin at unity V1 0 m V R2 k W 25°C 60° 63° fm Phase margin at unity gain VI = 10 mV, C L = 25 pF, R L = 2 kW , See Figure 4 –40°C 58° 61°gain C L = 25 F, See Figure 4 85°C 60° 63° † Full range is –40°C to 85°C. ‡ For VCC ± =± 5 V, VI(PP) = ± 1 V; for VCC ± = ± 15 V, VI(PP) =± 5 V. § This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters. ¶ For VCC ± = ± 5 V, VO(RMS) = 1 V; for VCC ± =± 15 V, VO(RMS) = 6 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TL052M and TL052AM electrical characteristics at specified free-air temperature TL052M, TL052AM PARAMETER TEST CONDITIONS TA † VCC ± = ± 5 V VCC ± = ± 15 V UNITA MIN TYP MAX MIN TYP MAX TL052M 25°C 0.73 3.5 0.65 1.5 VIO Input offset voltage TL052M Full range 6.5 4.5 mVVIO Input offset voltage V0 TL052AM 25°C 0.51 2.8 0.4 0.8 mV VO = 0, VIC =0 TL052AM Full range 5.8 3.8VIC = 0, R S = 50 W TL052M 25°C to 10 9 a VIO Temperature coefficient R S 50 W TL052M 125°C 10 9 mV/°Ca VIO of input offset voltage TL052AM 25°C to 125°C 9 8 mV/°C Input offset voltage long- term drift‡ VO = 0, R S = 50 W VIC = 0, 25°C 0.04 0.04 mV/mo IIO Input offset current VO = 0, VIC = 0, 25°C 4 100 5 100 pA IIO Input offset current O See Figure 5 IC 125°C 1 20 2 20 nA IIB Input bias current VO = 0, VIC = 0, 25°C 20 200 30 200 pA IIB Input bias current O See Figure 5 125°C 10 50 20 50 nA VICR Common-mode input 25°C to –2.3 to 5.6 –1 1 to –12.3 to 15.6 VVICR voltage range Full range to –1 1 to V R L =1 0kW 25°C 3 4.2 13 13.9 VOM Maximum positive peak R L = 10 kW Full range 3 13 VVOM+ output voltage swing R L =2k W 25°C 2.5 3.8 11.5 12.7 V R L = 2 kW Full range 2.5 11.5 R L =1 0kW VOM Maximum negative peak R L = 10 kW Full range–2.5 –12 VVOM– g output voltage swing R L =2k W R L = 2 kW Full range–2.3 –1 1 Large signal differential 25°C 25 59 50 105 AVD Large-signal differential voltage amplification§ R L = 2 kW –55°C 30 76 60 149 V/mVvoltage am lification§ 125°C 10 32 15 49 ri Input resistance 25°C 1012 1012 W ci Input capacitance 25°C 10 12 pF Common mode VIC = VICRmin, 25°C 65 85 75 93 CMRR C ommon-mo de rejection ratio VIC VICRmin, VO = 0, –55°C 65 83 75 92 dBrejection ratio R S = 50 W 125°C 65 84 75 94 Supply voltage rejection 25°C 75 99 75 99 kSVR Supply-voltage rejection ratio (DVCC ± /DVIO) VO = 0, R S = 50 W –55°C 75 98 75 98 dBratio (DVCC ± /DVIO) 125°C 75 100 75 100 Supply current 25°C 4.6 5.6 4.8 5.6 ICC Supply current (two amplifiers) VO = 0, No load –55°C 4.4 6.4 4.5 6.4 mA(two am lifiers) 125°C 4.2 6.4 4.4 6.4 VO1 /VO2 Crosstalk attenuation AVD = 100 25°C 120 120 dB † Full range is – 55°C to 125°C. ‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. § For VCC ± = ± 5 V, VO = ± 2.3 V; at VCC ± = ± 15 V, VO = ± 10 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 21POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL052M and TL052AM operating characteristics at specified free-air temperature TL052M, TL052AM PARAMETER TEST CONDITIONS TA † VCC ± = ± 5 V VCC ± = ± 15 V UNITA MIN TYP MAX MIN TYP MAX SR + Positive slew rate 25°C 17.8 9 20.7 SR + at unity gain‡ R L = 2 kW, C L 100 pF Full range 8 V/ms SR Ne gative slew rate C L = 100 pF, See Figure 1 25°C 15.4 9 17.8 V/ms SR – g at unity gain‡ See Figure 1 Full range 8 25°C 55 56 tr Rise time –55°C 51 52 125°C 68 68 nsVI(PP) = ± 10 mV, R2 k W 25°C 55 57 ns tf Fall time R L = 2 kW, C L = 100pF –55°C 51 52C L = 100 F, See Figures 1 and 2 125°C 68 69g 25°C 24% 19% Overshoot factor –55°C 25% 19% 125°C 25% 19% V Equivalent input noise f = 10 Hz 25°C 71 71 nV/√HzVn q voltage§ R S =2 0W f = 1 kHz 25°C 19 19 nV/√H z VN(PP) Peak-to-peak equivalent input noise current R S = 20 W , See Figure 3 f = 10 Hz to 10 kHz 25°C 4 4 mV In Equivalent input noise current f = 1 kHz 25°C 0.01 0.01 pA/√Hz THD Total harmonic distortion¶ R S = 1 kW , f = 1 kHz R L = 2 kW , 25°C 0.003% 0.003% V1 0 V R2 k W 25°C 3 3 B1 Unity-gain bandwidth VI = 10 mV, C L =2 5pF R L = 2 kW , See Figure 4 –55°C 3.6 3.7 MHzC L = 25 F, See Figure 4 125°C 2.3 2.4 P h iti t V1 0 V R2 k W 25°C 60° 63° fm Phase margin at unity gain VI = 10 mV, C L =2 5pF R L = 2 kW , See Figure 4 –55°C 57° 61°gain C L = 25 F, See Figure 4 125°C 60° 63° † Full range is – 55°C to 125°C. ‡ For VCC ± =± 5 V, VI(PP) = ± 1 V; for VCC ± = ± 15 V, VI(PP) =± 5 V. § This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters. ¶ For VCC ± = ± 5 V, VO(RMS) = 1 V; for VCC ± =± 15 V, VO(RMS) = 6 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TL052Y electrical characteristics, TA = 25°C TL052Y PARAMETER TEST CONDITIONS VCC ± = ± 5 V VCC ± = ± 15 V UNIT MIN TYP MAX MIN TYP MAX VIO Input offset voltage VO =0 0.73 0.65 mV Input offset voltage long-term drift VO = 0, R S = 50 W VIC = 0, 0.04 0.04 mV/mo IIO Input offset current VO = 0, See Figure 5 VIC = 0, 4 5 pA IIB Input bias current VO = 0, See Figure 5 VIC = 0, 20 30 pA VICR Common-mode input voltage range –2.3 to 5.6 –12.3 to 15.6 V VOM Maximum positive peak R L = 10 kW 4.2 13.9 VOM+ output voltage swing R L = 2 kW 3.8 12.7 V VOM Maximum negative peak outputR L = 10 kW –3.5 –13.2 V VOM– g voltage swing R L = 2 kW –3.2 –12 AVD Large-signal differential voltage amplification† R L = 2 kW 59 105 V/mV ri Input resistance 1012 1012 W ci Input capacitance 10 12 pF CMRR Common-mode rejection ratio VIC = VICRmin, VO = 0, R S = 50 W 85 93 dB kSVR Supply-voltage rejection ratio (DVCC ± /DVIO) VO = 0, R S = 50 W 99 99 dB ICC Supply current (two amplifiers)VO = 0, No load 4.6 4.8 mA VO1 /VO2 Crosstalk attenuation AVD = 100 120 120 dB † For VCC ± =± 5 V, VO = ± 2.3 V; at VCC ± = ± 15 V, VO = ± 10 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 23POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL052Y operating characteristics, TA = 25°C TL052Y PARAMETER TEST CONDITIONS VCC ± = ± 5 V VCC ± = ± 15 V UNIT MIN TYP MAX MIN TYP MAX SR + Positive slew rate at unity gain† R L = 2 kW, C L = 100 pF, 17.8 20.7 V/ms SR – Negative slew rate at unity gain† L , L , See Figure 1 15.4 17.8 V/ms tr Rise time VI(PP)= ± 10 mV, 55 56 ns tf Fall time VI(PP) = ± 10 mV , R L = 2 kW, C L = 100 pF, 55 57 ns Overshoot factor See Figures 1 and 2 24% 19% V Equivalent input noise f = 10 Hz 71 71 V/√HVn q voltage‡ R S = 20 W , f = 1 kHz 19 19 nV/√H z VN(PP) Peak-to-peak equivalent input noise current See Figure 3 f = 10 Hz to 10 kHz 4 4 mV In Equivalent input noise current f = 1 kHz 0.01 0.01 pA/√Hz THD Total harmonic distortion§ R S = 1 kW , f = 1 kHz R L = 2 kW , 0.003% 0.003% B1 Unity-gain bandwidth VI = 10 mV, C L = 25 pF, R L = 2 kW , See Figure 4 3 3 MHz fm Phase margin at unity gainVI = 10 mV, C L = 25 pF, R L = 2 kW , See Figure 4 60° 63° † This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters. ‡ For VCC ± =± 5 V, VI(PP) = ± 1 V; for VCC ± = ± 15 V, VI(PP) =± 5 V. § For VCC ± = ± 5 V, VO(RMS) = 1 V; for VCC ± =± 15 V, VO(RMS) = 6 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TL054C and TL054AC electrical characteristics at specified free-air temperature TL054C, TL054AC PARAMETER TEST CONDITIONS TA † VCC ± = ± 5 V VCC ± = ± 15 V UNIT MIN TYP MAX MIN TYP MAX TL054C 25°C 0.64 5.5 0.56 4 VIO Input offset voltage TL054C Full range 7.7 6.2 mVVIO Input offset voltage TL054AC 25°C 0.57 3.5 0.5 1.5 mV VO =0 TL054AC Full range 5.7 3.7 a VIO Temperature coefficient VO = 0, VIC = 0, R S = 50 W TL054C 25°C to 70°C 25 23 m V/°Ca VIO of input offset voltage R S 50 W TL054AC 25°C to 70°C 24 23 m V/°C Input offset voltage long-term drift‡ 25°C 0.04 0.04 mV/mo IIO Input offset current VO = 0, V IC = 0, 25°C 4 100 5 100 pA IIO Input offset current OI C See Figure 5 70°C 0.02 1 0.025 1 nA IIB Input bias current VO = 0, V IC = 0, 25°C 20 200 30 200 pA IIB Input bias current OI C See Figure 5 70°C 0.15 4 0.2 4 nA VICR Common-mode input 25°C to –2.3 to 5.6 –1 1 to –12.3 to 15.6 VVICR voltage range Full range to –1 1 to V R L =1 0kW 25°C 3 4.2 13 13.9 VOM Maximum positive peak R L = 10 kW Full range 3 13 VVOM + output voltage swing R L =2k W 25°C 2.5 3.8 11.5 12.7 V R L = 2 kW Full range 2.5 11.5 R L =1 0kW VOM Maximum negative peak R L = 10 kW Full range –2.5 –12 VVOM – g output voltage swing R L =2k W R L = 2 kW Full range –2.3 –1 1 Large signal differential 25°C 25 72 50 133 AVD Large-signal differential voltage amplification§ R L = 2 kW 0°C 30 88 60 173 V/mVvoltage am lification§ 70°C 20 57 30 85 ri Input resistance 25°C 1012 1012 W ci Input capacitance 25°C 10 12 pF Common mode V V min 25°C 65 84 75 92 CMRR C ommon-mo de rejection ratio VIC = VICRm in, VO =0 R S =5 0W 0°C 65 84 75 92 dBrejection ratio VO = 0, R S = 50 W 70°C 65 84 75 93 Supply voltage rejectionV ± 5Vt o± 15 V 25°C 75 99 75 99 kSVR Supply-voltage rejection ratio (DVCC ± /D VIO) VCC ± = ± 5 V to ± 15 V, VO =0 R S =5 0W 0°C 75 99 75 99 dBratio (DVCC ± /D VIO) VO = 0, R S = 50 W 70°C 75 99 75 99 Supply current 25°C 8.1 11.2 8.4 11.2 ICC Supply current (four amplifiers) VO = 0, No load 0°C 8.2 12.8 8.5 12.8 mA(four am lifiers) 70°C 7.9 11.2 8.2 11.2 VO1 /VO2 Crosstalk attenuation AVD = 100 25°C 120 120 dB † Full range is 0°C to 70°C. ‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. § For VCC ± = ± 5 V, VO = ± 2.3 V, at VCC ± = ± 15 V, VO = ±10 V.B

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 25POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL054C and TL054AC operating characteristics at specified free-air temperature TL054C, TL054C PARAMETER TEST CONDITIONS TA † VCC ± = ± 5 V VCC ± = ± 15 V UNIT MIN TYP MAX MIN TYP MAX SR+ Positive slew rate 25°C 15.4 10 17.8 SR + at unity gain 0°C 15.7 8 17.9 R L = 2 kW ,C L = 100 pF, 70°C 14.4 8 17.5 V/ms SR Ne gative slew rate at L L See Figure 1 and Note 7 25°C 13.9 10 15.9 V/ms SR – g unity gain‡ 0°C 14.3 8 16.1 70°C 13.3 8 15.5 25°C 55 56 tr Rise time 0°C 54 55 70°C 63 63 nsVI(PP) = ±10 mV, R L 2k W 25°C 55 57 ns tf Fall time R L = 2 kW , C L = 100pF 0°C 54 56C L = 100 F, See Figures 1 and 2 70°C 62 64See Figures 1 and 2 25°C 24% 19% Overshoot factor 0°C 24% 19% 70°C 24% 19% V Equivalent input noise f = 10 Hz 25°C 75 75 nV/√HzVn q voltage§ R S = 20 W, f = 1 kHz 25°C 21 21 45 nV/√Hz VN(PP) Peak-to-peak equivalent input noise voltage See Figure 3f = 10 Hz to 10 kHz 25°C 4 4 mV In Equivalent input noise current f = 1 kHz 25°C 0.01 0.01 pA/√Hz THD Total harmonic distortion¶ R S = 1 kW , f = 1 kHz R L = 2 kW , 25°C 0.003% 0.003% V1 0 m V R 2 k W 25°C 2.7 2.7 B1 Unity-gain bandwidth VI = 10 mV, R L = 2 kW , C L =2 5pF See Figure 4 0°C 3 3 MHzC L = 25 F, See Figure 4 70°C 2.4 2.4 Phase margin at VI=1 0m V R L =2k W 25°C 61° 64° fm Phase margin at unity gain VI = 10 mV , R L = 2 kW , C L = 25 pF, See Figure 4 0°C 60° 64°unity gain C L = 25 F, See Figure 4 70°C 61° 63° † Full range is 0°C to 70°C. ‡ For VCC ± = ± 5 V, VI(PP) = ± 1 V; for VCC ± = ± 15 V, VI(PP) = ± 5 V. § This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters. ¶ For VCC ± = ± 5 V, Vo(rms) = 1 V; for VCC ± = ± 15 V, Vo(rms) = 6 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TL054I and TL054AI electrical characteristics at specified free-air temperature TL054I, TL054AI PARAMETER TEST CONDITIONS TA † VCC ± = ± 5 V VCC ± = ± 15 V UNITA MIN TYP MAX MIN TYP MAX TL054I 25°C 0.64 5.5 0.56 4 VIO Input offset voltage TL054I Full range 8.8 7.3 mVVIO In ut offset voltage TL054AI 25°C 0.57 3.5 0.5 1.5 mV VO =0 TL054AI Full range 6.8 4.8 a VIO Temperature coefficient of VO = 0, VIC = 0, R S = 50 W TL054I 25°C to 85°C 25 24 mV/°Ca VIO input offset voltage R S 50 W TL054AI 25°C to 85°C 25 23 mV/°C Input offset voltage long-term drift‡ 25°C 0.04 0.04 mV/mo IIO Input offset current VO = 0, V IC = 0, 25°C 4 100 5 100 pA IIO Input offset current OI C See Figure 5 85°C 0.06 10 0.07 10 nA IIB Input bias current VO = 0, V IC = 0, 25°C 20 200 30 200 pA IIB Input bias current OI C See Figure 5 85°C 0.6 20 0.7 20 nA VICR Common-mode input 25°C to –2.3 to 5.6 –1 1 to –12.3 to 15.6 VVICR voltage range Full range to –1 1 to V R L =1 0kW 25°C 3 4.2 13 13.9 VOM Maximum positive peak R L = 10 kW Full range 3 13 VVOM + output voltage swing R L =2k W 25°C 2.5 3.8 11.5 12.7 V R L = 2 kW Full range 2.5 11.5 R L =1 0kW VOM Maximum negative peak R L = 10 kW Full range –2.5 –12 VVOM – g output voltage swing R L =2k W R L = 2 kW Full range –2.3 –1 1 Large signal differential 25°C 25 72 50 133 AVD Large-signal differential voltage amplification§ R L = 2 kW –40°C 30 101 60 212 V/mVvoltage am lification§ 85°C 20 50 30 70 ri Input resistance 25°C 1012 1012 W ci Input capacitance 25°C 10 12 pF Common mode V V min 25°C 65 84 75 92 CMRR C ommon-mo de rejection ratio VIC = VICRm in, VO =0 R S =5 0W –40°C 65 83 75 92 dBrejection ratio VO = 0, R S = 50 W 85°C 65 84 75 93 Supply voltage rejectionV ± 5Vt o± 15 V 25°C 75 99 75 99 kSVR Supply-voltage rejection ratio (DVCC ± /DVIO) VCC ± = ± 5 V to ± 15 V, VO =0 R S =5 0W –40°C 75 98 75 99 dBratio (DVCC ± /DVIO) VO = 0, R S = 50 W 85°C 75 99 75 99 Supply current 25°C 8.1 11.2 8.4 11.2 ICC Supply current (four amplifiers) VO = 0, No load –40°C 7.9 12.8 8.2 12.8 mA(four am lifiers) 85°C 7.6 11.2 7.9 11.2 VO1 /VO2 Crosstalk attenuation AVD = 100 25°C 120 120 dB † Full range is –40°C to 85°C. ‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. § For VCC ± = ± 5 V, VO = ± 2.3 V, at VCC ± = ± 15 V, VO = ±10 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 27POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL054I and TL054AI operating characteristics at specified free-air temperature TL054I, TL054AI PARAMETER TEST CONDITIONS TA † VCC ± = ± 5 V VCC ± = ± 15 V UNITA MIN TYP MAX MIN TYP MAX SR+ Positive slew rate 25°C 15.4 10 17.8 SR + at unity gain –40°C 16.4 8 18 R L = 2 kW ,C L = 100 pF, 85°C 14 8 17.3 V/ms SR Ne gative slew rate at L L See Figure 1 25°C 13.9 10 15.9 V/ms SR – g unity gain‡ –40°C 14.7 8 16.1 85°C 13 8 15.3 25°C 55 56 tr Rise time –40°C 52 53 85°C 64 65 ns VI(PP) = ±10 mV, RL = 2 kW , 25°C 55 57 ns tf Fall time VI(PP) ±10 mV, R L 2 kW , C L = 100 pF, –40°C 51 53 See Figures 1 and 2 85°C 64 65 25°C 24% 19% Overshoot factor –40°C 24% 19% 85°C 24% 19% V Equivalent input noise f = 10 Hz 25°C 75 75 nV/√HzVn q voltage§ R S = 20 W, f = 1 kHz 25°C 21 21 45 nV/√Hz VN(PP) Peak-to-peak equivalent input noise voltage See Figure 3f = 10 Hz to 10 kHz 25°C 4 4 mV In Equivalent input noise current f = 1 kHz 25°C 0.01 0.01 pA/√Hz THD Total harmonic distortion¶ R S = 1 kW , f = 1 kHz R L = 2 kW , 25°C 0.003% 0.003% V1 0 m V R 2 k W 25°C 2.7 2.7 B1 Unity-gain bandwidth VI = 10 mV, R L = 2 kW , C L =2 5pF See Figure 4 –40°C 3.3 3.3 MHzC L = 25 F, See Figure 4 85°C 2.3 2.4 Phase margin at VI=1 0m V R L =2k W 25°C 61° 64° fm Phase margin at unity gain VI = 10 mV , R L = 2 kW , C L = 25 pF, See Figure 4 –40°C 59° 62°unity gain C L = 25 F, See Figure 4 85°C 61° 64° † Full range is –40°C to 85°C. ‡ For VCC ± = ± 5 V, VI(PP) = ± 1 V; for VCC ± = ± 15 V, VI(PP) = ± 5 V. § This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters. ¶ For VCC ± = ± 5 V, Vo(rms) = 1 V; for VCC ± = ± 15 V, Vo(rms) = 6 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

28 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TL054M and TL054AM electrical characteristics at specified free-air temperature TL054M, TL054AM PARAMETER TEST CONDITIONS TA † VCC ± = ± 5 V VCC ± = ± 15 V UNITA MIN TYP MAX MIN TYP MAX TL054M 25°C 0.64 5.5 0.56 4 VIO Input offset voltage TL054M Full range 10.5 9 mVVIO Input offset voltage TL054AM 25°C 0.57 3.5 0.5 1.5 mV VO =0 TL054AM Full range 8.5 6.5 a VIO Temperature coefficient of VO = 0, VIC = 0, R S = 50 W TL054M 25°C to 85°C 21 20 mV/°Ca VIO input offset voltage R S 50 W TL054AM 25°C to 85°C 21 20 mV/°C Input offset voltage long-term drift‡ 25°C 0.04 0.04 mV/mo IIO Input offset current VO = 0, V IC = 0, 25°C 4 100 5 100 pA IIO Input offset current OI C See Figure 5 125°C 1 20 2 20 nA IIB Input bias current VO = 0, V IC = 0, 25°C 20 200 30 200 pA IIB Input bias current OI C See Figure 5 125°C 10 50 20 50 nA VICR Common-mode input 25°C to –2.3 to 5.6 –1 1 to –12.3 to 15.6 VVICR voltage range Full range to –1 1 to V R L =1 0kW 25°C 3 4.2 13 13.9 VOM Maximum positive peak R L = 10 kW Full range 3 13 VVOM + output voltage swing R L =2k W 25°C 2.5 3.8 11.5 12.7 V R L = 2 kW Full range 2.5 11.5 R L =1 0kW VOM Maximum negative peak R L = 10 kW Full range –2.5 –12 VVOM – g output voltage swing R L =2k W R L = 2 kW Full range –2.3 –1 1 Large signal differential 25°C 25 72 50 133 AVD Large-signal differential voltage amplification§ R L = 2 kW –55°C 30 99 60 209 V/mVvoltage am lification§ 125°C 10 35 15 35 ri Input resistance 25°C 1012 1012 W ci Input capacitance 25°C 10 12 pF Common mode VIC = VICRmin, 25°C 65 84 75 92 CMRR C ommon-mo de rejection ratio IC ICR , VO = 0, –55°C 65 83 75 92 dBrejection ratio R S = 50 W 125°C 65 84 75 93 Supply voltage rejectionVCC ± = ± 5 V to ± 15 V, 25°C 75 99 75 99 kSVR Supply-voltage rejection ratio (DVCC ± /DVIO) CC ± , VO = 0, –40°C 75 98 75 98 dBratio (DVCC ± /DVIO) R S = 50 W 85°C 75 100 75 100 Supply current 25°C 8.1 11.2 8.4 11.2 ICC Supply current (four amplifiers) VO = 0, No load –55°C 7.8 12.8 8.1 12.8 mA(four am lifiers) 125°C 7.1 11.2 7.5 11.2 VO1 /VO2 Crosstalk attenuation AVD = 100 25°C 120 120 dB † Full range is –55°C to 125°C. ‡ Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV. § For VCC ± = ± 5 V, VO = ± 2.3 V, at VCC ± = ± 15 V, VO = ±10 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 29POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL054M and TL054AM operating characteristics at specified free-air temperature TL054M, TL054AM PARAMETER TEST CONDITIONS TA † VCC ± = ± 5 V VCC ± = ± 15 V UNITA MIN TYP MAX MIN TYP MAX SR+ Positive slew rate 25°C 15.4 10 17.8 SR + at unity gain –55°C 16.7 18.3 Nt i l t t R L = 2 kW ,C L = 100 pF, 125°C 12.9 16.7 V/ms SR Negative slew rate at unity gain‡ L L See Figure 1 25°C 13.9 10 15.9 V/ms SR – unity gain‡ –55°C 14.7 16.3 125°C 12.2 14.5 25°C 55 56 tr Rise time –55°C 51 52 125°C 68 68 nsVI(PP) = ±10 mV, R L 2k W 25°C 55 57 ns tf Fall time R L = 2 kW , C L = 100pF –55°C 51 52C L = 100 F, See Figures 1 and 2 125°C 68 69See Figures 1 and 2 25°C 24% 19% Overshoot factor –55°C 25% 19% 125°C 25% 19% V Equivalent input noise f = 10 Hz 25°C 75 75 nV/√HzVn q voltage§ R S = 20 W, f = 1 kHz 25°C 21 21 45 nV/√Hz VN(PP) Peak-to-peak equivalent input noise voltage See Figure 3 f = 10 Hz to 10 kHz 25°C 4 4 mV In Equivalent input noise current f = 1 kHz 25°C 0.01 0.01 pA/√Hz THD Total harmonic distortion¶ R S = 1 kW , f = 1 kHz R L = 2 kW , 25°C 0.003% 0.003% V1 0 m V R 2 k W 25°C 2.7 2.7 B1 Unity-gain bandwidth VI = 10 mV, R L = 2 kW , C L =2 5pF See Figure 4 –55°C 3.4 3.4 MHzC L = 25 F, See Figure 4 125°C 2.1 2.1 Phase margin at VI=1 0m V R L =2k W 25°C 61° 64° fm Phase margin at unity gain VI = 10 mV , R L = 2 kW , C L = 25 pF, See Figure 4 –55°C 58° 62°unity gain C L = 25 F, See Figure 4 125°C 60° 64° † Full range is –55°C to 125°C. ‡ For VCC ± = ± 5 V, VI(PP) = ± 1 V; for VCC ± = ± 15 V, VI(PP) = ± 5 V. § This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters. ¶ For VCC ± = ± 5 V, Vorms = 1 V; for VCC ± = ± 15 V, Vorms = 6 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

30 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TL054Y electrical characteristics, TA = 25°C TL054Y PARAMETER TEST CONDITIONS VCC ± = ± 5 V VCC ± = ± 15 V UNIT MIN TYP MAX MIN TYP MAX VIO Input offset voltage VO = 0, R S = 50 W VIC = 0, 0.64 0.56 mV IIO Input offset current VO = 0, V IC = 0, See Figure 5 4 5 pA IIB Input bias current VO = 0, V IC = 0, See Figure 5 20 30 pA VICR Common-mode input voltage range –2.3 to 5.6 –12.3 to 15.6 V VOM Maximum positive peak R L = 10 kW 4.2 13.9 VVOM + output voltage swing R L = 2 kW 3.8 12.7 V VOM Maximum negative peak R L = 10 kW –3.5 –13.2 VVOM – g output voltage swing R L = 2 kW –3.2 –12 V AVD Large-signal differential voltage amplification† R L = 2 kW , 72 133 V/mV ri Input resistance 1012 1012 W ci Input capacitance 10 12 pF CMRR Common-mode rejection ratio VIC = VICRmin, VO = 0, R S = 50 W 84 92 dB kSVR Supply-voltage rejection ratio (DVCC ± /D VIO) VCC ± = ± 5 V to ± 15 V, VO = 0, R S = 50 W 99 99 dB ICC Supply current (four amplifiers) VO = 0, No load 8.1 8.4 mA VO1 /VO2 Crosstalk attenuation AVD = 100 120 120 dB † For VCC ± = ± 5 V, VO = ± 2.3 V, at VCC ± = ± 15 V, VO = ±10 V.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 31POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TL054Y operating characteristics, TA = 25°C TL054Y PARAMETER TEST CONDITIONS VCC ± = ± 5 V VCC ± = ± 15 V UNIT MIN TYP MAX MIN TYP MAX SR+ Positive slew rate at unity gain† R L = 2 kW ,C L = 100 pF, 15.4 17.8 V/ms SR– Negative slew rate at unity gain L L See Figure 1 13.9 15.9 V/ms tr Rise time VI(PP) = ±10 mV, R2 k 55 56 ns tf Fall time R L = 2 kW , C L = 100pF 55 57 ns Overshoot factor C L = 100 F, See Figures 1 and 2 24% 19% V Equivalent input noise f = 10 Hz 75 75 nV/√HzVn q voltage‡ R S = 20 W, f = 1 kHz 21 21 nV/√Hz VN(PP) Peak-to-peak equivalent input noise voltage See Figure 3 f = 10 Hz to 10 kHz 4 4 mV In Equivalent input noise current f = 1 kHz 0.01 0.01 pA/√Hz THD Total harmonic distortion§ R S = 1 kW , f = 1 kHz R L = 2 kW , 0.003% 0.003% B1 Unity-gain bandwidth VI = 10 mV, R L = 2 kW , C L = 25 pF, See Figure 4 2.7 2.7 MHz fm Phase margin at unity gain VI = 10 mV, R L = 2 kW , C L = 25 pF, See Figure 4 61° 64° † For VCC ± = ± 5 V, VI(PP) = ± 1 V; for VCC ± = ± 15 V, VI(PP) = ± 5 V. ‡ This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters. § For VCC ± = ± 5 V, Vo(rms) = 1 V; for VCC ± = ± 15 V, Vo(rms) = 6 V.

32 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

NOTE A: CL includes fixture capacitance. NOTE A: CL includes fixture capacitance. are then subtracted algebraically to determine the bias current of the device. specific application requirements. Please contact the factory for details. Figure 5. Input-Bias and Offset-Current Test Circuit

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 33POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TYPICAL CHARACTERISTICS Table of Graphs FIGURE VIO Input offset voltage Distribution 6 – 11 a VIO Temperature coefficient of input offset voltageDistribution 12, 13, 14 IIB Input bias current vs Common-mode input voltage vs Free-air temperature IIO Input offset current vs Free-air temperature 16 VIC Common-mode input voltage range limits vs Supply voltage vs Free-air temperature VO Output voltage vs Differential input voltage 19, 20 VOM Maximum peak output voltage vs Supply voltage vs Output current vs Free-air temperature 25, 26 27, 28 VO(PP) Maximum peak-to-peak output voltage vs Frequency 22, 23, 24 AVD Large-signal differential voltage amplification vs Load resistance vs Frequency vs Free-air temperature 31, 32, 33 CMRR Common-mode rejection ratio vs Frequency vs Free-air temperature 34, 35 zo Output impedance vs Frequency 37 kSVR Supply-voltage rejection ratio vs Free-air temperature 38 IOS Short-circuit output current vs Supply voltage vs Time vs Free-air temperature ICC Supply current vs Supply voltage vs Free-air temperature 42, 43, 44 45, 46, 47 SR Slew rate vs Load resistance vs Free-air temperature 48 – 53 54 –59 Overshoot factor vs Load capacitance 60 Vn Equivalent input noise voltage vs Frequency 61, 62 THD Total harmonic distortion vs Frequency 63 B1 Unity-gain bandwidth vs Supply voltage vs Free-air temperature 64, 65, 66 67, 68, 69 fm Phase margin vs Supply voltage vs Load capacitance vs Free-air temperature 70, 71, 72 73, 74, 75 76, 77, 78 Phase shift vs Frequency 30 Voltage-follower small-signal pulse responsevs Time 79 Voltage-follower large-signal pulse responsevs Time 80

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

34 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

–1.5 Percentage of Units – % VIO – Input Offset Voltage – mV

433 Units Tested From 1 Wafer Lot

VCC ± = ± 15 V TA = 25°C P Package –1.1 –0.6 0.6 1.1 Figure 7 DISTRIBUTION OF TL051A INPUT OFFSET VOLTAGE 9006003000–300–600 VIO – Input Offset Voltage – mV Percentage of Units – % –900 ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ

393 Units Tested From 1 Wafer Lot

VCC ± = ± 15 V TA = 25°C P Package Figure 8 –1.5 Percentage of A mp lifiers – % VIO – Input Offset Voltage – mV DISTRIBUTION OF TL052 INPUT OFFSET VOLTAGE

476 Amplifiers Tested From 1 Wafer Lot

VCC ± = ± 15 V TA = 25°C P Package –1.2 –0.6 0.6 1.2 Figure 9 –900 –600 –300 0 300 600 900 VIO – Input Offset Voltage – mV Percentage of Amplifiers – % TA = 25°C DISTRIBUTION OF TL052A INPUT OFFSET VOLTAGE

403 Amplifiers Tested From 1 Wafer Lot

VCC ± = ± 15 V P Package

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 35POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TYPICAL CHARACTERISTICS Figure 10 DISTRIBUTION OF TL054 INPUT OFFSET VOLTAGE Percentage of Amplifiers – % VIO – Input Offset Voltage – mV –2 0 1 3–3 –1 2 4 VCC ± = ± 15 V TA = 25°C N Package

1140 Amplifiers Tested From 3 Wafer Lots

VIO – Input Offset Voltage – mV Percentage of Amplifiers – % –1.8

1048 Amplifiers Tested From 3 Wafer Lots

VCC ± = ± 15 V TA = 25°C N Package Figure 12 DISTRIBUTION OF TL051 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT –25 Percentage of Units – % a VIO – Temperature Coefficient – m V/°C –20 –15 –10 –5 0 5 10 15 20 25 ÎÎÎÎÎÎÎÎÎÎ

120 Units Tested From 2 Wafer Lots

VCC ± = ± 15 V TA = 25°C to 125°C P Package Percentage of Amplifiers – % a VIO – Temperature Coefficient – mV/°C 20100–10–20–30 DISTRIBUTION OF TL052 INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT ÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ

172 Amplifiers Tested From 2 Wafer Lots

VCC ± = ± 15 V TA = 25°C to 125°C P Package ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ Outlier: One Unit at –34.6 mV/°C Figure 13

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

36 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

–60 a VIO – Temperature Coefficient – m V/°C –40 –20 0 20 40 60 ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ

324 Amplifiers Tested From 3 Wafer Lots

VCC ± = ± 15 V TA = 25°C to 125°C N Package Percentage of Amplifiers – % Figure 15 –15 –10 – Input Bias Current – nA VIC – Common-Mode Input Voltage – V –10 –5 0 5 10 15 TA = 25°C VCC ± = ± 15 V INPUT BIAS CURRENT vs COMMON-MODE INPUT VOLTAGE I IB Figure 16 INPUT BIAS CURRENT AND INPUT OFFSET CURRENT † vs FREE-AIR TEMPERATURE IIO IIB TA – Free-Air Temperature – °C – Input Bias and Offset Currents – nA 0.001 0.01 0.1 100 45 65 85 105 125 VCC ± = ± 15 V VO = 0 VIC = 0 I IBand I IO Figure 17 –16 – Common-Mode Input Voltage – V |VCC ± | – Supply Voltage – V –12 2 4 6 8 10 12 14 16 TA = 25°C COMMON-MODE INPUT VOLTAGE RANGE LIMITS vs SUPPLY VOLTAGE VIC ÎÎÎÎÎ Negative Limit ÎÎÎÎÎ Positive Limit † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

38 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

f – Frequency – Hz 100 k 1 M 10 M – Maximum Peak-to-Peak Output Voltage – V R L = 2 kW TA = 125°C VCC ± = ± 5 V TA = –55°C VCC ± = ± 15 V MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE † vs FREQUENCY VO(PP) Figure 23 – Maximum Peak-to-Peak Output Voltage – V 10 k f – Frequency – Hz 100 k 1 M 10 M MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY VO(PP) ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ TA = 25°C R L = 2 kW ÁÁÁÁÁ ÁÁÁÁÁ VCC ± = ± 5 V ÁÁÁÁÁ ÁÁÁÁÁ VCC ± = ± 15 V Figure 24 10 k 100 k f – Frequency – Hz

1 M 10 M

MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY – Maximum Peak-to-Peak Output Voltage – VVO(PP) ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ R L = 10 kW TA = 25°C ÁÁÁÁÁ ÁÁÁÁÁ VCC ± = ± 15 V ÁÁÁÁÁ VCC ± = ± 5 V Figure 25 – Maximum Peak Output Voltage – V |IO | – Output Current – mA 41 2 1 6 2 08 MAXIMUM PEAK OUTPUT VOLTAGE vs OUTPUT CURRENT |VOM | ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁ ÁÁÁ VOM– ÁÁÁ ÁÁÁ VOM+ VCC ± = ± 5 V R L = 10 kW TA = 25°C 2 6 10 14 18 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

40 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

f – Frequency – Hz

10 M100 1 k 10 k 100 k 1 M

0.1 101 104 102 103 VCC ± = ± 15 V R L = 2 kW C L = 25 pF TA = 25°C AVD Phase Shift 30° 60° 90° 120° 150° 180° LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY 106 105 – Differential Voltage Amplification – V/mVA VD mf – Phase Shift Figure 30 –75 TA – Free-Air Temperature – °C 125 1000 –50 –25 0 25 50 75 100 100 400 R L = 2 kW R L = 10 kW VCC ± = ± 5 V VO = ± 2.3 V – Differential Voltage Amplification – V/mVA VD Figure 31 TL051 AND TL052 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION † vs FREE-AIR TEMPERATURE Figure 32 –75 TA – Free-Air Temperature – °C 125 1000 –50 –25 0 25 50 75 100 100 400 R L = 2 kW R L = 10 kW VCC ± = ± 5 V VO = ± 2.3 V – Differential Voltage Amplification – V/mVA VD TL054 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION † vs FREE-AIR TEMPERATURE † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 41POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TYPICAL CHARACTERISTICS Figure 33 –75 125 1000 –50 –25 0 25 50 75 100 100

400 R L = 10 kW

R L = 2 kW TA – Free-Air Temperature – °C LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION † vs FREE-AIR TEMPERATURE ÁÁÁÁÁ ÁÁÁÁÁ VCC ± = ± 15 V VO = 10 V – Differential Voltage Amplification – V/mVA VD Figure 34 CMRR – Common-Mode Rejection Ratio – dB f – Frequency – Hz 10 M 100 100 1 k 10 k 100 k 1 M VCC ± = ± 5 V TA = 25°C COMMON-MODE REJECTION RATIO vs FREQUENCY Figure 35 100

1 M100 k10 k1 k100 10 M

f – Frequency – Hz VCC ± = ± 15 V TA = 25°C COMMON-MODE REJECTION RATIO vs FREQUENCY CMRR – Common-Mode Rejection Ratio – dB Figure 36 –75 TA – Free-Air Temperature –°C 125 100 –50 –25 0 25 50 75 100 VIC = VICRMin VCC ± = ± 5 V VCC ± = ± 15 V COMMON-MODE REJECTION RATIO † vs FREE-AIR TEMPERATURE CMRR – Common-Mode Rejection Ratio – dB † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

42 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

0.1 – Output Impedance – 1 M 100 10 k 100 k f – Frequency – Hz AVD = 100 AVD = 10 AVD = 1 VCC ± = ± 15 V TA = 25°C ro (open loop) ≈ 250 W OUTPUT IMPEDANCE vs FREQUENCY zo W 0.4 Figure 38 –75 kSVR – Supply-Voltage Rejection Ratio – dB TA – Free-Air Temperature – °C 125–50 –25 02 5 50 75 100 VCC ± = ± 5 V to ± 15 V SUPPLY-VOLTAGE REJECTION RATIO † vs FREE-AIR TEMPERATURE 110 106 102 ÁÁ ÁÁ ÁÁ k SVR Figure 39 IOS – Short-Circuit Output Current – mA |VCC ± | – Supply Voltage – V 24 6 8 10 12 14 VO = 0 TA = 25°C VID = 100 mV VID = –100 mV SHORT-CIRCUIT OUTPUT CURRENT vs SUPPLY VOLTAGE –20 –40 –60 ÁÁ ÁÁ IOS Figure 40 t – Time – s –20 –40 –60 5040302010 600 TA = 25°C VCC ± = ± 15 V VID = 100 mV VID = –100 mV SHORT-CIRCUIT OUTPUT CURRENT vs TIME IOS – Short-Circuit Output Current – mA ÁÁ ÁÁ ÁÁ IOS † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

44 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

–75 125 –50 –25 0 25 50 75 100 0.5 1.5 2.5 TA – Free-Air Temperature – °C VCC ± = ± 5 V VCC ± = ± 15 V VO = 0 No Load ICC – Supply Current – mA ÁÁ ÁÁ ICC TL051 SUPPLY CURRENT † vs FREE-AIR TEMPERATURE Figure 46 –75 125 –50 –25 0 25 50 75 100 VCC ± = ± 15 V VCC ± = ± 5 V ICC – Supply Current – mA ÁÁ ÁÁ ÁÁ ICC TA – Free-Air Temperature – °C VO = 0 No Load TL052 SUPPLY CURRENT † vs FREE-AIR TEMPERATURE Figure 47 –75 125 –50 –25 0 25 50 75 100 TA – Free-Air Temperature – °C ICC – Supply Current – mA ÁÁ ÁÁ ÁÁ ICC ÎÎÎÎÎ ÎÎÎÎÎ VCC ± = ± 5 V ÎÎÎÎÎ ÎÎÎÎÎ VCC ± = ± 15 V VO = 0 No Load TL054 SUPPLY CURRENT † vs FREE-AIR TEMPERATURE Figure 48 SR – Slew Rate – V/ 100401041 R L – Load Resistance – kW 0.4 SR + SR – C L = 100 pF TA = 25°C See Figure 1 VCC ± = ± 5 V m s TL051 SLEW RATE vs LOAD RESISTANCE † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

46 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

0.4 R L – Load Resistance – kW 1 4 10 40 100 SR + SR – SR – Slew Rate – V/m s C L = 100 pF TA = 25°C See Figure 1 VCC ± = ± 5 V TL054 SLEW RATE vs LOAD RESISTANCE Figure 54 –75 TA – Free-Air Temperature – °C 125 –50 –25 0 25 50 75 100 VCC ± = ± 5 V R L = 2 kW SR + SR – SR – Slew Rate – V/m s TL051 SLEW RATE † vs FREE-AIR TEMPERATURE Figure 55 SR+ SR– –75 TA – Free-Air Temperature – °C 125–50 –25 0 25 50 75 100 VCC ± = ± 5 V R L = 2 kW C L = 100 pF See Figure 1 SR – Slew Rate – V/m s TL052 SLEW RATE † vs FREE-AIR TEMPERATURE Figure 56 SR+ SR– –75 TA – Free-Air Temperature – °C 125–50 –25 0 25 50 75 100 VCC ± = ± 5 V R L = 2 kW C L = 100 pF See Figure 1 SR – Slew Rate – V/m s TL054 SLEW RATE † vs FREE-AIR TEMPERATURE † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

48 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

f – Frequency – Hz Vn – Equivalent Input Noise Voltage – 100 100 1 k 10 k 100 k VCC ± = ± 15 V R S = 20 W TA = 25°C See Figure 3 nV/ Hz TL051 EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY f – Frequency – Hz Vn – Equivalent Input Noise Voltage – 100 100 1 k 10 k 100 k nV/ Hz ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ VCC ± = ± 15 V R S = 20 W TA = 25°C See Figure 3 Figure 62 TL052 AND TL054 EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY VO(RMS) = 6 V 0.001 100 f – Frequency – Hz THD – Total Harmonic Distortion – % 0.01 0.1 1 k 10 k 100 k VCC ± = ±15 V AVD = 1 TA = 25°C TOTAL HARMONIC DISTORTION vs FREQUENCY 0.004 0.04 0.4 Figure 63 Figure 64 2.7 – U nity-G ain B andw idth – MH z |VCC ± | – Supply Voltage – V 3.2 2 4 6 8 10 12 14 2.8 2.9 3.1 VI = 10 mV R L = 2 kW C L = 25 pF TA = 25°C See Figure 4 B 1 TL051 UNITY-GAIN BANDWIDTH vs SUPPLY VOLTAGE

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

50 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

VCC ± = ± 5 V to ± 15 V R L = 2 kW C L = 25 pF TA = 25°C VI = 10 mV –75 TA – Free-Air Temperature – °C 125 –50 –25 0 25 50 75 100 – Unity-Gain Bandwidth – MHzB 1 TL054 UNITY-GAIN BANDWIDTH † vs FREE-AIR TEMPERATURE Figure 70 55° m 65° 2 4 6 8 10 12 14 57° 59° 61° 63° |VCC ± | –Supply Voltage – V See Figure 4 TA = 25°C C L = 25 pF R L = 2 kW VI = 10 mV f – Phase Margin TL051 PHASE MARGIN vs SUPPLY VOLTAGE Figure 71 55° m 65° 46 8 1 0 1 2 1 4 57° 59° 61° 63° |VCC ± | –Supply Voltage – V f – Phase Margin See Figure 4 TA = 25°C C L = 25 pF R L = 2 kW VI = 10 mV TL052 PHASE MARGIN vs SUPPLY VOLTAGE Figure 72 55° m 65° 048 1 0 1 2 1 4 57° 59° 61° 63° |VCC ± | –Supply Voltage – V f – Phase Margin ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ See Figure 4 TA = 25°C C L = 25 pF R L = 2 kW VI = 10 mV TL054 PHASE MARGIN vs SUPPLY VOLTAGE † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

52 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

–7555° TA – Free-Air Temperature –°C 125 65° –50 –25 0 25 50 75 100 57° 59° 61° 63° VCC ± = ± 15 V VCC ± = ± 5 V ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ C L = 25 pF VI = 10 mV R L = 2 kW See Figure 4 mf – Phase Margin TL051 PHASE MARGIN † vs FREE-AIR TEMPERATURE Figure 77 –7555° TA – Free-Air Temperature – °C 125 65° –50 –25 0 25 50 75 100 57° 59° 61° 63° VCC ± = ± 15 V VCC ± = ± 5 V ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ C L = 25 pF VI = 10 mV R L = 2 kW See Figure 4 mf – Phase Margin TL052 PHASE MARGIN † vs FREE-AIR TEMPERATURE –7555° TA – Free-Air Temperature – °C 125 65° –50 –25 0 25 50 75 100 57° 59° 61° 63° VCC ± = ± 15 V VCC ± = ± 5 V ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ C L = 25 pF VI = 10 mV R L = 2 kW See Figure 4 mf – Phase Margin TL054 PHASE MARGIN † vs FREE-AIR TEMPERATURE Figure 78 † Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

54 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

APPLICATION INFORMATION

All operating characteristics (except bandwidth and phase margin) are specified with 100-pF load capacitance. The TL05x and TL05xA drive higher capacitive loads; however, as the load capacitance increases, the resulting response pole occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation. The value of the load capacitance at which oscillation occurs varies with production lots. If an application appears to be sensitive to oscillation due to load capacitance, adding a small resistance in series with the load should alleviate the problem. Capacitive loads of 1000 pF and larger may be driven if enough resistance is added in series with the output (see Figure 81 and Figure 82). (a) CL = 100 pF, R = 0 (b) C L = 300 pF, R = 0 (c) C L = 350 pF, R = 0 (d) CL = 1000 pF, R = 0 (e) CL 1000 pF, R = 50 W (f) CL = 1000 pF, R = 2 kW Figure 81. Effect of Capacitive Loads NOTE A: CL includes fixture capacitance. Figure 82. Test Circuit for Output Characteristics

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 55POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 The TL05x and TL05xA are specified with a minimum and a maximum input voltage that, if exceeded at either input, could cause the device to malfunction. Because of the extremely high input impedance and resulting low bias current requirements, the TL05x and TL05xA are well suited for low-level signal processing; however, leakage currents on printed-circuit boards and sockets can easily exceed bias current requirements and cause degradation in system performance. It is good practice to include guard rings around inputs (see Figure 83). These guards should be driven from a low-impedance source at the same voltage level as the common-mode input. Unused amplifiers should be connected as grounded unity-gain followers to avoid possible oscillation. VO VO VO VI VI (a) NONINVERTING AMPLIFIER (b) INVERTING AMPLIFIER (c) UNITY-GAIN AMPLIFIER VI Figure 83. Use of Guard Rings circuit impedance greater than 50 kW .

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

56 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

The phase meter in Figure 84 produces an output voltage of 10 mV per degree of phase delay between the two input signals VA and VB. The reference signal VA must be the same frequency as VB. The TLC3702 comparators (U1) convert these two input sine waves into ± 5-V square waves. Then R1 and R4 provide level shifting prior to the SN74HC109 dual J-K flip flops. Flip-flop U2B is connected as a toggle flip-flop and generates a square wave at half the frequency of VB. Flip-flop U2A also produces a square wave at half the input frequency. The pulse duration of U2A varies from zero to half the period, where zero corresponds to zero phase delay between VA and VB and half the period corresponds to VB lagging VA by 360 degrees. The output pulse from U2A causes the TLC4066 (U3) switch to charge the TL05x (U4) integrator capacitors C1 and C2. As the phase delay approaches 360 degrees, the output of U4A approximates a square wave and U2A has an output of almost 2.5 V. U4B acts as a noninverting amplifier with a gain of 1.44 in order to scale the 0- to 2.5-V integrator output to a 0- to 3.6-V output range. R8 and R10 provide output gain and zero-level calibration. This circuit operates over a 100-Hz to 10-kHz frequency range. + 5 V 100 kW 100 kW U1A VA S U2A R NC U2B VB U1B 10 kW 10 kW + 5 V S R NC100 kW 100 kW R5 C1 10 kW 0.016 mF 0.016 mF U4A U4B V O 20 kW Gain 50 kW + 5 V R10 10 kW Zero – 5 V NOTE A: U1 = TLC3702; VCC ± = ± 5 V U2 = SN74HC109 U3 = TLC4066 U4, U5 = TL05x; VCC ± = ± 5 V Figure 84. Phase Meter

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 57POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 precision constant-current source over temperature A precision current source (see Figure 85) benefits from the high input impedance and stability of Texas Instruments enhanced-JFET process. A low-current shunt regulator maintains 2.5 V between the inverting input and the output of the TL05x. The negative feedback then forces 2.5 V across the current setting resistor R; therefore, the current to the load is simply 2.5 V divided by R. Possible choices for the shunt regulator include the LT1004, LT1009, and LM385. If the regulator’s cathode connects to the operational amplifier output, this circuit sources load current. Similarly, if the cathode connects to the inverting input, the circuit sinks current from the load. To minimize output current change with temperature, R should be a metal film resistor with a low temperature coefficient. Also, this circuit must be operated with split-voltage supplies. 150 pF + 15 V – 15 V R 100 kW IO Load V = 0 to 10 V (a) SOURCE CURRENT LOAD (b) SINK CURRENT LOAD V = 0 to –10 V Load II R – 15 V + 15 V 150 pF 100 kW NOTE B: U1 = 1/2 TL05x U2 = LM385, LT1004, or LT1009 voltage reference I =2.5 V R , R = Low temperature coefficient metal film resistor Figure 85. Precision Constant-Current Source

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

58 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

instrumentation amplifier with adjustable gain/null The instrumentation amplifier in Figure 86 benefits greatly from the high input impedance and stable input offset voltage of the TL05xA. Amplifiers U1A, U1B, and U2A form the actual instrumentation amplifier, while U2B provides offset null. Potentiometer R1 provides gain adjust. With R1 = 2 kW , the circuit gain equals 100, while with R1 = 200 kW , the circuit gain equals two. The following equation shows the instrumentation amplifier gain as a function of R1: A V /C00431 /C0041/C0466R2 /C0041R3 R1 /C0467 Readjusting the offset null is necessary whenever the circuit gain is changed. If U2B is needed for another application, R7 can be terminated at ground. The low input offset voltage of the TL05xA minimizes the dc error of the circuit. For best matching, all resistors should be one percent tolerance. The matching between R4, R5, R6, and R7 controls the CMRR of this application. The following equation shows the output voltages when the input voltage equals zero. This dc error can be nulled by adjusting the offset null potentiometer; however, any change in offset voltage over time or temperature also creates an error. To calculate the error from changes in offset, consider the three offset components in the equation as delta offsets rather than initial offsets. The improved stability of Texas Instruments enhanced JFETs minimizes the error resulting from change in input offset voltage with time. Assuming V I equals zero, VO can be shown as a function of the offset voltage: –V IO1/C0426R3 R1 /C0466R7 R5 /C0041R7 /C0467/C04661 /C0041R6 R4 /C0467/C0041R6 R4 /C04661 /C0041R2 R1 /C0467/C0427/C0041V IO3 /C04661 /C0041R6 R4 /C0467 V O /C0043V IO2/C0426/C04661 /C0041R3 R1 /C0467/C0466R7 R5 /C0041R7 /C0467/C04661 /C0041R6 R4 /C0467/C0041R2 R1 /C0466R6 R4 /C0467/C0427 NOTE A: U1 and U2 = TL05xA; VCC ± = ± 15 V. 100 kW U2A VI– U1A 10 kW 10 kW 200 kW 10 MW 100 kW 10 turn AV = 2 to 100 2 kW R1 U1B VI+ R5 R7 U2B 0.1 mF Offset Null VCC– 82 kW 82 kW VCC+R3 VO 10 kW 10 kW 10 MW 1 kW Figure 86. Instrumentation Amplifier

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 59POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 high input impedance log amplifier The low input offset voltage and high input impedance of the TL05xA creates a precision log amplifier (see Figure 87). IC1 is a 2.5-V, low-current precision, shunt regulator. Transistors Q1 and Q2 must be a closely matched NPN pair. For best performance over temperature, R4 should be a metal film resistor with a low temperature coefficient. In this circuit, U1A serves as a high-impedance unity-gain buffer. Amplifier U1B converts the input voltage to a current through R1 and Q1. Amplifier U1C, IC1, and R4 form a 1-mA temperature-stable current source that sets the base-emitter voltage of Q2. U1D amplifies the difference between the base-emitter voltage of Q1 and Q2 (see Figure 88). The output voltage is given by the following equation: V O /C0043– /C04261 /C0041R6 R5 /C0427kT q /C0551/C0561 /C0562 In V I /C0466R1 /C00321 /C003210–6/C0467/C0551/C0563 /C0564 where k /C00431.38 /C003210–23,q /C00431.602/C003210–19, and T is in degrees kelvin. U1A_ U1B U1C U1D VI 10 kW Q1 Q2 2N2484

15 V 10 kW

2.5 MW 150 pF IC1270 kW –15V 10 kW 10 kW VO(see equation above) NOTE A: U1A through U1D = TL05xA. IC1 = LM385, LT1004, or LT1009 voltage reference. Figure 87. Log Amplifier Figure 88. Output Voltage vs Input Voltage for Log Amplifier

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

60 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

By combining a current source that does not vary over temperature with an instrumentation amplifier, a precise analog thermometer can be built (see Figure 89). Amplifier U1A and IC1 establish a constant current through the temperature-sensing diode D1. For this section of the circuit to operate correctly, the TL05x must use split supplies and R3 must be a metal-film resistor with a low temperature coefficient. The temperature-sensitive voltage from the diode is compared to a temperature-stable voltage reference set by IC2. R4 should be adjusted to provide the correct output voltage when the diode is at a known temperature. Although this potentiometer resistance varies with temperature, the divider ratio of the potentiometer remains constant. Amplifiers U1B, U2A, and U2B form the instrumentation amplifier that converts the difference between the diode and reference voltage to a voltage proportional to the temperature. With switch S1 closed, the amplifier gain equals 5 and the output voltage is proportional to temperature in degrees Celsius. With S1 open, the amplifier gain is 9 and the output is proportional to temperature in degrees Fahrenheit. Every time that S1 is changed, R4 must be recalibrated. By setting S1 correctly, the output voltage equals 10 mV per degree (C or F). IC1 150 pF 100 kW U1A R3 10 kW (see Note B) (see Note A) +15 V R2 100 kW IC2 50 kW U1B 10 kW 5 kW 5 kW (see Note C) 10 kW U2A R10 10 kW R11 R9 R12 10 kW 10 kW +15 V –15 V 10 kW VO (see Note D) U2B NOTES: A. Temperature-sensing diode ≈ (–2 mV/°C) B. Metal-film resistor (low temperature coefficient) C. Switch open for °F and closed for °C D. V O a temperature; 10 mV/°C or 10 mV/°F E. U1, U2 = TL05x. IC1, IC2 = LM385, LT1004, or LT1009 voltage reference Figure 89. Analog Thermometer

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 61POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 voltage-ratio-to-dB converter The application in Figure 90 measures the amplitude ratio of two signals and then converts the ratio to decibels (see Figure 91). The output voltage provides a resolution of 100 mV/dB. The two inputs can be either dc or sinusoidal ac signals. When using ac signals, both signals should be the same frequency or output glitches will occur. For measuring two input signals of different frequencies, extra filtering should be added after the rectifiers. The circuit contains three low-offset TL05xA devices. Two of these devices provide the rectification and logarithmic conversion of the inputs. The third TL05xA forms an instrumentation amplifier. The stage performing the logarithmic conversion also requires two well-matched npn transistors. The input signal first passes through a high impedance unity-gain buffer U1A (U2A). Then U1B (U2B) rectifies the input signal at a gain of 0.5, and U1C (U2C) provides a noninverting gain of 2 so that the system gain is still one. U1D (U2D), R6 (R13), and Q1 (Q2) perform the logarithmic conversion of the rectified input signal. The instrumentation amplifier formed by U3A, U3B, U3D scales the difference of the two logarithmic voltages by a gain of 33.6. As a result, the output voltage equals 100 mV/dB. The 1-kW potentiometer on the input of U3C calibrates the zero dB reference level. The following equations are used to derive the relationship between the input voltage ratio expressed in decibels and the output voltage. Xd B /C004320 log /C0426 V A V B /C0427/C004320/C0551/C0561 /C0562 In /C0466V A/C0467– /C0466V B/C0467 In (10) /C0551/C0563 /C0564 Xd B /C00438.686 /C0426In /C0466V A/C0467–I n/C0466V B/C0467/C0427 V BE(Q1) /C0043kT q In /C0426 V A R /C0032IS /C0427V BE(Q2) /C0043kT q In /C0426 V B R /C0032IS /C0427 /C0068V BE /C0043V BE(Q1) –V BE(Q2) /C0043kT q /C0426In /C0466V A/C0467–I n/C0466V B/C0467/C0427 Xd B /C00438.686 kT/C0324q /C0426V BE(Q1) –V BE(Q2)/C0427/C0043336 /C0426V BE(Q1) –V BE(Q2)/C0427at 25°C where k /C00431.38/C003210–23,q /C00431.602/C003210–19, and T is in kelvins. This would give a resolution of 1 V/dB. Therefore, the gain of the instrumentation amplifier is set at 33.6 to obtain 100 mV/dB.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

62 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

16.3 kW R18 10 kW R20 10 kW R11 10 kW R12 10 kW R13 10 kW 2N2484 R14 10 kW R76 16.3 kW R19 10 kW R21 10 kW 15 V –15 V 82 kW 1 kW 82 kW NOTE A: U1A through U3D = TL05xA, VCC ± = ± 15 V. D1 and D2 = 1N914. Figure 90. Voltage-Ratio-to-dB Converter Figure 91. Output Voltage vs the Ratio of the Input Voltages for Voltage-to-dB Converter

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997 63POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Macromodel information provided was derived using MicrosimParts , the model generation software used with Microsim PSpice . The Boyle macromodel (see Note 5) and subcircuit Figure 92 are generated using the TL05x typical electrical and operating characteristics at TA = 25°C. Using this information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases): /C0068Maximum positive output voltage swing /C0068Maximum negative output voltage swing /C0068Slew rate /C0068Quiescent power dissipation /C0068Input bias current /C0068Open-loop voltage amplification /C0068Unity-gain frequency /C0068Common-mode rejection ratio /C0068Phase margin /C0068DC output resistance /C0068AC output resistance /C0068Short-circuit output current limit Journal of Solid-State Circuits, SC-9, 353 (1974). OUT – + .SUBCKT TL05x 1 2 3 4 5 C1 11 12 3.988E–12 C2 6 7 15.00E–12 DC 5 53 DX DE 54 5 DX DLP 90 91 DX DLN 92 90 DX D P 43D X FB 7 99 POLY (5) VB VC VE VLP + VLN 0 2.875E6 –3E6 3E6 3E6 –3E6 GA 6 0 11 12 292.2E–6 GCM 0 6 10 99 6.542E–9 ISS 3 10 DC 300.0E–6 HLIM 90 0 VLIM 1K J1 11 2 10 JX J2 12 1 10 JX R2 6 9 100.0E3 RD1 4 11 3.422E3 RD2 4 12 3.422E3 R01 8 5 125 R02 7 99 125 RP 3 4 11.11E3 RSS 10 99 666.7E6 VB 9 0 DC 0 VC 3 53 DC 3 VE 54 4 DC 3.7 VLIM 7 8 DC 0 VLP 91 0 DC 28 VLN 0 92 DC 28 .MODEL DX D (IS=800.0E–18) .MODEL JX PJF (IS=15.00E–12 BETA=185.2E–6 + VTO=–.1) .ENDS VCC+ RP IN – IN+ VCC– VAD RD1 J1 J2 RSS ISS RD2 VE DE DP VC DC EGND VB FB GCM GA VLIM RO1 RO2 HLIM DLP DLN VLNVLP Figure 92. Boyle Macromodel and Subcircuit PSpice and Parts are trademarks of MicroSim Corporation. semiconductor product to which the model relates.

TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS178 – FEBRUARY 1997

64 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright  1999, Texas Instruments Incorporated