TESDS5V0A_15 TSC | Alldatasheet

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Technical content

  • Meet IEC61000-4-2 (ESD) ±15kV (air), ±8kV (contact) - Meet IEC61000-4-4 (EFT) rating. 40A (5/50ns) - Meet IEC61000-4-5 (Lightning) rating. 2A (8/20μs) - Protects four directional I/O lines - Working voltage: 5V - Pb free version and RoHS compliant - Packing code with suffix "G" means green compound (halogen-free) - Case: SOT-26 small outline plastic package - Moisture sensitivity: level 1, per J-STD-020 - Weight: 16 ± 0.5 mg - Marking code: V05 SYMBOL UNIT P PP W IPP A TJ , TSTG oC SYMBOL UNIT VRWM V V(BR) V IR μA CJ pF Document Number: DS_S1501025 Version: D15 TESDS5V0A Taiwan Semiconductor Steering Diode Structure ESD Protection Array

FEATURES

  • Terminal: Matte tin plated, lead free., solderable per MIL-STD-202, Method 208 guaranteed - High temperature soldering guaranteed : 260°C/10s MAXIMUM RATINGS AND ELECTRICAL CHARACTERISTICS (TA=25°C unless otherwise noted) PARAMETER VALUE Peak Pulse Power (tp=8/20μs waveform) 300 Peak Pulse Current (tp=8/20μs) 2 ESD per IEC 61000-4-2 (Air) VESD ± 15 KVESD per IEC 61000-4-2 (Contact) ± 8 Junction and Storage Temperature Range -55 to +150 PARAMETER MIN MAX Reverse Stand-Off Voltage - 5 Reverse Breakdown Voltage IR = 1 mA 6- Reverse Leakage Current VR = 5 V -1 Clamping Voltage IPP = 1 A VC - 12.5 VIPP = 2 A -2 5 Junction Capacitance VR = 0 V , f = 1.0 MHz 1.2

(TA=25°C unless otherwise noted) Document Number: DS_S1501025 Version: D15 Small Signal Product RATINGS AND CHARACTERISTICS CURVES TESDS5V0A Taiwan Semiconductor 100 200 300 400 500 Peak Pulse Power Ppp (KW) Pulse Duration (us) 300W 8/20us -waveform 100 0 5 10 15 20 Percent of IPP Time (us) Fig. 2 Pulse Waveform PULSE WIDTH (tp) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAY = 8us tp PEAK VALUE IRSM@8us HALF VALUE IRSM/2@20us tr 100 120 0 20 40 60 80 100 120 140 160 180 Power Rating (%) Ambient Tempeatature (oC) Fiig.3 Admissible Power Dissipation Curve 0.5 1.5 012345 Normalized Capacitance (pF) Reverse Voltage (V) f=1.0 MHz Fig. 4 Typical Junction Capacitance 00 . 511 . 522 . 5 Clamping Voltage (V) Peak Pulse Current (A) TJ=25℃ Fig. 5 Clamping Voltage VS. Peak Pulse Current Fig. 1 Non-Repetitive Peak Pulse Power VS. Pulse Time

PACKAGE OUTLINE DIMENSIONS Min Max Min Max A 2.800 3.100 0.110 0.122 B 1.500 1.750 0.059 0.069 C 0.250 0.500 0.010 0.020 D 1.800 2.000 0.071 0.079 E 2.650 2.950 0.104 0.116 F 0.900 1.450 0.035 0.057 G 0.475 0.725 0.019 0.029 SUGGEST PAD LAYOUT A B C D E F Note: 1. The suggested land pattern dimensions have been provided for reference only, as actual pad layouts may vary depending on application. APPLICATIONS INFORMATION ◇ Designed to protect high speed data interfaces ◇ Designed to protect four data lines from transient over-voltages by clamping them to a fixed reference ◇ Designed to protect sensitive components which are connected to data and transmission lines from overvoltage caused by electrostatic discharge (ESD), electrical fast transients (EFT), and lightning. ◇ TESDS5V0A incorporates eight surge rated, low capacitance steering diodes and a TVS diode in a single package ◇ During transient conditions, the steering diodes direct the transient to either the positive side of the power supply line or to ground ◇ The internal TVS diode prevents over-voltage on the power line, protecting any downstream components Document Number: DS_S1501025 Version: D15 DIM. Unit (mm) Unit (inch) TESDS5V0A Taiwan Semiconductor Small Signal Product ORDER INFORMATION (EXAMPLE) SOT-26 0.043 DIM. Unit (mm) Unit (inch) Typ. Typ. 2.50 0.098 1.40 0.055 3.60 0.142 0.60 0.024 0.95 0.037 1.10 TESDS5V0A RFG Green compound code Packing code Part no. B A C D G F E

CIRCUIT BOARD LAYOUT RECOMMENDATIONS ◇ To protect data lines and the power line, connect pin 5 directly to the VDD. In this configuration the data lines are referenced to the supply voltage. The internal TVS diode prevents over-voltage on the supply rail. ◇ The TESDS5V0A can be isolated from the power supply by adding a series resistor between pin 5 and VDD. A value of 100kΩ is recommended. The internal TVS and steering diodes remain biased, providing the advantage of lower capacitance. ◇ In applications where no positive supply reference is available, or complete supply isolation is desired, the internal TVS may be used as the reference. In this case, pin 5 is not connected. The steering diodes will begin to conduct when the voltage on the protected line exceeds the working voltage of the TVS (plus one diode drop). Document Number: DS_S1501025 Version: D15 Data Line Protection Using Internal TVS Diode as Reference Data Line and Power Supply Protection Using Vcc as reference Data Line Protection with Bias and Power Supply Isolation TESDS5V0A Taiwan Semiconductor

assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied,to any intellectual property rights is granted by this document. Except as provided in TSC's terms and conditions of sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of TSC products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers using or seling these products for use in such applications do so at their own risk and agree to fully indemnify TSC for any damages resulting from such improper use or sale. Document Number: DS_S1501025 Version: D15 TESDS5V0A Taiwan Semiconductor Notice Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf,